On Thu, 08 Dec 2016, Manasi Navare wrote:
> Daniel, can we merge this patch?
Pushed this one to dinq, thanks for the patch.
BR,
Jani.
> It has no dependency on other link train patches,
> it is just a clean up for the existing driver code that
> uses max link rate and lane count values.
> Othe
On Tue, 06 Dec 2016, Manasi Navare wrote:
> Sink's capabilities are advertised through DPCD registers and get
> updated only on hotplug. So they should be computed only once in the
> long pulse handler and saved off in intel_dp structure for the use
> later. For this reason two new fields max_sink
Daniel, can we merge this patch?
It has no dependency on other link train patches,
it is just a clean up for the existing driver code that
uses max link rate and lane count values.
Other link train patches have dependency on this thats why
it was part of the series.
But it would be great if this ge
On Thu, Dec 08, 2016 at 11:23:39PM +0200, Jani Nikula wrote:
> On Tue, 06 Dec 2016, Manasi Navare wrote:
> > Sink's capabilities are advertised through DPCD registers and get
> > updated only on hotplug. So they should be computed only once in the
> > long pulse handler and saved off in intel_dp s
Jani,
Could you please review this patch? This is the patch that
calculates the max sink link rate and max sink lane count only
once at hotplug and then anytime the max lane count and common rates are
requested,
the helper functions use these values.
This simplifies the fallback logic since we ca
Sink's capabilities are advertised through DPCD registers and get
updated only on hotplug. So they should be computed only once in the
long pulse handler and saved off in intel_dp structure for the use
later. For this reason two new fields max_sink_lane_count and
max_sink_link_bw are added to intel
