[PATCH 2/3] drm/msm: Handle register offset differences between a3xx, and a4xx

2014-11-07 Thread Ganesan, Aravind
On 11/6/2014 2:11 PM, Rob Clark wrote: > On Fri, Oct 31, 2014 at 11:08 AM, Ganesan, Aravind > wrote: >> Register offsets have changed between a3xx and a4xx GPUs. >> To be able access these registers in common code, we create >> a lookup table, and set of read-write APIs to access the >> register

[PATCH 2/3] drm/msm: Handle register offset differences between a3xx, and a4xx

2014-11-06 Thread Rob Clark
On Fri, Oct 31, 2014 at 11:08 AM, Ganesan, Aravind wrote: > Register offsets have changed between a3xx and a4xx GPUs. > To be able access these registers in common code, we create > a lookup table, and set of read-write APIs to access the > register through the lookup table. > > Signed-off-by: Ara

[PATCH 2/3] drm/msm: Handle register offset differences between a3xx, and a4xx

2014-10-31 Thread Ganesan, Aravind
Register offsets have changed between a3xx and a4xx GPUs. To be able access these registers in common code, we create a lookup table, and set of read-write APIs to access the register through the lookup table. Signed-off-by: Aravind Ganesan --- Resend the patch-set with the same thread-id Resend

[PATCH 2/3] drm/msm: Handle register offset differences between a3xx, and a4xx

2014-10-30 Thread Ganesan, Aravind
Register offsets have changed between a3xx and a4xx GPUs. To be able access these registers in common code, we create a lookup table, and set of read-write APIs to access the register through the lookup table. Signed-off-by: Aravind Ganesan --- Resend in patch-set format and with dri-devel at lis