> mode setting a tiny bit faster as well.
>
> I've got a couple more changes to work on today:
>
> ?1) re-train the monitor when it gets unplugged and then plugged back
> ? ?in. Right now, if you kick the cable out, you're stuck fumbling
> ? ?around in the dark trying to run 'xrandr' again.
don't
"Dave Airlie" wrote:
>> mode setting a tiny bit faster as well.
>>
>> I've got a couple more changes to work on today:
>>
>> 1) re-train the monitor when it gets unplugged and then plugged back
>> in. Right now, if you kick the cable out, you're stuck fumbling
>> around in the dark tryin
On Mon, 4 Oct 2010 06:33:01 +1000, Dave Airlie wrote:
> don't you do this already? both radeon/nouveau handle DP replug fine,
> I thought Intel would have been where I stole the code from.
There was a one-line bug. Patch already posted.
--
keith.pack...@intel.com
pgpeOx3goDN8S.pgp
Descriptio
On Mon, 4 Oct 2010 06:33:01 +1000, Dave Airlie wrote:
> don't you do this already? both radeon/nouveau handle DP replug fine,
> I thought Intel would have been where I stole the code from.
There was a one-line bug. Patch already posted.
--
keith.packard at intel.com
-- next part --
"Dave Airlie" wrote:
>> mode setting a tiny bit faster as well.
>>
>> I've got a couple more changes to work on today:
>>
>> ?1) re-train the monitor when it gets unplugged and then plugged back
>> ? ?in. Right now, if you kick the cable out, you're stuck fumbling
>> ? ?around in the dark tryin
> mode setting a tiny bit faster as well.
>
> I've got a couple more changes to work on today:
>
> 1) re-train the monitor when it gets unplugged and then plugged back
> in. Right now, if you kick the cable out, you're stuck fumbling
> around in the dark trying to run 'xrandr' again.
don't
"Keith Packard" wrote:
>On Sun, 3 Oct 2010 08:10:48 -0700, Jesse Barnes
>wrote:
>
>> Do these fixes help with the DP issues you've been seeing, Keith?
>> Seems like the first one shouldn't change behavior since we ought to
>> time out on waiting on vblank in that case, and the timeout is the
"Keith Packard" wrote:
>On Sun, 3 Oct 2010 08:10:48 -0700, Jesse Barnes
>wrote:
>
>> Do these fixes help with the DP issues you've been seeing, Keith?
>> Seems like the first one shouldn't change behavior since we ought to
>> time out on waiting on vblank in that case, and the timeout is the
On Sun, 3 Oct 2010 08:10:48 -0700, Jesse Barnes
wrote:
> Do these fixes help with the DP issues you've been seeing, Keith?
> Seems like the first one shouldn't change behavior since we ought to
> time out on waiting on vblank in that case, and the timeout is the same
> as the msleep we used to u
On Sun, 3 Oct 2010 08:10:48 -0700, Jesse Barnes
wrote:
> Do these fixes help with the DP issues you've been seeing, Keith?
> Seems like the first one shouldn't change behavior since we ought to
> time out on waiting on vblank in that case, and the timeout is the same
> as the msleep we used to u
On Sun, 3 Oct 2010 00:33:06 -0700, Keith Packard wrote:
> Instead of waiting for the display line value to settle, we can simply
> wait for the pipe configuration register 'state' bit to turn off.
Thanks Keith, series applied to -fixes.
-Chris
--
Chris Wilson, Intel Open Source Technology Cent
On Sun, 3 Oct 2010 00:33:06 -0700
Keith Packard wrote:
> Instead of waiting for the display line value to settle, we can simply
> wait for the pipe configuration register 'state' bit to turn off.
>
> Contrarywise, disabling the plane will not cause the display line
> value to stop changing, so
On Sun, 3 Oct 2010 00:33:06 -0700
Keith Packard wrote:
> Instead of waiting for the display line value to settle, we can simply
> wait for the pipe configuration register 'state' bit to turn off.
>
> Contrarywise, disabling the plane will not cause the display line
> value to stop changing, so
On Sun, 3 Oct 2010 00:33:06 -0700, Keith Packard wrote:
> Instead of waiting for the display line value to settle, we can simply
> wait for the pipe configuration register 'state' bit to turn off.
Thanks Keith, series applied to -fixes.
-Chris
--
Chris Wilson, Intel Open Source Technology Cent
Instead of waiting for the display line value to settle, we can simply
wait for the pipe configuration register 'state' bit to turn off.
Contrarywise, disabling the plane will not cause the display line
value to stop changing, so instead we wait for the vblank interrupt
bit to get set. And, we onl
Instead of waiting for the display line value to settle, we can simply
wait for the pipe configuration register 'state' bit to turn off.
Contrarywise, disabling the plane will not cause the display line
value to stop changing, so instead we wait for the vblank interrupt
bit to get set. And, we onl
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