On Fri, Sep 07, 2018 at 03:22:30PM +0800, Icenowy Zheng wrote:
> By experiments it seems that the A64 HDMI PHY is not able to use the
> second video PLL as the clock parent.
>
> Drop pll-1 from the device tree binding of A64 HDMI PHY.
>
> Signed-off-by: Icenowy Zheng
> ---
> Documentation/devic
By experiments it seems that the A64 HDMI PHY is not able to use the
second video PLL as the clock parent.
Drop pll-1 from the device tree binding of A64 HDMI PHY.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 -
1 file changed, 1 deletion(-)
