On 11/7/2022 3:02 PM, Dmitry Baryshkov wrote:
On 07/11/2022 07:27, Abhinav Kumar wrote:
On 9/22/2022 4:30 AM, Dmitry Baryshkov wrote:
SM8350 and SM8450 use 5nm DSI PHYs, which share register definitions
with 7nm DSI PHYs. Rather than duplicating the driver, handle 5nm
variants inside the c
On 07/11/2022 07:27, Abhinav Kumar wrote:
On 9/22/2022 4:30 AM, Dmitry Baryshkov wrote:
SM8350 and SM8450 use 5nm DSI PHYs, which share register definitions
with 7nm DSI PHYs. Rather than duplicating the driver, handle 5nm
variants inside the common 5+7nm driver.
I do realize that there is c
On 9/22/2022 4:30 AM, Dmitry Baryshkov wrote:
SM8350 and SM8450 use 5nm DSI PHYs, which share register definitions
with 7nm DSI PHYs. Rather than duplicating the driver, handle 5nm
variants inside the common 5+7nm driver.
I do realize that there is common code across PHYs but i am concerned
SM8350 and SM8450 use 5nm DSI PHYs, which share register definitions
with 7nm DSI PHYs. Rather than duplicating the driver, handle 5nm
variants inside the common 5+7nm driver.
Co-developed-by: Robert Foss
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/Kconfig | 6 +-
dr
