[PATCH 09/14 v5] drm/i915/intel_i2c: use double-buffered writes

2012-03-28 Thread Daniel Kurtz
The GMBUS controller GMBUS3 register is double-buffered. Take advantage of this by writing two 4-byte words before the first wait for HW_RDY. This helps keep the GMBUS controller from becoming idle during long writes. Signed-off-by: Daniel Kurtz --- drivers/gpu/drm/i915/intel_i2c.c | 14

[PATCH 09/14 v5] drm/i915/intel_i2c: use double-buffered writes

2012-03-28 Thread Daniel Kurtz
The GMBUS controller GMBUS3 register is double-buffered. Take advantage of this by writing two 4-byte words before the first wait for HW_RDY. This helps keep the GMBUS controller from becoming idle during long writes. Signed-off-by: Daniel Kurtz --- drivers/gpu/drm/i915/intel_i2c.c | 14