[PATCH 05/19] clk: sunxi: add DRAM gates

2015-11-19 Thread Maxime Ripard
On Fri, Nov 13, 2015 at 04:08:53PM +0800, Chen-Yu Tsai wrote: > On Mon, Nov 9, 2015 at 12:18 PM, Chen-Yu Tsai wrote: > > On Fri, Oct 30, 2015 at 10:20 PM, Maxime Ripard > > wrote: > >> The Allwinner SoCs have a gate controller to gate the access to the DRAM > >> clock to the some devices that nee

[PATCH 05/19] clk: sunxi: add DRAM gates

2015-11-13 Thread Chen-Yu Tsai
On Mon, Nov 9, 2015 at 12:18 PM, Chen-Yu Tsai wrote: > On Fri, Oct 30, 2015 at 10:20 PM, Maxime Ripard > wrote: >> The Allwinner SoCs have a gate controller to gate the access to the DRAM >> clock to the some devices that need to access the DRAM directly (mostly >> display / image related IPs). >

[PATCH 05/19] clk: sunxi: add DRAM gates

2015-11-09 Thread Chen-Yu Tsai
On Fri, Oct 30, 2015 at 10:20 PM, Maxime Ripard wrote: > The Allwinner SoCs have a gate controller to gate the access to the DRAM > clock to the some devices that need to access the DRAM directly (mostly > display / image related IPs). > > Use a simple gates driver to support it. > > Signed-off-by

[PATCH 05/19] clk: sunxi: add DRAM gates

2015-10-30 Thread Maxime Ripard
The Allwinner SoCs have a gate controller to gate the access to the DRAM clock to the some devices that need to access the DRAM directly (mostly display / image related IPs). Use a simple gates driver to support it. Signed-off-by: Maxime Ripard --- drivers/clk/sunxi/clk-simple-gates.c | 2 ++ 1