[PATCH 03/19] clk: sunxi: Add TCON channel0 clock

2015-11-06 Thread Maxime Ripard
Hi, On Sat, Oct 31, 2015 at 06:19:59PM +0800, Chen-Yu Tsai wrote: > > +#define SUN4I_A10_TCON_CH0_RESET_SHIFT 29 > > This is sun5i specific. > > A10s manual says bit 30 is the LCD reset, while bit 29 is the TV > encoder reset. A13/R8 don't mention TCON_CH0 clock. A10/A20 have no > separate TV e

[PATCH 03/19] clk: sunxi: Add TCON channel0 clock

2015-10-31 Thread Chen-Yu Tsai
Hi, On Fri, Oct 30, 2015 at 10:20 PM, Maxime Ripard wrote: > The TCON is a controller generating the timings to output videos signals, > acting like both a CRTC and an encoder. > > It has two channels depending on the output, each channel being driven by > its own clock (and own clock controller)

[PATCH 03/19] clk: sunxi: Add TCON channel0 clock

2015-10-30 Thread Maxime Ripard
The TCON is a controller generating the timings to output videos signals, acting like both a CRTC and an encoder. It has two channels depending on the output, each channel being driven by its own clock (and own clock controller). Add a driver for the channel 0 clock. Signed-off-by: Maxime Ripard