On Fri, Dec 17, 2010 at 09:28:07AM +1000, Dave Airlie wrote:
> On Fri, Dec 17, 2010 at 5:02 AM, David Sin wrote:
> I get the impression with the ARM graphics, that you just have a lot
> of separate drivers for separate IP blocks all providing some misc
> random interfaces to userspace where some b
On Fri, Dec 17, 2010 at 09:28:07AM +1000, Dave Airlie wrote:
> On Fri, Dec 17, 2010 at 5:02 AM, David Sin wrote:
> I get the impression with the ARM graphics, that you just have a lot
> of separate drivers for separate IP blocks all providing some misc
> random interfaces to userspace where some b
On Fri, Dec 17, 2010 at 5:02 AM, David Sin wrote:
> On Thu, Dec 16, 2010 at 06:43:48PM +0100, Arnd Bergmann wrote:
>> As far as I can tell, both DMM and GEM at a high level manage objects
>> in video memory. The IOMMU that you have on the Omap hardware seems
>> to resemble the GART that sits betwe
On Thursday 16 December 2010 18:37:38 David Sin wrote:
> I'm not sure exactly how DRM/GEM works.. What functionality do you think is
> overlapping? The main feature, aside from reduced page accesses, of the DMM
> hw block is to provide physically contiguous 2 dimensional memory blocks for
> im
On Fri, Dec 17, 2010 at 5:02 AM, David Sin wrote:
> On Thu, Dec 16, 2010 at 06:43:48PM +0100, Arnd Bergmann wrote:
>> As far as I can tell, both DMM and GEM at a high level manage objects
>> in video memory. The IOMMU that you have on the Omap hardware seems
>> to resemble the GART that sits betwe
On Monday 06 December 2010, David Sin wrote:
> Tiling and Isometric Lightweight Engine for Rotation (TILER) driver
> =
>
> Dynamic Memory Manager (DMM) is a hardware block made by Texas Instruments.
> Within the DMM exists at least one TILER hardware component. Its purpose is
> to
> organize
On Thu, Dec 16, 2010 at 06:43:48PM +0100, Arnd Bergmann wrote:
> As far as I can tell, both DMM and GEM at a high level manage objects
> in video memory. The IOMMU that you have on the Omap hardware seems
> to resemble the GART that sits between PC-style video cards and main
> memory.
>
> I don't
On Thu, Dec 16, 2010 at 06:43:48PM +0100, Arnd Bergmann wrote:
> As far as I can tell, both DMM and GEM at a high level manage objects
> in video memory. The IOMMU that you have on the Omap hardware seems
> to resemble the GART that sits between PC-style video cards and main
> memory.
>
> I don't
On Thu, Dec 16, 2010 at 11:25:31AM -0600, David Sin wrote:
> On Thu, Dec 16, 2010 at 02:34:05PM +0100, Arnd Bergmann wrote:
> > On Monday 06 December 2010, David Sin wrote:
> > > Tiling and Isometric Lightweight Engine for Rotation (TILER) driver
> > > =
> > >
> > > Dynamic Memory Manager (DMM
On Thu, Dec 16, 2010 at 02:34:05PM +0100, Arnd Bergmann wrote:
> On Monday 06 December 2010, David Sin wrote:
> > Tiling and Isometric Lightweight Engine for Rotation (TILER) driver
> > =
> >
> > Dynamic Memory Manager (DMM) is a hardware block made by Texas Instruments.
> > Within the DMM exi
On Thu, Dec 16, 2010 at 11:25:31AM -0600, David Sin wrote:
> On Thu, Dec 16, 2010 at 02:34:05PM +0100, Arnd Bergmann wrote:
> > On Monday 06 December 2010, David Sin wrote:
> > > Tiling and Isometric Lightweight Engine for Rotation (TILER) driver
> > > =
> > >
> > > Dynamic Memory Manager (DMM
On Thu, Dec 16, 2010 at 02:34:05PM +0100, Arnd Bergmann wrote:
> On Monday 06 December 2010, David Sin wrote:
> > Tiling and Isometric Lightweight Engine for Rotation (TILER) driver
> > =
> >
> > Dynamic Memory Manager (DMM) is a hardware block made by Texas Instruments.
> > Within the DMM exi
On Thursday 16 December 2010 18:37:38 David Sin wrote:
> I'm not sure exactly how DRM/GEM works.. What functionality do you think is
> overlapping? The main feature, aside from reduced page accesses, of the DMM
> hw block is to provide physically contiguous 2 dimensional memory blocks for
> im
On Monday 06 December 2010, David Sin wrote:
> Tiling and Isometric Lightweight Engine for Rotation (TILER) driver
> =
>
> Dynamic Memory Manager (DMM) is a hardware block made by Texas Instruments.
> Within the DMM exists at least one TILER hardware component. Its purpose is
> to
> organize
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