On Die, 2010-05-25 at 19:09 -0400, Alex Deucher wrote:
>
> Also, on r6xx/r7xx, we don't enable tiling of the front buffer as
> that would require the use of wfb or tiled to untiled blits for CPU
> access. Tiled to untiled blits works (I've tested it), but shows an
> approximately 40% performance
2010/5/27 Michel D?nzer :
> On Die, 2010-05-25 at 19:09 -0400, Alex Deucher wrote:
>>
>> Also, on r6xx/r7xx, we don't enable tiling of the front buffer as
>> that would require the use of wfb or tiled to untiled blits for CPU
>> access. Tiled to untiled blits works (I've tested it), but shows an
>>
2010/5/27 Michel Dänzer :
> On Die, 2010-05-25 at 19:09 -0400, Alex Deucher wrote:
>>
>> Also, on r6xx/r7xx, we don't enable tiling of the front buffer as
>> that would require the use of wfb or tiled to untiled blits for CPU
>> access. Tiled to untiled blits works (I've tested it), but shows an
>>
On Die, 2010-05-25 at 19:09 -0400, Alex Deucher wrote:
>
> Also, on r6xx/r7xx, we don't enable tiling of the front buffer as
> that would require the use of wfb or tiled to untiled blits for CPU
> access. Tiled to untiled blits works (I've tested it), but shows an
> approximately 40% performance
This set of drm patches implements support for 1D and 2D tiling on
r6xx/r7xx chips and lays the groundwork for evergreen tiling
support.
First two patches enable scanout from tiled surfaces.
Third patch updates the CS checker to deal properly with tiling.
Fourth patch fixes surface checking for bo
This set of drm patches implements support for 1D and 2D tiling on
r6xx/r7xx chips and lays the groundwork for evergreen tiling
support.
First two patches enable scanout from tiled surfaces.
Third patch updates the CS checker to deal properly with tiling.
Fourth patch fixes surface checking for bo
