Hi,
On 02/02/2015 11:26 PM, Gustavo Padovan wrote:
> From: Prathyush K
>
> When VPLL clock of less than 140 MHz was used and all the three clocks -
> hdmiphy, hdmi, sclk_hdmi are disabled, the system hangs during S2R when
> HDMI is connected. Since we want to use a vpll clock of 70.5 MHz, we
> c
From: Prathyush K
When VPLL clock of less than 140 MHz was used and all the three clocks -
hdmiphy, hdmi, sclk_hdmi are disabled, the system hangs during S2R when
HDMI is connected. Since we want to use a vpll clock of 70.5 MHz, we
cannot disable these 3 clocks before suspending. This patch add
