[PATCH] uxa: Align tiled surface size to an number of tiled rows

Align surface sizes to an even number of tile rows to cater for sampler prefetch, as shown by enabling GPU invalid PTE detection (i.e. clearing the valid bit of the PTE). --- We are investigating bug https://bugs.freedesktop.org/show_bug.cgi?id=55984 where the only lead so far is the ordering of e

[PATCH] uxa: Align tiled surface size to an number of tiled rows

Align surface sizes to an even number of tile rows to cater for sampler prefetch, as shown by enabling GPU invalid PTE detection (i.e. clearing the valid bit of the PTE). --- We are investigating bug https://bugs.freedesktop.org/show_bug.cgi?id=55984 where the only lead so far is the ordering of e