On Wed, Jun 5, 2013 at 5:16 PM, Ilia Mirkin wrote:
> On Wed, Jun 5, 2013 at 3:05 AM, Maarten Lankhorst
> wrote:
>> Hey,
>>
>> Op 04-06-13 20:38, Ilia Mirkin schreef:
>>> On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin wrote:
These chipsets include the VP2 engine which is composed of a bitstream
On Wed, Jun 5, 2013 at 5:16 PM, Ilia Mirkin wrote:
> On Wed, Jun 5, 2013 at 3:05 AM, Maarten Lankhorst
> wrote:
>> Hey,
>>
>> Op 04-06-13 20:38, Ilia Mirkin schreef:
>>> On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin wrote:
These chipsets include the VP2 engine which is composed of a bitstream
Hey,
Op 04-06-13 20:38, Ilia Mirkin schreef:
> On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin wrote:
>> These chipsets include the VP2 engine which is composed of a bitstream
>> processor (BSP) that decodes H.264 and a video processor (VP) which can
>> do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-
On Wed, Jun 5, 2013 at 3:05 AM, Maarten Lankhorst
wrote:
> Hey,
>
> Op 04-06-13 20:38, Ilia Mirkin schreef:
>> On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin wrote:
>>> These chipsets include the VP2 engine which is composed of a bitstream
>>> processor (BSP) that decodes H.264 and a video processor
On Wed, Jun 5, 2013 at 3:05 AM, Maarten Lankhorst
wrote:
> Hey,
>
> Op 04-06-13 20:38, Ilia Mirkin schreef:
>> On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin wrote:
>>> These chipsets include the VP2 engine which is composed of a bitstream
>>> processor (BSP) that decodes H.264 and a video processor
Hey,
Op 04-06-13 20:38, Ilia Mirkin schreef:
> On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin wrote:
>> These chipsets include the VP2 engine which is composed of a bitstream
>> processor (BSP) that decodes H.264 and a video processor (VP) which can
>> do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-
On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin wrote:
> These chipsets include the VP2 engine which is composed of a bitstream
> processor (BSP) that decodes H.264 and a video processor (VP) which can
> do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-1. Both of these are
> driven by separate xtensa ch
On Mon, Jun 3, 2013 at 5:02 AM, Ilia Mirkin wrote:
> These chipsets include the VP2 engine which is composed of a bitstream
> processor (BSP) that decodes H.264 and a video processor (VP) which can
> do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-1. Both of these are
> driven by separate xtensa ch
These chipsets include the VP2 engine which is composed of a bitstream
processor (BSP) that decodes H.264 and a video processor (VP) which can
do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-1. Both of these are
driven by separate xtensa chips embedded in the hardware. This patch
provides the mechan
These chipsets include the VP2 engine which is composed of a bitstream
processor (BSP) that decodes H.264 and a video processor (VP) which can
do iDCT/mo-comp/etc for MPEG1/2, H.264, and VC-1. Both of these are
driven by separate xtensa chips embedded in the hardware. This patch
provides the mechan
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