On Mon, 8 Nov 2021 09:17:23 -0800, Rob Clark wrote:
> From: Rob Clark
>
> It is a 64b register, lets not lose the upper bits.
>
>
Applied to will (for-joerg/arm-smmu/updates), thanks!
[1/1] iommu/arm-smmu-qcom: Fix TTBR0 read
https://git.kernel.org/will/c/c31112fbd407
Cheers,
--
Will
On Mon 08 Nov 09:17 PST 2021, Rob Clark wrote:
> From: Rob Clark
>
> It is a 64b register, lets not lose the upper bits.
>
> Fixes: ab5df7b953d8 ("iommu/arm-smmu-qcom: Add an adreno-smmu-priv callback
> to get pagefault info")
> Signed-off-by: Rob Clark
Reviewed-by: Bjorn Andersson
Regards
From: Rob Clark
It is a 64b register, lets not lose the upper bits.
Fixes: ab5df7b953d8 ("iommu/arm-smmu-qcom: Add an adreno-smmu-priv callback to
get pagefault info")
Signed-off-by: Rob Clark
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)