On Tue, Feb 28, 2012 at 09:08:17AM +0100, Jean Delvare wrote:
> On Tue, 28 Feb 2012 00:39:39 +0100, Daniel Vetter wrote:
> > i915 has a hw i2c controller (gmbus) but for a bunch of stupid reasons
> > we need to be able to fall back to the bit-banging algo on gpio pins.
> >
> > The current code set
On Tue, Feb 28, 2012 at 09:08:17AM +0100, Jean Delvare wrote:
> On Tue, 28 Feb 2012 00:39:39 +0100, Daniel Vetter wrote:
> > i915 has a hw i2c controller (gmbus) but for a bunch of stupid reasons
> > we need to be able to fall back to the bit-banging algo on gpio pins.
> >
> > The current code set
On Tue, 28 Feb 2012 00:39:39 +0100, Daniel Vetter wrote:
> i915 has a hw i2c controller (gmbus) but for a bunch of stupid reasons
> we need to be able to fall back to the bit-banging algo on gpio pins.
>
> The current code sets up a 2nd i2c controller for the same i2c bus using
> the bit-banging a
i915 has a hw i2c controller (gmbus) but for a bunch of stupid reasons
we need to be able to fall back to the bit-banging algo on gpio pins.
The current code sets up a 2nd i2c controller for the same i2c bus using
the bit-banging algo. This has a bunch of issues, the major one being
that userspace
On Tue, 28 Feb 2012 00:39:39 +0100, Daniel Vetter wrote:
> i915 has a hw i2c controller (gmbus) but for a bunch of stupid reasons
> we need to be able to fall back to the bit-banging algo on gpio pins.
>
> The current code sets up a 2nd i2c controller for the same i2c bus using
> the bit-banging a
i915 has a hw i2c controller (gmbus) but for a bunch of stupid reasons
we need to be able to fall back to the bit-banging algo on gpio pins.
The current code sets up a 2nd i2c controller for the same i2c bus using
the bit-banging algo. This has a bunch of issues, the major one being
that userspace
