On 12/03/2024, Nikolaus Voss wrote:
> On 03.12.2024 03:22, Liu Ying wrote:
>> On 12/02/2024, Nikolaus Voss wrote:
>>> [You don't often get email from n...@vosn.de. Learn why this is important
>>> at https://aka.ms/LearnAboutSenderIdentification ]
>>>
>>> Hi Liu,
>>
>> Hi,
>>
>>>
>>> On 02.12.2024
Hi Marek,
On 09.12.2024 22:46, Marek Vasut wrote:
On 12/9/24 9:46 AM, Nikolaus Voss wrote:
and store the panel's timing in EDID EEPROM.
Oh, that is a new one. Does the EDID EEPROM store the entirety of
'struct display_timing {}' somehow , or is that a custom format ?
Well, sort of ;-). VESA
On 12/9/24 9:46 AM, Nikolaus Voss wrote:
Hi,
and store the panel's timing in EDID EEPROM.
Oh, that is a new one. Does the EDID EEPROM store the entirety of
'struct display_timing {}' somehow , or is that a custom format ?
Well, sort of ;-). VESA has taken care of this 30 years ago
(https://e
Am Montag, dem 02.12.2024 um 11:13 +0100 schrieb Nikolaus Voss:
> Hi Liu,
>
> On 02.12.2024 07:32, Liu Ying wrote:
> > On 11/27/2024, Nikolaus Voss wrote:
> > > LDB clock has to be a fixed multiple of the pixel clock.
> > > As LDB and pixel clock are derived from different clock sources
> > > (at
Hi Marek,
On 07.12.2024 12:30, Marek Vasut wrote:
On 12/4/24 11:55 AM, Nikolaus Voss wrote:
I doubt that pixel clock tree cannot find appropriate division
ratios
for some pixel clock rates, especially for dual-link LVDS on
i.MX8MP
and i.MX93 platforms, because PLL clock rate should be 7x faste
On 12/4/24 11:55 AM, Nikolaus Voss wrote:
Hi Marek,
Hi,
I doubt that pixel clock tree cannot find appropriate division
ratios
for some pixel clock rates, especially for dual-link LVDS on i.MX8MP
and i.MX93 platforms, because PLL clock rate should be 7x faster
than
pixel clock rate and 2x f
Hi Marek,
On 04.12.2024 00:40, Marek Vasut wrote:
On 12/3/24 8:20 AM, Nikolaus Voss wrote:
On 03.12.2024 04:12, Marek Vasut wrote:
On 12/3/24 3:22 AM, Liu Ying wrote:
[...]
I doubt that pixel clock tree cannot find appropriate division
ratios
for some pixel clock rates, especially for dual-
On 12/3/24 8:20 AM, Nikolaus Voss wrote:
On 03.12.2024 04:12, Marek Vasut wrote:
On 12/3/24 3:22 AM, Liu Ying wrote:
[...]
I doubt that pixel clock tree cannot find appropriate division ratios
for some pixel clock rates, especially for dual-link LVDS on i.MX8MP
and i.MX93 platforms, because P
On 03.12.2024 03:22, Liu Ying wrote:
On 12/02/2024, Nikolaus Voss wrote:
[You don't often get email from n...@vosn.de. Learn why this is
important at https://aka.ms/LearnAboutSenderIdentification ]
Hi Liu,
Hi,
On 02.12.2024 07:32, Liu Ying wrote:
On 11/27/2024, Nikolaus Voss wrote:
LDB
On 03.12.2024 04:12, Marek Vasut wrote:
On 12/3/24 3:22 AM, Liu Ying wrote:
[...]
I doubt that pixel clock tree cannot find appropriate division
ratios
for some pixel clock rates, especially for dual-link LVDS on i.MX8MP
and i.MX93 platforms, because PLL clock rate should be 7x faster
than
On 12/3/24 3:22 AM, Liu Ying wrote:
[...]
I doubt that pixel clock tree cannot find appropriate division ratios
for some pixel clock rates, especially for dual-link LVDS on i.MX8MP
and i.MX93 platforms, because PLL clock rate should be 7x faster than
pixel clock rate and 2x faster than "ldb" cl
On 12/02/2024, Nikolaus Voss wrote:
> [You don't often get email from n...@vosn.de. Learn why this is important at
> https://aka.ms/LearnAboutSenderIdentification ]
>
> Hi Liu,
Hi,
>
> On 02.12.2024 07:32, Liu Ying wrote:
>> On 11/27/2024, Nikolaus Voss wrote:
>>> LDB clock has to be a fixed m
On 02.12.2024 13:56, Marek Vasut wrote:
On 12/2/24 7:32 AM, Liu Ying wrote:
On 11/27/2024, Nikolaus Voss wrote:
LDB clock has to be a fixed multiple of the pixel clock.
As LDB and pixel clock are derived from different clock sources
(at least on imx8mp), this constraint cannot be satisfied for
On 12/2/24 6:03 PM, Nikolaus Voss wrote:
On 02.12.2024 13:56, Marek Vasut wrote:
On 12/2/24 7:32 AM, Liu Ying wrote:
On 11/27/2024, Nikolaus Voss wrote:
LDB clock has to be a fixed multiple of the pixel clock.
As LDB and pixel clock are derived from different clock sources
(at least on imx8mp)
On 12/2/24 7:32 AM, Liu Ying wrote:
On 11/27/2024, Nikolaus Voss wrote:
LDB clock has to be a fixed multiple of the pixel clock.
As LDB and pixel clock are derived from different clock sources
(at least on imx8mp), this constraint cannot be satisfied for
any pixel clock, which leads to flickerin
Hi Liu,
On 02.12.2024 07:32, Liu Ying wrote:
On 11/27/2024, Nikolaus Voss wrote:
LDB clock has to be a fixed multiple of the pixel clock.
As LDB and pixel clock are derived from different clock sources
(at least on imx8mp), this constraint cannot be satisfied for
any pixel clock, which leads to
On 11/27/2024, Nikolaus Voss wrote:
> LDB clock has to be a fixed multiple of the pixel clock.
> As LDB and pixel clock are derived from different clock sources
> (at least on imx8mp), this constraint cannot be satisfied for
> any pixel clock, which leads to flickering and incomplete
> lines on the
Hi Dmitry,
On Sat, 30 Nov 2024, Dmitry Baryshkov wrote:
On Tue, Nov 26, 2024 at 04:45:54PM +0100, Nikolaus Voss wrote:
LDB clock has to be a fixed multiple of the pixel clock.
As LDB and pixel clock are derived from different clock sources
(at least on imx8mp), this constraint cannot be satisfi
On Sat, Nov 30, 2024 at 07:57:17PM +0100, Nikolaus Voss wrote:
> Hi Dmitry,
>
> On Sat, 30 Nov 2024, Dmitry Baryshkov wrote:
> > On Tue, Nov 26, 2024 at 04:45:54PM +0100, Nikolaus Voss wrote:
> > > LDB clock has to be a fixed multiple of the pixel clock.
> > > As LDB and pixel clock are derived fr
On Tue, Nov 26, 2024 at 04:45:54PM +0100, Nikolaus Voss wrote:
> LDB clock has to be a fixed multiple of the pixel clock.
> As LDB and pixel clock are derived from different clock sources
> (at least on imx8mp), this constraint cannot be satisfied for
> any pixel clock, which leads to flickering an
LDB clock has to be a fixed multiple of the pixel clock.
As LDB and pixel clock are derived from different clock sources
(at least on imx8mp), this constraint cannot be satisfied for
any pixel clock, which leads to flickering and incomplete
lines on the attached display.
To overcome this, check th
+Cc: Miquèl, who is actively working on imx8mp video clock rates.
On Tue, 26 Nov 2024 16:45:54 +0100
Nikolaus Voss wrote:
> LDB clock has to be a fixed multiple of the pixel clock.
> As LDB and pixel clock are derived from different clock sources
> (at least on imx8mp), this constraint cannot be
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