Re: [PATCH] drm/stm: dsi: compute the transition time from LP to HS and back

2021-07-19 Thread Philippe CORNU
On 7/13/21 6:47 PM, Philippe CORNU wrote: Hi Antonio, On 7/13/21 4:49 PM, Antonio Borneo wrote: The driver uses a conservative set of hardcoded values for the maximum time delay of the transitions between LP and HS, either for data and clock lanes. By using the info in STM32MP157 datasheet,

Re: [PATCH] drm/stm: dsi: compute the transition time from LP to HS and back

2021-07-13 Thread Philippe CORNU
Hi Antonio, On 7/13/21 4:49 PM, Antonio Borneo wrote: The driver uses a conservative set of hardcoded values for the maximum time delay of the transitions between LP and HS, either for data and clock lanes. By using the info in STM32MP157 datasheet, valid also for other ST devices, compute the

[PATCH] drm/stm: dsi: compute the transition time from LP to HS and back

2021-07-13 Thread Antonio Borneo
The driver uses a conservative set of hardcoded values for the maximum time delay of the transitions between LP and HS, either for data and clock lanes. By using the info in STM32MP157 datasheet, valid also for other ST devices, compute the actual delay from the lane's bps. Signed-off-by: Antonio