This change includes the generated file of the following:
rnndb: Add 28nm PLL register description
Each interface (DSI/eDP/HDMI) has to control its own PLL.
This change only add the register description for each one of them.
Let's not make the register description common as some
This change includes the generated file of the following:
rnndb: Add 28nm PLL register description
Each interface (DSI/eDP/HDMI) has to control its own PLL.
This change only add the register description for each one of them.
Let's not make the register description common as some