[PATCH] drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHY

2015-09-11 Thread Hai Li
The current settings for 28nm PHY data lane CFG4 registers do not work with certain panels. This change is to modify them to hw recommended values. Signed-off-by: Hai Li --- drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drive

[PATCH] drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHY

2015-09-11 Thread Hai Li
The current settings for 28nm PHY data lane CFG4 registers do not work with certain panels. This change is to modify them to hw recommended values. Signed-off-by: Hai Li --- drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drive