[Intel-gfx] [PATCH] drm/i915: Fix RC6VIDS encode/devoce

2013-02-04 Thread Daniel Vetter
On Fri, Feb 01, 2013 at 04:41:14PM -0800, Ben Widawsky wrote: > The RC6 VIDS has a linear ramp starting at 250mv, which means any values > below 250 are invalid. The old buggy macros tried to adjust for this to > be more flexible, but there is no need. As Dan pointed out the ENCODE > only ever has

Re: [Intel-gfx] [PATCH] drm/i915: Fix RC6VIDS encode/devoce

2013-02-04 Thread Daniel Vetter
On Fri, Feb 01, 2013 at 04:41:14PM -0800, Ben Widawsky wrote: > The RC6 VIDS has a linear ramp starting at 250mv, which means any values > below 250 are invalid. The old buggy macros tried to adjust for this to > be more flexible, but there is no need. As Dan pointed out the ENCODE > only ever has

[PATCH] drm/i915: Fix RC6VIDS encode/devoce

2013-02-01 Thread Ben Widawsky
The RC6 VIDS has a linear ramp starting at 250mv, which means any values below 250 are invalid. The old buggy macros tried to adjust for this to be more flexible, but there is no need. As Dan pointed out the ENCODE only ever has one value. The only invalid value for decode is an input of 0 which me

[PATCH] drm/i915: Fix RC6VIDS encode/devoce

2013-02-01 Thread Ben Widawsky
The RC6 VIDS has a linear ramp starting at 250mv, which means any values below 250 are invalid. The old buggy macros tried to adjust for this to be more flexible, but there is no need. As Dan pointed out the ENCODE only ever has one value. The only invalid value for decode is an input of 0 which me