Re: [PATCH] drm/bridge: tc358767: Fix odd pixel alignment

2024-11-18 Thread Marek Vasut
On 11/18/24 4:19 PM, Maxime Ripard wrote: On Mon, Oct 28, 2024 at 03:49:42PM +0100, Marek Vasut wrote: On 10/28/24 2:52 PM, Maxime Ripard wrote: On Mon, Oct 28, 2024 at 01:36:58PM +0100, Marek Vasut wrote: On 10/28/24 10:25 AM, Maxime Ripard wrote: On Sat, Oct 26, 2024 at 06:10:01AM +0200, Ma

Re: [PATCH] drm/bridge: tc358767: Fix odd pixel alignment

2024-11-18 Thread Maxime Ripard
On Mon, Oct 28, 2024 at 03:49:42PM +0100, Marek Vasut wrote: > On 10/28/24 2:52 PM, Maxime Ripard wrote: > > On Mon, Oct 28, 2024 at 01:36:58PM +0100, Marek Vasut wrote: > > > On 10/28/24 10:25 AM, Maxime Ripard wrote: > > > > On Sat, Oct 26, 2024 at 06:10:01AM +0200, Marek Vasut wrote: > > > > > H

Re: [PATCH] drm/bridge: tc358767: Fix odd pixel alignment

2024-10-28 Thread Marek Vasut
On 10/28/24 2:52 PM, Maxime Ripard wrote: On Mon, Oct 28, 2024 at 01:36:58PM +0100, Marek Vasut wrote: On 10/28/24 10:25 AM, Maxime Ripard wrote: On Sat, Oct 26, 2024 at 06:10:01AM +0200, Marek Vasut wrote: Horizontal Timing Control0 Register 1/2 (HTIM01/HTIM02) Register bitfields description

Re: [PATCH] drm/bridge: tc358767: Fix odd pixel alignment

2024-10-28 Thread Maxime Ripard
On Mon, Oct 28, 2024 at 01:36:58PM +0100, Marek Vasut wrote: > On 10/28/24 10:25 AM, Maxime Ripard wrote: > > On Sat, Oct 26, 2024 at 06:10:01AM +0200, Marek Vasut wrote: > > > Horizontal Timing Control0 Register 1/2 (HTIM01/HTIM02) Register > > > bitfields description state "These bits must be mul

Re: [PATCH] drm/bridge: tc358767: Fix odd pixel alignment

2024-10-28 Thread Maxime Ripard
On Mon, Oct 28, 2024 at 02:52:09PM +0100, Maxime Ripard wrote: > On Mon, Oct 28, 2024 at 01:36:58PM +0100, Marek Vasut wrote: > > On 10/28/24 10:25 AM, Maxime Ripard wrote: > > > On Sat, Oct 26, 2024 at 06:10:01AM +0200, Marek Vasut wrote: > > > > Horizontal Timing Control0 Register 1/2 (HTIM01/HTI

Re: [PATCH] drm/bridge: tc358767: Fix odd pixel alignment

2024-10-28 Thread Marek Vasut
On 10/28/24 10:25 AM, Maxime Ripard wrote: On Sat, Oct 26, 2024 at 06:10:01AM +0200, Marek Vasut wrote: Horizontal Timing Control0 Register 1/2 (HTIM01/HTIM02) Register bitfields description state "These bits must be multiple of even pixel". It is not possible to simply align every bitfield to t

Re: [PATCH] drm/bridge: tc358767: Fix odd pixel alignment

2024-10-28 Thread Maxime Ripard
On Sat, Oct 26, 2024 at 06:10:01AM +0200, Marek Vasut wrote: > Horizontal Timing Control0 Register 1/2 (HTIM01/HTIM02) Register > bitfields description state "These bits must be multiple of even > pixel". It is not possible to simply align every bitfield to the > nearest even pixel, because that wo

[PATCH] drm/bridge: tc358767: Fix odd pixel alignment

2024-10-25 Thread Marek Vasut
Horizontal Timing Control0 Register 1/2 (HTIM01/HTIM02) Register bitfields description state "These bits must be multiple of even pixel". It is not possible to simply align every bitfield to the nearest even pixel, because that would unalign the line width and cause visible distortion. Instead, att