On 2020-04-23 17:26, Stephen Boyd wrote:
Quoting Tanmay Shah (2020-03-31 17:30:30)
diff --git a/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
b/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
new file mode 100644
index 000..aa845d0
--- /dev/null
+++ b/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
@@ -0,0 +
Quoting Tanmay Shah (2020-03-31 17:30:30)
> diff --git a/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
> b/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
> new file mode 100644
> index 000..aa845d0
> --- /dev/null
> +++ b/drivers/gpu/drm/msm/dp/pll/dp_pll_10nm.c
> @@ -0,0 +1,401 @@
> +// SPDX-License-Ide
From: Chandan Uddaraju
Add the needed DP PLL specific files to support
display port interface on msm targets.
The DP driver calls the DP PLL driver registration.
The DP driver sets the link and pixel clock sources.
Changes in v2:
-- Update copyright markings on all relevant files.
-- Use DRM_DE
