Radeon driver failed to work on PAE kernel with memory over 4G?

Hi all: I'm using Ubunut10.10 with kernel 2.6.35-23-generic-pae (4G ddr3 memory) and try to use radeon driver, but failed. Can radeon driver support PAE kernel with memory over 4G? Thanks [ 20.344777] [ cut here ] [ 20.344812] WARNING: at /build/buildd/linux-2.6.35/

Radeon driver failed to work on PAE kernel with memory over 4G?

Hi all: I'm using Ubunut10.10 with kernel 2.6.35-23-generic-pae (4G ddr3 memory) and try to use radeon driver, but failed. Can radeon driver support PAE kernel with memory over 4G? Thanks [ 20.344777] [ cut here ] [ 20.344812] WARNING: at /build/buildd/linux-2.6.35/

Problems when try to alloc user bo using TTM

ed) return 0; 2. Page number may not be the size it rounded up. eg. supports allocate a user space BO size=5K, which round up to 2 pages,but it should be 3, if the user space memory like this page1 page2 page3 ___ |_|_|_|_| |<>| 5k Thanks april

Problems when try to alloc user bo using TTM

ed) return 0; 2. Page number may not be the size it rounded up. eg. supports allocate a user space BO size=5K, which round up to 2 pages,but it should be 3, if the user space memory like this page1 page2 page3 ___ |_|_|_|_|

[PATCH] Mapping snooped user pages into the GTT

Dear Chris: what do u mean " blit between snooped and unsnooped memory"? It seems you want to map user-space pixmap to GTT space, and use 2d copy to do upload/download? TTM can map user space memory to GTT aperture by using "ttm_bo_type_user", but no dirver use it yet.?? Thanks 2011/1/8 Chris

Re: [PATCH] Mapping snooped user pages into the GTT

Dear Chris: what do u mean " blit between snooped and unsnooped memory"? It seems you want to map user-space pixmap to GTT space, and use 2d copy to do upload/download? TTM can map user space memory to GTT aperture by using "ttm_bo_type_user", but no dirver use it yet.?? Thanks 2011/1/8 Chris

seems ttm_bo_handle_move_mem not flush cache, if BO move SYS->VRAM?

page's cache flush is really needed(CPU just write to a few pages in BO). Is there any ways to solve this? or there's no need to do this? (clflush those pages that not in cpu cache not cost too much?) Thank you 2010/12/2 Thomas Hellstrom : > On 12/01/2010 04:58 AM, april wrote:

Re: seems ttm_bo_handle_move_mem not flush cache, if BO move SYS->VRAM?

page's cache flush is really needed(CPU just write to a few pages in BO). Is there any ways to solve this? or there's no need to do this? (clflush those pages that not in cpu cache not cost too much?) Thank you 2010/12/2 Thomas Hellstrom : > On 12/01/2010 04:58 AM, april wrote:

seems ttm_bo_handle_move_mem not flush cache, if BO move SYS->VRAM?

hi all: I have a question: If a BO in VRAM (WC) evict to SYS memory(may be cached), and user process still can access it event it is in SYS memory (may be cached) . when this BO volidate to VRAM, It seems "ttm_bo_handle_move_mem" not flush cache (If evict to SYS memory with cached). But flu

seems ttm_bo_handle_move_mem not flush cache, if BO move SYS->VRAM?

hi all: I have a question: If a BO in VRAM (WC) evict to SYS memory(may be cached), and user process still can access it event it is in SYS memory (may be cached) . when this BO volidate to VRAM, It seems "ttm_bo_handle_move_mem" not flush cache (If evict to SYS memory with cached). But flus

How to clear WC buffer, or is it needs to clear WC buffer

Hi all: I have a problem. I want to make a command buffer in PCIE memory, and make Engine execute those commands. First set PCIE memory to be WC, copy command to command buffer in PCIE memory, and make HW to execute those commands. sometimes, the Graphic engine will hang. I try to use mb()

Re: How to clear WC buffer, or is it needs to clear WC buffer

Hi all: I have a problem. I want to make a command buffer in PCIE memory, and make Engine execute those commands. First set PCIE memory to be WC, copy command to command buffer in PCIE memory, and make HW to execute those commands. sometimes, the Graphic engine will hang. I try to use mb()