[v4 23/23] drm/doc/rfc: Add documentation for multi-segmented 1D LUT

Add documentation to explain properties of the exposed hardware 1D LUT blocks, its identification and computation of the LUT samples based on the number of samples, their distribution and precison. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- Documentation/gpu/rfc

[v4 20/23] drm/i915/color: Program Pre-CSC registers

Add callback for programming Pre-CSC LUT for TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v4 04/23] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 64

[v4 08/23] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[v4 09/23] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h| 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm

[v4 16/23] drm/i915/color: Add plane CTM callback for D13 and beyond

Add callback for setting CTM block in platforms D13 and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c

[v4 03/23] drm: Add Enhanced LUT precision structure

Existing LUT precision structure is having only 16 bit precision. This is not enough for upcoming enhanced hardwares and advance usecases like HDR processing. Hence added a new structure with 32 bit precision values. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers

[v4 17/23] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 53 +++ 1 file changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v4 22/23] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add ability to program it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[v4 21/23] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 109 + 1 file changed, 109 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v4 19/23] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 73 +++ 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v4 18/23] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 27 ++ drivers/gpu/drm/i915/display/intel_color.h | 2

[v4 15/23] drm/i915/color: Add new color callbacks for Xelpd

From: Chaitanya Kumar Borah Since we intend to add plane color callbacks from Xelpd(D13 and beyond), create a different structure for it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 15 ++- 1 file changed, 14

[v4 11/23] drm/i915/color: Create a transfer function color pipeline

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT MULTSEG - CTM - 1D LUT MULTSEG This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu

[v4 14/23] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 23 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++- 2 files

[v4 13/23] drm/i915/color: Add framework to set colorop

From: Chaitanya Kumar Borah Add infrastructure to set colorop. We iterate through all the color ops in a selected COLOR PIPELINE and set them one by one. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 31

[v4 12/23] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 42 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[v4 10/23] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 39 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 42 insertions(+) diff

[v4 00/23] Plane Color Pipeline support for Intel platforms

drm/i915/color: Add framework to program PRE/POST CSC LUT drm/i915/color: Enable Plane Color Pipelines Harry Wentland (1): drm: color pipeline base work Uma Shankar (10): drm: Add Enhanced LUT precision structure drm: Add Color lut range attributes drm: Add Color ops capability prop

[v4 07/23] drm: Define helper to initialize segmented 1D LUT

: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 68 +++ include/drm/drm_colorop.h | 4 +++ 2 files changed, 72 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 7aa572f74193

[v4 06/23] drm: Add 1D LUT multi-segmented color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional multi segmented Look Up Tables. v2: Fixed the documentation for Multi segmented lut (Dmitry) Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c

[v4 05/23] drm: Add Color ops capability property

ion for hw_caps blob (Dmitry) Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ include/drm/drm_colorop.h | 17 + 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/

[v4 02/23] drm: Add support for 3x3 CTM

From: Chaitanya Kumar Borah Add support for 3x3 Color Transformation Matrices in Color Pipeline. v2: Updated the documentation for 3x3 CTM colorop (Dmitry) Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 3 +++ drivers/gpu/drm

[v3 04/23] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 64

[v3 16/23] drm/i915/color: Add plane CTM callback for D13 and beyond

Add callback for setting CTM block in platforms D13 and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c

[v3 23/23] drm/doc/rfc: Add documentation for multi-segmented 1D LUT

Add documentation to explain properties of the exposed hardware 1D LUT blocks, its identification and computation of the LUT samples based on the number of samples, their distribution and precison. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- Documentation/gpu/rfc

[v3 19/23] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 73 +++ 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v3 22/23] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add ability to program it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[v3 21/23] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 109 + 1 file changed, 109 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v3 20/23] drm/i915/color: Program Pre-CSC registers

Add callback for programming Pre-CSC LUT for TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v3 18/23] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 27 ++ drivers/gpu/drm/i915/display/intel_color.h | 2

[v3 12/23] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 42 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[v3 17/23] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 53 +++ 1 file changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v3 15/23] drm/i915/color: Add new color callbacks for Xelpd

From: Chaitanya Kumar Borah Since we intend to add plane color callbacks from Xelpd(D13 and beyond), create a different structure for it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 15 ++- 1 file changed, 14

[v3 13/23] drm/i915/color: Add framework to set colorop

From: Chaitanya Kumar Borah Add infrastructure to set colorop. We iterate through all the color ops in a selected COLOR PIPELINE and set them one by one. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 31

[v3 14/23] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 23 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++- 2 files

[v3 11/23] drm/i915/color: Create a transfer function color pipeline

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT MULTSEG - CTM - 1D LUT MULTSEG This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu

[v3 10/23] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 39 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 42 insertions(+) diff

[v3 09/23] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h| 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm

[v3 08/23] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[v3 05/23] drm: Add Color ops capability property

ion for hw_caps blob (Dmitry) Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ include/drm/drm_colorop.h | 17 + 2 files changed, 20 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/

[v3 07/23] drm: Define helper to initialize segmented 1D LUT

: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 68 +++ include/drm/drm_colorop.h | 4 +++ 2 files changed, 72 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c index 7aa572f74193

[v3 06/23] drm: Add 1D LUT multi-segmented color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional multi segmented Look Up Tables. v2: Fixed the documentation for Multi segmented lut (Dmitry) Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c

[v3 03/23] drm: Add Enhanced LUT precision structure

Existing LUT precision structure is having only 16 bit precision. This is not enough for upcoming enhanced hardwares and advance usecases like HDR processing. Hence added a new structure with 32 bit precision values. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers

[v3 02/23] drm: Add support for 3x3 CTM

From: Chaitanya Kumar Borah Add support for 3x3 Color Transformation Matrices in Color Pipeline. v2: Updated the documentation for 3x3 CTM colorop (Dmitry) Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 3 +++ drivers/gpu/drm

[v3 00/23] Plane Color Pipeline support for Intel platforms

m PRE/POST CSC LUT drm/i915/color: Enable Plane Color Pipelines Harry Wentland (1): drm: color pipeline base work Uma Shankar (10): drm: Add Enhanced LUT precision structure drm: Add Color lut range attributes drm: Add Color ops capability property drm: Define helper to initialize segmen

[v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT

Add documentation to explain properties of the exposed hardware 1D LUT blocks, its identification and computation of the LUT samples based on the number of samples, their distribution and precison. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- Documentation/gpu/rfc

[v2 24/25] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add ability to program it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 109 + 1 file changed, 109 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v2 22/25] drm/i915/color: Program Pre-CSC registers

Add callback for programming Pre-CSC LUT for TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v2 21/25] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 73 +++ 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 27 ++ drivers/gpu/drm/i915/display/intel_color.h | 2

[v2 19/25] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 53 +++ 1 file changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v2 17/25] drm/i915/color: Add new color callbacks for Xelpd

From: Chaitanya Kumar Borah Since we intend to add plane color callbacks from Xelpd(D13 and beyond), create a different structure for it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 15 ++- 1 file changed, 14

[v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond

Add callback for setting CTM block in platforms D13 and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c

[v2 16/25] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 23 ++ drivers/gpu/drm/i915/display/intel_color.h | 2 ++ 2 files

[v2 15/25] drm/i915/color: Add framework to set colorop

From: Chaitanya Kumar Borah Add infrastructure to set colorop. We iterate through all the color ops in a selected COLOR PIPELINE and set them one by one. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 31

[v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 42 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[v2 13/25] drm/i915/color: Create a transfer function color pipeline

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT MULTSEG - CTM - 1D LUT MULTSEG This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu

[v2 12/25] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 39 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 42 insertions(+) diff

[v2 11/25] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h| 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm

[v2 09/25] drm: Add helper to initialize segmented 1D LUT

From: Chaitanya Kumar Borah Add helper to initialize 1D segmented LUT Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 27 ++- include/drm/drm_colorop.h | 4 2 files changed, 30 insertions(+), 1 deletion

[v2 10/25] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[v2 04/25] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 64

[v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG

This adds helper functions to create 1D multi-segmented Lut color block capabilities. It exposes the hardware block as segments which are converted to blob and passed in the property. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 24

[v2 07/25] drm: Add 1D LUT multi-segmented color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional multi segmented Look Up Tables. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 4 drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ include

[v2 03/25] drm: Add Enhanced LUT precision structure

Existing LUT precision structure is having only 16 bit precision. This is not enough for upcoming enhanced hardwares and advance usecases like HDR processing. Hence added a new structure with 32 bit precision values. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers

[v2 05/25] drm: Add Color ops capability property

Add capability property which a colorop can expose it's hardware's abilities. It's a blob property that can be filled with respective data structures depending on the colorop. The user space is expected to read this property and program the colorop accordingly. Signed-off-by: Uma

[v2 02/25] drm: Add support for 3x3 CTM

From: Chaitanya Kumar Borah Add support for 3x3 Color Transformation Matrices in Color Pipeline. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 3 +++ drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ drivers/gpu/drm/drm_colorop.c | 29

[v2 06/25] drm: Define helper to create color ops capability property

Add a helper to create capability property for a colorop Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_colorop.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c

[v2 00/25] Plane Color Pipeline support for Intel platforms

ork to set colorop drm/i915/color: Add callbacks to set plane CTM drm/i915/color: Add new color callbacks for Xelpd drm/i915/color: Add framework to program PRE/POST CSC LUT drm/i915/color: Enable Plane Color Pipelines Harry Wentland (1): [NOT FOR REVIEW] drm: color pipeline base work Uma S

[PATCH 28/28] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add capability to program it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[PATCH 27/28] FIXME: force disable legacy plane color properties for TGL and beyond

From: Chaitanya Kumar Borah The decision should be made based on the DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE. Right now the value of this cap is not passed on to the driver. Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 14 -- 1 file chan

[PATCH 26/28] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers

[PATCH 25/28] drm/i915/color: Program Pre-CSC registers

Add callback for programming Pre-CSC LUT for TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[PATCH 24/28] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/i915_reg.h | 73 + 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[PATCH 23/28] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 27 ++ drivers/gpu/drm/i915/display/intel_color.h | 2

[PATCH 22/28] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/i915_reg.h | 51 + 1 file changed, 51 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[PATCH 21/28] drm/i915/color: Add plane CTM callback for TGL and beyond

Add callback for setting CTM block in platforms TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c

[PATCH 20/28] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 22 ++ drivers/gpu/drm/i915/display/intel_color.h | 2 ++ 2 files

[PATCH 19/28] drm/i915/color: Add framework to set colorop

From: Chaitanya Kumar Borah Add infrastructure to set colorop. We iterate through all the color ops in a selected COLOR PIPELINE and set them one by one. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 31

[PATCH 18/28] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 37 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[PATCH 17/28] drm/i915: Define segmented Lut and add capabilities to colorop

This defines the lut segments and create the color pipeline Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 109 + 1 file changed, 109 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[PATCH 16/28] drm/i915/color: Create a transfer function color pipeline

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT - CTM - 1D LUT This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display

[PATCH 15/28] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 14 ++ drivers/gpu/drm/i915/display/intel_color.h | 2 ++ 2 files changed, 16 insertions(+) diff --git a

[PATCH 14/28] drm/i915/color: Add helper to allocate intel colorop

From: Chaitanya Kumar Borah Add helper to allocate memory for intel colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 25 ++ drivers/gpu/drm/i915/display/intel_color.h | 1 + 2 files changed, 26

[PATCH 13/28] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../gpu/drm/i915/display/intel_display_types.h | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm

[PATCH 12/28] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[PATCH 11/28] drm: Define helper for adding capability property for 1D LUT

This adds helper functions to create 1D Lut color block capabilities. It exposes the hardware block as segments which are converted to blob and passed in the property. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 24

[PATCH 10/28] drm: Define helper to create color ops capability property

Add a helper to create capability property for a colorop Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_colorop.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c

[PATCH 09/28] drm: Add Color ops capability property

Add capability property which a colorop can expose it's hardware's abilities. It's a blob property that can be filled with respective data structures depending on the colorop. The user space is expected to read this property and program the colorop accordingly. Signed-off-by: Uma

[PATCH 08/28] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 58

[PATCH 07/28] drm: Add 1D LUT color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional Look Up Tables. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ drivers/gpu/drm/drm_colorop.c | 2 +- include/uapi/drm/drm_mode.h

[PATCH 06/28] drm: Add Enhanced LUT precision structure

Existing LUT precision structure is having only 16 bit precision. This is not enough for upcoming enhanced hardwares and advance usecases like HDR processing. Hence added a new structure with 32 bit precision values. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include

[PATCH 05/28] drm: Add support for 3x3 CTM

From: Chaitanya Kumar Borah Add support for 3x3 Color Transformation Matrices in Color Pipeline. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ drivers/gpu/drm/drm_colorop.c | 2 +- include/uapi/drm/drm_mode.h | 1 + 3

[PATCH 04/28] drm: Fix error logging in set Color Pipeline

From: Chaitanya Kumar Borah Fix error logging in set Color Pipeline Note: This patch can be squashed with the following patch ("drm/colorop: Introduce DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE") [1] [1] https://patchwork.freedesktop.org/patch/566623/?series=123446&rev=3 Signed-off-by: Chaitanya Kum

[PATCH 03/28] drm: handle NULL next colorop in drm_colorop_set_next_property

From: Chaitanya Kumar Borah In scenarios, where there is only one colorop in a colorpipeline, the user of the helper drm_colorop_set_next_property could use it to set the next colorop as NULL explicitly. Make the helper handle this case. Note: This patch can be squashed with following patch ("d

[PATCH 02/28] drm: Add missing function declarations

From: Chaitanya Kumar Borah add missing declarations to avoid warnings. Note: This patch should be squashed with patches it fixes in the colorop series by Harry [1] ("drm/colorop: Introduce new drm_colorop mode object") [2] ("drm/plane: Add COLOR PIPELINE property") [3] [1] https://patchwork.f

[PATCH 01/28] [NOT FOR REVIEW] drm: color pipeline base work

nges and Intel specific pipeline changes. NOTE: This patch is not meant for review. Any review related to this patch should be done on the original series. In order not to diverge the discussion from the main series. Signed-off-by: Harry Wentland Signed-off-by: Chaitanya Kumar Borah Signed-off-by:

[PATCH 00/28] Plane Color Pipeline support for Intel platforms

erties for TGL and beyond drm/i915/color: Enable Plane Color Pipelines Harry Wentland (1): [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar (11): drm: Add Enhanced LUT precision structure drm: Add Color lut range attributes drm: Add Color ops capability property drm: Define

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