[v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT

Add documentation to explain properties of the exposed hardware 1D LUT blocks, its identification and computation of the LUT samples based on the number of samples, their distribution and precison. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- Documentation/gpu/rfc

[v2 24/25] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add ability to program it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 109 + 1 file changed, 109 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v2 22/25] drm/i915/color: Program Pre-CSC registers

Add callback for programming Pre-CSC LUT for TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[v2 21/25] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 73 +++ 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 27 ++ drivers/gpu/drm/i915/display/intel_color.h | 2

[v2 19/25] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- .../i915/display/skl_universal_plane_regs.h | 53 +++ 1 file changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b

[v2 17/25] drm/i915/color: Add new color callbacks for Xelpd

From: Chaitanya Kumar Borah Since we intend to add plane color callbacks from Xelpd(D13 and beyond), create a different structure for it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 15 ++- 1 file changed, 14

[v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond

Add callback for setting CTM block in platforms D13 and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c

[v2 16/25] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 23 ++ drivers/gpu/drm/i915/display/intel_color.h | 2 ++ 2 files

[v2 15/25] drm/i915/color: Add framework to set colorop

From: Chaitanya Kumar Borah Add infrastructure to set colorop. We iterate through all the color ops in a selected COLOR PIPELINE and set them one by one. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 31

[v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 42 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[v2 13/25] drm/i915/color: Create a transfer function color pipeline

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT MULTSEG - CTM - 1D LUT MULTSEG This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu

[v2 12/25] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 39 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 42 insertions(+) diff

[v2 11/25] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../drm/i915/display/intel_display_types.h| 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm

[v2 09/25] drm: Add helper to initialize segmented 1D LUT

From: Chaitanya Kumar Borah Add helper to initialize 1D segmented LUT Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 27 ++- include/drm/drm_colorop.h | 4 2 files changed, 30 insertions(+), 1 deletion

[v2 10/25] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[v2 04/25] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 64

[v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG

This adds helper functions to create 1D multi-segmented Lut color block capabilities. It exposes the hardware block as segments which are converted to blob and passed in the property. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 24

[v2 07/25] drm: Add 1D LUT multi-segmented color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional multi segmented Look Up Tables. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 4 drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ include

[v2 03/25] drm: Add Enhanced LUT precision structure

Existing LUT precision structure is having only 16 bit precision. This is not enough for upcoming enhanced hardwares and advance usecases like HDR processing. Hence added a new structure with 32 bit precision values. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers

[v2 05/25] drm: Add Color ops capability property

Add capability property which a colorop can expose it's hardware's abilities. It's a blob property that can be filled with respective data structures depending on the colorop. The user space is expected to read this property and program the colorop accordingly. Signed-off-by: Uma

[v2 02/25] drm: Add support for 3x3 CTM

From: Chaitanya Kumar Borah Add support for 3x3 Color Transformation Matrices in Color Pipeline. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic.c | 3 +++ drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ drivers/gpu/drm/drm_colorop.c | 29

[v2 06/25] drm: Define helper to create color ops capability property

Add a helper to create capability property for a colorop Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_colorop.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c

[v2 00/25] Plane Color Pipeline support for Intel platforms

ork to set colorop drm/i915/color: Add callbacks to set plane CTM drm/i915/color: Add new color callbacks for Xelpd drm/i915/color: Add framework to program PRE/POST CSC LUT drm/i915/color: Enable Plane Color Pipelines Harry Wentland (1): [NOT FOR REVIEW] drm: color pipeline base work Uma S

[PATCH 28/28] drm/i915/color: Enable Plane Color Pipelines

From: Chaitanya Kumar Borah Expose color pipeline and add capability to program it. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/display

[PATCH 27/28] FIXME: force disable legacy plane color properties for TGL and beyond

From: Chaitanya Kumar Borah The decision should be made based on the DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE. Right now the value of this cap is not passed on to the driver. Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 14 -- 1 file chan

[PATCH 26/28] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers

[PATCH 25/28] drm/i915/color: Program Pre-CSC registers

Add callback for programming Pre-CSC LUT for TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 88 ++ 1 file changed, 88 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[PATCH 24/28] drm/i915: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/i915_reg.h | 73 + 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[PATCH 23/28] drm/i915/color: Add framework to program PRE/POST CSC LUT

From: Chaitanya Kumar Borah Add framework that will help in loading LUT to Pre/Post CSC color blocks. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 27 ++ drivers/gpu/drm/i915/display/intel_color.h | 2

[PATCH 22/28] drm/i915: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/i915_reg.h | 51 + 1 file changed, 51 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915

[PATCH 21/28] drm/i915/color: Add plane CTM callback for TGL and beyond

Add callback for setting CTM block in platforms TGL and beyond Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 79 ++ 1 file changed, 79 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c

[PATCH 20/28] drm/i915/color: Add callbacks to set plane CTM

From: Chaitanya Kumar Borah Add callback to intel color functions for setting plane CTM. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 22 ++ drivers/gpu/drm/i915/display/intel_color.h | 2 ++ 2 files

[PATCH 19/28] drm/i915/color: Add framework to set colorop

From: Chaitanya Kumar Borah Add infrastructure to set colorop. We iterate through all the color ops in a selected COLOR PIPELINE and set them one by one. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 31

[PATCH 18/28] drm/i915/color: Add and attach COLORPIPELINE plane property

From: Chaitanya Kumar Borah Add supported color pipelines and attach it to plane. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 37 ++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed

[PATCH 17/28] drm/i915: Define segmented Lut and add capabilities to colorop

This defines the lut segments and create the color pipeline Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 109 + 1 file changed, 109 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b

[PATCH 16/28] drm/i915/color: Create a transfer function color pipeline

From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT - CTM - 1D LUT This pipeline can be used to do any color space conversion or HDR tone mapping Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display

[PATCH 15/28] drm/i915/color: Add helper to create intel colorop

From: Chaitanya Kumar Borah Add intel colorop create helper Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 14 ++ drivers/gpu/drm/i915/display/intel_color.h | 2 ++ 2 files changed, 16 insertions(+) diff --git a

[PATCH 14/28] drm/i915/color: Add helper to allocate intel colorop

From: Chaitanya Kumar Borah Add helper to allocate memory for intel colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 25 ++ drivers/gpu/drm/i915/display/intel_color.h | 1 + 2 files changed, 26

[PATCH 13/28] drm/i915: Add intel_color_op

From: Chaitanya Kumar Borah Add data structure to store intel specific details of colorop Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../gpu/drm/i915/display/intel_display_types.h | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm

[PATCH 12/28] drm/i915: Add identifiers for intel color blocks

From: Chaitanya Kumar Borah Add macros to identify intel color blocks. It will help in mapping drm_color_ops to intel color HW blocks Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_display_limits.h | 13 + 1 file changed, 13

[PATCH 11/28] drm: Define helper for adding capability property for 1D LUT

This adds helper functions to create 1D Lut color block capabilities. It exposes the hardware block as segments which are converted to blob and passed in the property. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_colorop.c | 24

[PATCH 10/28] drm: Define helper to create color ops capability property

Add a helper to create capability property for a colorop Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_colorop.c | 21 + 1 file changed, 21 insertions(+) diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c

[PATCH 09/28] drm: Add Color ops capability property

Add capability property which a colorop can expose it's hardware's abilities. It's a blob property that can be filled with respective data structures depending on the colorop. The user space is expected to read this property and program the colorop accordingly. Signed-off-by: Uma

[PATCH 08/28] drm: Add Color lut range attributes

This defines a new structure to define color lut ranges, along with related macro definitions and enums. This will help describe segmented lut ranges/PWL LUTs in the hardware. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 58

[PATCH 07/28] drm: Add 1D LUT color op

From: Chaitanya Kumar Borah Add support for color ops that can be programmed by 1 dimensional Look Up Tables. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ drivers/gpu/drm/drm_colorop.c | 2 +- include/uapi/drm/drm_mode.h

[PATCH 06/28] drm: Add Enhanced LUT precision structure

Existing LUT precision structure is having only 16 bit precision. This is not enough for upcoming enhanced hardwares and advance usecases like HDR processing. Hence added a new structure with 32 bit precision values. Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include

[PATCH 05/28] drm: Add support for 3x3 CTM

From: Chaitanya Kumar Borah Add support for 3x3 Color Transformation Matrices in Color Pipeline. Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_uapi.c | 3 +++ drivers/gpu/drm/drm_colorop.c | 2 +- include/uapi/drm/drm_mode.h | 1 + 3

[PATCH 04/28] drm: Fix error logging in set Color Pipeline

From: Chaitanya Kumar Borah Fix error logging in set Color Pipeline Note: This patch can be squashed with the following patch ("drm/colorop: Introduce DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE") [1] [1] https://patchwork.freedesktop.org/patch/566623/?series=123446&rev=3 Signed-off-by: Chaitanya Kum

[PATCH 03/28] drm: handle NULL next colorop in drm_colorop_set_next_property

From: Chaitanya Kumar Borah In scenarios, where there is only one colorop in a colorpipeline, the user of the helper drm_colorop_set_next_property could use it to set the next colorop as NULL explicitly. Make the helper handle this case. Note: This patch can be squashed with following patch ("d

[PATCH 02/28] drm: Add missing function declarations

From: Chaitanya Kumar Borah add missing declarations to avoid warnings. Note: This patch should be squashed with patches it fixes in the colorop series by Harry [1] ("drm/colorop: Introduce new drm_colorop mode object") [2] ("drm/plane: Add COLOR PIPELINE property") [3] [1] https://patchwork.f

[PATCH 01/28] [NOT FOR REVIEW] drm: color pipeline base work

nges and Intel specific pipeline changes. NOTE: This patch is not meant for review. Any review related to this patch should be done on the original series. In order not to diverge the discussion from the main series. Signed-off-by: Harry Wentland Signed-off-by: Chaitanya Kumar Borah Signed-off-by:

[PATCH 00/28] Plane Color Pipeline support for Intel platforms

erties for TGL and beyond drm/i915/color: Enable Plane Color Pipelines Harry Wentland (1): [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar (11): drm: Add Enhanced LUT precision structure drm: Add Color lut range attributes drm: Add Color ops capability property drm: Define

[RFC 29/33] drm/i915/xelpd: Program Plane Post CSC Registers

Extract the LUT and program plane post csc registers. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 95 +- 1 file changed, 94 insertions(+), 1 deletion(-) diff --git

[RFC 26/33] drm/i915/color: Add color functions for ADL

Register color callbacks for ADL and beyond. While we have to register new callbacks for pre-blending color operations, re-use callbacks for post-blend operations. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915

[RFC 32/33] drm/i915/color: Add a dummy pipeline with 3D LUT

From: Chaitanya Kumar Borah This patch is to demonstrate how a pipeline can be added. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_state_helper.c | 3 ++ drivers/gpu/drm/drm_atomic_uapi.c | 15

[RFC 33/33] drm/i915/color: Add example implementation for vendor specific color operation

From: Chaitanya Kumar Borah This is an example of how vendor specific color operation could be supported by the uapi Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c| 42

[RFC 31/33] drm/i915/color: Enable plane color features

From: Chaitanya Kumar Borah Initialize and expose all plane color features. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 1 - drivers/gpu/drm/i915/display/skl_universal_plane.c | 1 + 2

[RFC 28/33] drm/i915/xelpd: Add register definitions for Plane Post CSC

Add macros to define Plane Post CSC registers Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_reg.h | 73 + 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915

[RFC 30/33] drm/i915/color: Enable Plane CSC

Implement plane CSC for Xe_LPD. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c| 86 +++ drivers/gpu/drm/i915/display/intel_color.h| 1 + .../drm/i915/display

[RFC 27/33] drm/i915/color: Program Plane Pre-CSC Registers

Extract the LUT and program plane pre-csc registers. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 120 + drivers/gpu/drm/i915/i915_reg.h| 1 + 2 files

[RFC 25/33] drm/i915/xelpd: Add register definitions for Plane Degamma

Add macros to define Plane Degamma registers Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_reg.h | 49 + 1 file changed, 49 insertions(+) diff --git a/drivers/gpu/drm/i915

[RFC 23/33] drm/i915/color: Load plane color luts from atomic flip

Load plane color luts as part of atomic plane updates. This will be done only if the plane color luts are changed. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 8

[RFC 24/33] drm/i915/xelpd: Add plane color check to glk_plane_color_ctl

Extended glk_plane_color_ctl to have plane color checks. This helps enabling the csc, degamma or gamma block based on user inputs. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 13

[RFC 22/33] drm/i915/color: Add plane color callbacks

Add callbacks for color plane operations. load_plane_luts: used to load pre/post csc luts load_plane_csc_matrix: used to load csc matrix Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 6

[RFC 21/33] drm/i915/color: Create and attach set color pipeline property

From: Chaitanya Kumar Borah Create and attach "SET_COLOR_PIPELINE" property to planes. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 3 +++ 1 file changed, 3 insertions(+) diff --git

[RFC 20/33] drm/i915/color: Add color pipelines to plane

plane enum property "GET_COLOR_PIPELINE" to expose these pipelines to userspace. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 31 +- drivers/gpu/drm/i915/display/intel_color

[RFC 15/33] drm/i915/color: Add lut range for HDR planes

: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 108 + 1 file changed, 108 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 3900e3748a0e..58b6d70043ca 100644 --- a/drivers/gpu/drm/i915

[RFC 18/33] drm/i915/color: Add HDR plane LUT range data to color pipeline

: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 47 ++ 1 file changed, 47 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index

[RFC 17/33] drm/i915/color: Add color pipeline for SDR planes

SDR planes provides programmable color hardware blocks for Pre-CSC and Post-CSC operations. Add a color pipeline to expose these capabilities. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c

[RFC 16/33] drm/i915/color: Add color pipeline for HDR planes

-linearize frame buffer data to match the sink. Another use case of it could be to perform Tone mapping for HDR use-cases. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c

[RFC 19/33] drm/i915/color: Add SDR plane LUT range data to color pipeline

From: Chaitanya Kumar Borah Add LUT ranges for color blocks in SDR planes. Userspace can parse through this information to generate proper LUT data for respective hardware blocks. It will be exposed to the user space by the color pipeline. Co-developed-by: Uma Shankar Signed-off-by: Uma

[RFC 10/33] drm: Manage color blob states

From: Chaitanya Kumar Borah This patch manages the references for color blobs. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_state_helper.c | 18 ++ 1 file changed, 18 insertions(+) diff --git a

[RFC 14/33] drm/i915/color: Add lut range for SDR planes

: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 55 ++ 1 file changed, 55 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 5918e2e9bcdd..3900e3748a0e 100644 --- a/drivers/gpu/drm/i915/display

[RFC 13/33] drm: Reset plane color state on pipeline switch request

n the new switch request, the blob id's will remain NULL eventually resulting in disabling of that hardware block. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_uapi.c | 52 --- 1 file c

[RFC 11/33] drm: Replace individual color blobs

From: Chaitanya Kumar Borah Replace the color operation blobs depending on the values sent by userspace. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_uapi.c | 97 +++ 1 file changed

[RFC 12/33] drm: Reset pipeline when user sends NULL blob

id's as NULL. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_atomic_uapi.c | 50 +++ 1 file changed, 50 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gp

[RFC 09/33] drm: Add color information to plane state

-off-by: Uma Shankar --- include/drm/drm_plane.h | 41 + 1 file changed, 41 insertions(+) diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index fcd589cb38f2..601b01e47a93 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h

[RFC 08/33] drm: Add color lut range structure

Add color lut range structure which is to be used to advertize the capabilities of pre-csc/post-csc color operation blocks. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- include/uapi/drm/drm_mode.h | 77

[RFC 07/33] drm: Add Enhanced Gamma LUT precision structure

Signed-off-by: Uma Shankar --- include/uapi/drm/drm_mode.h | 17 + 1 file changed, 17 insertions(+) diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h index a21825ee93e2..1cd656b0e994 100644 --- a/include/uapi/drm/drm_mode.h +++ b/include/uapi/drm/drm_mode.h

[RFC 05/33] drm: Add structures for setting color pipeline

program the respective color hardware blocks of the pipeline. It also contains the pipeline number to be set. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- include/uapi/drm/drm_mode.h | 30 ++ 1 file changed, 30

[RFC 06/33] drm: Add set colorpipeline property

eline. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_uapi.c | 12 + drivers/gpu/drm/drm_color_mgmt.c | 42 +++ include/drm/drm_plane.h | 22 3 fil

[RFC 03/33] drm: Add plane get color pipeline property

and attach the property to a plane. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_color_mgmt.c | 46 include/drm/drm_plane.h | 10 +++ 2 files changed, 56 insertions(+) diff --git a/

[RFC 02/33] drm: Add color operation structure

re-arranged, substracted or added to create distinct color pipelines to accurately describe the Hardware blocks present in the display engine. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- include/uapi/drm/drm_mode.h | 72

[RFC 04/33] drm: Add helper to add color pipeline

pipelines to accurately describe the Hardware blocks present in the display engine. Co-developed-by: Uma Shankar Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/drm_color_mgmt.c | 42 include/drm/drm_plane.h | 3 +++ 2

[RFC 01/33] drm/doc/rfc: Add RFC document for proposed Plane Color Pipeline

Add the documentation for the new proposed Plane Color Pipeline. Co-developed-by: Chaitanya Kumar Borah Signed-off-by: Chaitanya Kumar Borah Signed-off-by: Uma Shankar --- .../gpu/rfc/plane_color_pipeline.rst | 394 ++ 1 file changed, 394 insertions(+) create mode

[RFC 00/33] Add Support for Plane Color Pipeline

far. Let's work together to improve the current proposal and get this thing implemented in upstream linux. All the feedback and suggestions to enhance the design are welcome. Regards, Uma Shankar Chaitanya Kumar Borah Cc: Ville Syrjala Cc: Pekka Paalanen Cc: Simon Ser Cc: Harry Wentland Cc

[RFC v2 22/22] drm/i915/xelpd: Enable plane gamma

Enable plane gamma feature in check callbacks. Decide based on the user input. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/skl_universal_plane.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers

[RFC v2 21/22] drm/i915/xelpd: Program Plane Gamma Registers

Extract the LUT and program plane gamma registers. Enabled multi segmented lut as well. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_color.c | 89 ++ drivers/gpu/drm/i915/i915_reg.h| 9 ++- 2 files changed, 94 insertions(+), 4 deletions

[RFC v2 20/22] drm/i915/xelpd: Add register definitions for Plane Gamma

Add macros to define Plane Gamma registers Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_reg.h | 73 + 1 file changed, 73 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ceee500e64d7..fc4f8b430518

[RFC v2 18/22] drm: Add Plane Gamma Lut property

Add Plane Gamma Lut as a blob property. Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_state_helper.c | 3 +++ drivers/gpu/drm/drm_atomic_uapi.c | 10 ++ drivers/gpu/drm/drm_color_mgmt.c | 18 ++ include/drm/drm_plane.h | 14

[RFC v2 19/22] drm/i915/xelpd: Define and Initialize Plane Gamma Lut range

Define the structure with XE_LPD gamma lut ranges. HDR and SDR planes have different capabilities, implemented respective structure for the HDR planes. Degamma and GAMMA has same Lut caps for SDR planes, extended the same. Initialize the mode range caps as well. Signed-off-by: Uma Shankar

[RFC v2 17/22] drm: Add Plane Gamma Mode property

ients. It can then set one of the modes using this enum property. Lut values will be sent through a separate GAMMA_LUT blob property. Signed-off-by: Uma Shankar Signed-off-by: Bhanuprakash Modem --- drivers/gpu/drm/drm_atomic_uapi.c | 4 drivers/gpu/drm/drm_color_mgmt.c

[RFC v2 16/22] drm/i915/xelpd: Enable Plane CSC

Implement plane CSC for ICL+ Signed-off-by: Uma Shankar --- .../gpu/drm/i915/display/intel_atomic_plane.c | 5 +- drivers/gpu/drm/i915/display/intel_color.c| 82 +++ .../drm/i915/display/skl_universal_plane.c| 4 + drivers/gpu/drm/i915/i915_reg.h | 1

[RFC v2 15/22] drm/i915/xelpd: Define Plane CSC Registers

Define Register macros for plane CSC. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/i915_reg.h | 43 + 1 file changed, 43 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 0c36a330734f..20c1b8ddded8 100644

[RFC v2 14/22] drm: Add helper to attach Plane ctm property

Add a DRM helper to attach ctm property. Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_color_mgmt.c | 10 ++ include/drm/drm_plane.h | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c index

[RFC v2 13/22] drm: Add Plane CTM property

Add a blob property for plane CSC usage. Signed-off-by: Uma Shankar --- drivers/gpu/drm/drm_atomic_state_helper.c | 3 +++ drivers/gpu/drm/drm_atomic_uapi.c | 10 ++ drivers/gpu/drm/drm_color_mgmt.c | 11 +++ include/drm/drm_plane.h | 15

[RFC v2 12/22] drm/i915/xelpd: Load plane color luts from atomic flip

Load plane color luts as part of atomic plane updates. This will be done only if the plane color luts are changed. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 +++ drivers/gpu/drm/i915/display/intel_atomic_plane.h | 1 + drivers/gpu/drm/i915/display

[RFC v2 11/22] drm/i915/xelpd: Initialize plane color features

Initialize plane color features for XE_LPD. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_atomic_plane.h | 1 + drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b

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