fei.y...@intel.com kirjoitti 17.4.2023 klo 9.24:
From: Fei Yang
The series includes patches needed to enable MTL.
Also add new extension for GEM_CREATE uAPI to let
user space set cache policy for buffer objects.
if I'm counting right, this would be version 5 of the series, yet that
is not sh
john.c.harri...@intel.com kirjoitti 27.4.2022 klo 19.55:
From: John Harrison
Add GuC firmware for DG2.
Note that an older version of this patch exists in the CI topic
branch. Hence this set includes a revert of that patch before applying
the new version. When merging, the revert would simply b
ace 'config.h' with config_file
Simon Ser (1):
Fix missing stdlib includes in xf86drmMode.h
Swathi Dhanavanthri (1):
intel: sync i915_pciids.h with kernel
Thomas Petazzoni (1):
xf86atomic: require CAS support in libatomic_ops
Timo Aaltonen (1):
Bump version to 2.4.101
On 20.3.2020 2.38, Swathi Dhanavanthri wrote:
> Changes:
> 91b79fb35d67 ("drm/i915/tgl: Add new PCI IDs to TGL")
>
> Signed-off-by: Swathi Dhanavanthri
> ---
> intel/i915_pciids.h | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/intel/i915_pciids.h b/intel/i915_p
On 9.1.2020 17.20, Mario Kleiner wrote:
> Hi and happy new year!
>
> Since i now have a MBP 2017 to play with, with a 10 bit Retina panel,
> and Polaris gpu, i'm trying to get it to get 10 bits, and found one
> small bug [fix: patch1], and a quirk of Apples Retina eDP sink, for
> which i propose p
On 9.10.2019 18.50, Daniel Vetter wrote:
> On Thu, Oct 03, 2019 at 11:31:25AM -0700, Juston Li wrote:
>> From: Daniel Stone
>>
>> getfb2 allows us to pass multiple planes and modifiers, just like addfb2
>> over addfb.
>>
>> Changes since v1:
>> - unused modifiers set to 0 instead of DRM_FORMAT_MO
On 18.07.2018 22:33, Peter Seiderer wrote:
> Use meson library instead of shared_library to enable static build.
>
> Signed-off-by: Peter Seiderer
thanks, seems to work
--
t
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On 15.12.2017 23:19, Rodrigo Vivi wrote:
> On Fri, Dec 15, 2017 at 04:39:25PM +, Ingo Molnar wrote:
>>
>> * Lucas De Marchi wrote:
>>
>>> CFL was missing from intel_early_ids[]. The PCI ID needs to be there to
>>> allow the memory region to be stolen, otherwise we could have RAM being
>>> arbi
