Re: [PATCH v2 1/3] drm/modes: introduce drm_mode_validate_mode() helper function

Hi Maxime, On Tue, Nov 26, 2024 at 08:36:01AM +0100, Sean Nyekjaer wrote: > Hi Maxime, > [...] > > > > We probably need some kunit tests here too. > > Good idea, will be my first :) > Would something like this work? diff --git a/drivers/gpu/drm/tests/drm_

Re: [PATCH v2 1/3] drm/modes: introduce drm_mode_validate_mode() helper function

On Tue, Nov 26, 2024 at 01:09:10PM +0100, Maxime Ripard wrote: > On Tue, Nov 26, 2024 at 12:34:26PM +0100, Sean Nyekjaer wrote: > > Hi, > > > > On Tue, Nov 26, 2024 at 09:38:55AM +0100, Maxime Ripard wrote: > > > Hi, > > > > > > On Tue, Nov 2

Re: [PATCH v2 1/3] drm/modes: introduce drm_mode_validate_mode() helper function

Hi, On Tue, Nov 26, 2024 at 09:38:55AM +0100, Maxime Ripard wrote: > Hi, > > On Tue, Nov 26, 2024 at 08:36:00AM +0100, Sean Nyekjaer wrote: > > On Mon, Nov 25, 2024 at 05:00:56PM +0100, Maxime Ripard wrote: > > > On Mon, Nov 25, 2024 at 02:49:26PM +0100, Sean Nyekjaer wro

Re: [PATCH v2 1/3] drm/modes: introduce drm_mode_validate_mode() helper function

Hi Maxime, On Mon, Nov 25, 2024 at 05:00:56PM +0100, Maxime Ripard wrote: > Hi Sean, > > On Mon, Nov 25, 2024 at 02:49:26PM +0100, Sean Nyekjaer wrote: > > Check if the required pixel clock is in within .5% range of the > > desired pixel clock. > > This will match the

[PATCH v2 0/3] drm/stm: dsi: relax mode_valid clock tolerance

Introduce helper function to check if the pixel clock is within tolerance. Signed-off-by: Sean Nyekjaer --- Changes in v2: - Introduce helper function drm_mode_validate_mode() - drm/stm: use helper function for mode validation - drm/sun4i: use helper function for mode validation - Link to v1

[PATCH v2 3/3] drm/stm: dsi: use drm_mode_validate_mode() helper function

When using the DSI interface via DSI2LVDS bridge, it seems a bit harsh to reguire the requested and the actual px clock to be within 50Hz. A typical LVDS display requires the px clock to be within +-10%. In case for HDMI .5% tolerance is required. Signed-off-by: Sean Nyekjaer --- drivers/gpu

[PATCH v2 1/3] drm/modes: introduce drm_mode_validate_mode() helper function

Check if the required pixel clock is in within .5% range of the desired pixel clock. This will match the requirement for HDMI where a .5% tolerance is allowed. Signed-off-by: Sean Nyekjaer --- drivers/gpu/drm/drm_modes.c | 34 ++ include/drm/drm_modes.h | 2

[PATCH v2 2/3] drm/sun4i: use drm_mode_validate_mode() helper function

Use new helper function for HDMI mode validation Signed-off-by: Sean Nyekjaer --- drivers/gpu/drm/sun4i/sun4i_rgb.c | 22 -- 1 file changed, 4 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c index

Re: [PATCH] drm/stm: dsi: relax mode_valid clock tolerance

> Best regards Hi Yannick, Will this mean that this will patch will go in? I still have plans to do the helper, but I'm limited on time :) /Sean > > > On 4/22/24 16:05, Sean Nyekjaer wrote: > > On Fri, Mar 22, 2024 at 11:47:31AM +0100, Sean Nyekjaer wrote: > > >

Re: [PATCH] drm/stm: dsi: relax mode_valid clock tolerance

Hi, On Wed, Apr 24, 2024 at 09:21:17AM UTC, Maxime Ripard wrote: > Hi, > > Sorry, my previous review didn't go through. > > On Fri, Mar 22, 2024 at 11:47:31AM +0100, Sean Nyekjaer wrote: > > When using the DSI interface via DSI2LVDS bridge, it seems a bit harsh > &

Re: [PATCH] drm/stm: dsi: relax mode_valid clock tolerance

On Fri, Mar 22, 2024 at 11:47:31AM +0100, Sean Nyekjaer wrote: > When using the DSI interface via DSI2LVDS bridge, it seems a bit harsh > to reguire the requested and the actual px clock to be within > 50Hz. A typical LVDS display requires the px clock to be within +-10%. > > In c

[PATCH] drm/stm: dsi: relax mode_valid clock tolerance

e the implementation of mode_valid()") Signed-off-by: Sean Nyekjaer --- drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c index d5f8c923d7bc..97936b0ef

Re: STM32 DSI controller driver: mode_valid clock tolerance

Hi Raphael, > On 20 Mar 2024, at 15.14, Raphael Gallais-Pou > wrote: > > > On 3/8/24 09:35, Sean Nyekjaer wrote: >> Hi, > > > Hi Sean, > > > Sorry for not responding earlier. NP :) > > I've also added Antonio Borneo, which is the a

Re: STM32 DSI controller driver: mode_valid clock tolerance

Hi Maxime, > On 20 Mar 2024, at 14.23, Maxime Ripard wrote: > > Hi Sean, > > On Fri, Mar 08, 2024 at 09:35:27AM +0100, Sean Nyekjaer wrote: >> I’m using a stm32mp157 with a sn65dsi83 DSI2LVDS bridge. The LVDS >> display is having a minimum clock of 25.2 MHz, typical

STM32 DSI controller driver: mode_valid clock tolerance

Hi, I’m using a stm32mp157 with a sn65dsi83 DSI2LVDS bridge. The LVDS display is having a minimum clock of 25.2 MHz, typical of 27,2 MHz and a max of 30,5 MHz. I will fail the mode_valid check with MODE_CLOCK_RANGE. It will request 2720 Hz, but is getting 2725. Guess the display is fine

Re: sn65dsi83: dsi burst mode

> On 7 Mar 2024, at 15.28, Frieder Schrempf wrote: > > On 07.03.24 09:09, Sean Nyekjaer wrote: >> Hi, >> >> We are using the stm32mp1 together with the sn65dsi83 bridge. >> The ti,sn65dsi83 driver is (hard) enabling MIPI_DSI_MODE_VIDEO_BURST, then >>

sn65dsi83: dsi burst mode

Hi, We are using the stm32mp1 together with the sn65dsi83 bridge. The ti,sn65dsi83 driver is (hard) enabling MIPI_DSI_MODE_VIDEO_BURST, then the st,stm32-dsi driver is adding +20% to the clock speed. That means our LVDS is +20% higher than expected. Any proposals for a fix? Could we add a devic