fb1b77cfc0377d477bdc
> > 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c
> > @@ -63,6 +63,9 @@ void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv
> > *dmub_srv,
> >
> > bool should_use_dmub_lock(struct dc_link *link)
> > {
> > + /* ASIC doesn't support DMUB */
> > + if (!link->ctx->dmub_srv)
> > + return false;
> > if (link->psr_settings.psr_version == DC_PSR_VERSION_SU_1 ||
> > link->psr_settings.psr_version == DC_PSR_VERSION_1)
> > return true;
> >
> > ---
> > base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b
> > change-id: 20250205-amdgpu-dmub-3fc25a0bc68e
> >
> > Best regards,
> > --
> > Thadeu Lima de Souza Cascardo
> >
>
It looks like the patch pointed in the "Fixed" tag was reverted.
However, this patch is still valid. The should_use_dmub_lock() could be
called in a context without DMUB.
(+Other display folks)
Reviewed-by: Rodrigo Siqueira
Thanks
--
Rodrigo Siqueira
SPL_EXPAND2(a, b)
> #define SPL_NAMESPACE(symbol) SPL_EXPAND(SPL_PFX_, symbol)
>
> -#ifdef __cplusplus
> -extern "C" {
> -#endif
>
> /* SPL interfaces */
>
> --
> 2.43.0
>
Reviewed-by: Rodrigo Siqueira
--
Rodrigo Siqueira
> change-id: 20250227-amd-display-a8342c55a9a0
>
> Best regards,
> --
> Ethan Carter Edwards
>
Hi,
This series LGTM,
Reviewed-by: Rodrigo Siqueira
To Display folks,
(Cc some other devs)
If possible, try to include this series in this week's promotion tests,
or check the IGT test in the CI just to be safe.
Thanks
--
Rodrigo Siqueira
ies is
Reviewed-by: Rodrigo Siqueira
and your series was merged into the amd-staging-drm-next.
Thanks
Siqueira
On 11/5/24 7:02 AM, Zicheng Qu wrote:
Hi all,
I am submitting two patches to correct power gating configurations in
the AMD display driver.
1. Patch 1/2 (Fixes: 46825fcfbe16): Corrects DOMAIN10_PG_CONFIG to use
DOMAIN10_POWER_FORCEON.
2. Patch 2/2 (Fixes: 46825fcfbe16): Corrects DOMAIN11_PG_
Hi Luan,
Sorry for the delay.
Anyway, I ran your changes in our CI, and overall, everything looks good.
I just have some comments for your V1.
On 10/9/24 9:34 AM, Luan Icaro Pinto Arcanjo wrote:
From: LipArcanjo
It looks like your Signed-off-by does not match with the author.
All dce co
I haven't been able to follow or review the work on the driver for a
long time and I don't see the situation improving anytime soon. Hence,
this commit removes me from the maintainers list.
Signed-off-by: Rodrigo Siqueira
---
MAINTAINERS | 1 -
1 file changed, 1 deletion(-)
di
On 7/9/24 3:10 AM, Ma Ke wrote:
To avoid reports of NULL_RETURN warning, we should add
otg_master NULL check.
Cc: sta...@vger.kernel.org
Fixes: c51d87202d1f ("drm/amd/display: do not attempt ODM power optimization if
minimal transition doesn't exist")
Signed-off-by: Ma Ke
---
Changes in v2:
-
On 7/9/24 6:41 AM, Linux regression tracking (Thorsten Leemhuis) wrote:
On 30.06.24 01:18, Mikhail Gavrilov wrote:
On Sat, Jun 29, 2024 at 9:46 PM Rodrigo Siqueira Jordao
wrote:
I'm trying to reproduce this issue, but until now, I've been unable to
reproduce it. I tried some
On 6/29/24 5:18 PM, Mikhail Gavrilov wrote:
On Sat, Jun 29, 2024 at 9:46 PM Rodrigo Siqueira Jordao
wrote:
Hi Mikhail,
I'm trying to reproduce this issue, but until now, I've been unable to
reproduce it. I tried some different scenarios with the following
components:
1. Display
Hi Joao,
First of all, thanks for your patch. Follows some of my comments:
> On 6/13/24 10:05 AM, Joao Paulo Pereira da Silva wrote:
You can drop the dc part in the commit title. Also, the title should
highlight that you are decoupling one part of the code in a single place
to avoid duplicati
On 6/28/24 9:19 AM, Alex Deucher wrote:
On Fri, Jun 21, 2024 at 6:45 AM Mikhail Gavrilov
wrote:
On Fri, Jun 21, 2024 at 12:56 PM Linux regression tracking (Thorsten
Leemhuis) wrote:
Hmmm, I might have missed something, but it looks like nothing happened
here since then. What's the status?
Hi Marcelo,
First of all, thanks a lot for your patch! Please check some of my
inline comments.
On 4/27/24 10:05 AM, Marcelo Mendes Spessoto Junior wrote:
Fix most of the display documentation compile warnings by
documenting struct mpc_funcs functions in dc/inc/hw/mpc.h file.
Could you add
On 2/13/24 3:43 PM, Joao Paulo Pereira da Silva wrote:
From: jppaulo
Clean some wrong indenting that throw errors in checkpatch.
Signed-off-by: Joao Paulo Pereira da Silva
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --gi
*dccg_mask);
-
#endif //__DCN301_DCCG_H__
Hi David,
Thanks a lot for your patch.
Reviewed-by: Rodrigo Siqueira
I already merged your patch into the asdn.
Thanks
Siqueira
for your patch.
Your patch looks good; I just added {} in the if and spaces around '/'
before merging your patch.
Anyway,
Reviewed-by: Rodrigo Siqueira
Thanks
Siqueira
+ else {
+ is_dsc_possible = false;
+ goto done;
+ }
if (target
On 2/26/24 04:12, Jani Nikula wrote:
On Thu, 22 Feb 2024, Rodrigo Siqueira wrote:
diff --git a/drivers/gpu/drm/amd/display/test/kunit/.kunitconfig
b/drivers/gpu/drm/amd/display/test/kunit/.kunitconfig
index eb6f81601757..4c5861ad58bd 100644
--- a/drivers/gpu/drm/amd/display/test/kunit
From: Maíra Canal
Explain how to run the KUnit tests present in the AMDGPU's Display
Core and clarify which architectures and tools can be used to run
the tests. Moreover, explains how to add new tests to the existing
tests.
Signed-off-by: Maíra Canal
---
.../gpu/amdgpu/display/display-test.rs
From: Magali Lemes
This commit adds unit tests to the functions dcn20_cap_soc_clocks and
dcn21_update_bw_bounding_box from dcn20/dcn20_fpu.
Signed-off-by: Magali Lemes
Signed-off-by: Maíra Canal
---
.../gpu/drm/amd/display/test/kunit/Makefile | 3 +-
.../test/kunit/dc/dml/dcn20/dcn20_fpu_
From: Maíra Canal
Add a unit test to the SubVP feature in order to avoid possible
regressions and ensure code robustness. In particular, this new test
validates the expected parameters when using 4k144 and 4k240 displays.
Signed-off-by: Maíra Canal
Co-developed-by: Rodrigo Siqueira
Reported
From: Maíra Canal
The display_mode_vba library deals with hundreds of display parameters
and sometimes does it in odd ways. The addition of unit tests intends to
assure the quality of the code delivered by HW engineers and, also make
it possible to refactor the code decreasing concerns about addi
From: Maíra Canal
KUnit unifies the test structure and provides helper tools that simplify
the development of tests. Basic use case allows running tests as regular
processes, which makes easier to run unit tests on a development machine
and to integrate the tests in a CI system.
This commit intr
From: Maíra Canal
The display_mode_vba_20 deals with hundreds of display parameters for
the DCN20 and sometimes does it in odd ways. The addition of unit tests
intends to assure the quality of the code delivered by HW engineers and,
also make it possible to refactor the code decreasing concerns a
From: Isabella Basso
This adds tests to the bit encoding format verification functions on the
file. They're meant to be simpler so as to provide a proof of concept on
testing DML code.
Change since v4:
- Use DRM_AMD_DC_FP guard for FPU tests
Signed-off-by: Isabella Basso
Signed-off-by: Maíra C
From: Tales Aparecida
The fixed31_32 library performs a lot of the mathematical operations
involving fixed-point arithmetic and the conversion of integers to
fixed-point representation.
This unit tests intend to assure the proper functioning of the basic
mathematical operations of fixed-point ar
In 2022, we got a great patchset from a GSoC project introducing unit
tests to the amdgpu display. Since version 3, this effort was put on
hold, and now I'm attempting to revive it. I'll add part of the original
cover letter at the bottom of this cover letter, but you can read all
the original mess
,
new_addr_range.end);
- *out_data = kzalloc(*out_size * sizeof(**out_data), GFP_KERNEL);
+ *out_data = kcalloc(*out_size, sizeof(**out_data), GFP_KERNEL);
}
}
lgtm,
Reviewed-by: Rodrigo Siqueira
Hi Túlio,
First of all thanks for your patch. See my comments inline.
On 2/17/24 13:20, Túlio Fernandes wrote:
Clean unnecessary braces in dc/dcn32/dcn32_resource_helpers.c and
dc/dcn32/dcn201_link_encoder.c
Did you identify this issue with checkpatch? If so, I recommend you
paste the error
From: Magali Lemes
This commit adds unit tests to the functions dcn20_cap_soc_clocks and
dcn21_update_bw_bounding_box from dcn20/dcn20_fpu.
Signed-off-by: Magali Lemes
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/tests/Makefile| 3 +-
.../tests/dc/dml/dcn20/dcn20_fpu_test.
From: Maíra Canal
Explain how to run the KUnit tests present in the AMDGPU's Display
Core and clarify which architectures and tools can be used to run
the tests. Moreover, explains how to add new tests to the existing
tests.
Signed-off-by: Maíra Canal
---
.../gpu/amdgpu/display/display-test.rs
From: Maíra Canal
Add a unit test to the SubVP feature in order to avoid possible
regressions and ensure code robustness. In particular, this new test
validates the expected parameters when using 4k144 and 4k240 displays.
Signed-off-by: Maíra Canal
Signed-off-by: Rodrigo Siqueira
Reported-by
From: Maíra Canal
The display_mode_vba_20 deals with hundreds of display parameters for
the DCN20 and sometimes does it in odd ways. The addition of unit tests
intends to assure the quality of the code delivered by HW engineers and,
also make it possible to refactor the code decreasing concerns a
From: Isabella Basso
This adds tests to the bit encoding format verification functions on the
file. They're meant to be simpler so as to provide a proof of concept on
testing DML code.
Signed-off-by: Isabella Basso
Signed-off-by: Maíra Canal
---
drivers/gpu/drm/amd/display/Kconfig |
From: Maíra Canal
KUnit unifies the test structure and provides helper tools that simplify
the development of tests. Basic use case allows running tests as regular
processes, which makes easier to run unit tests on a development machine
and to integrate the tests in a CI system.
This commit intr
From: Maíra Canal
The display_mode_vba library deals with hundreds of display parameters
and sometimes does it in odd ways. The addition of unit tests intends to
assure the quality of the code delivered by HW engineers and, also make
it possible to refactor the code decreasing concerns about addi
From: Tales Aparecida
The fixed31_32 library performs a lot of the mathematical operations
involving fixed-point arithmetic and the conversion of integers to
fixed-point representation.
This unit tests intend to assure the proper functioning of the basic
mathematical operations of fixed-point ar
In 2022, we got a great patchset from a GSoC project introducing unit
tests to the amdgpu display. Since version 3, this effort was put on
hold, and now I'm attempting to revive it. I'll add part of the original
cover letter at the bottom of this cover letter, but you can read all
the original mess
e.crtc->dev,
"doesn't support plane and CRTC degamma at the same
time\n");
- return -EINVAL;
+ return -EINVAL;
}
/* If we are here, it means we don't have plane degamma settings, check
Reviewed-by: Rodrigo Siqueira
Ch
uint32_t igam_input_format;
uint32_t dgam_lut_mode;
uint32_t rgam_lut_mode;
+ // gamut_remap data for dcn10_get_cm_states()
uint32_t gamut_remap_mode;
uint32_t gamut_remap_c11_c12;
uint32_t gamut_remap_c13_c14;
@@ -148,6 +149,8 @@ struct dcn_dpp_state {
DTN_INFO_BEGIN();
+
+ dcn10_log_hubbub_state(dc, log_ctx);
+
+ dcn10_log_hubp_states(dc, log_ctx);
+
+ dcn10_log_color_state(dc, log_ctx);
DTN_INFO("OTG: v_bs v_be v_ss v_se vpol vmax vmin vmax_sel vmin_sel h_bs h_be h_ss h_se hpol htot vtot underflow blank_en\n");
Reviewed-by: Rodrigo Siqueira
Hi Sagar,
First of all, thanks for your patch.
On 10/25/23 08:04, Sagar Vashnav wrote:
Add kernel documentation for the dc_stream_forward_crc_window
Signed-off-by: Sagar Vashnav
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/
everything looks good. I also reviewed it and lgtm.
Reviewed-by: Rodrigo Siqueira
Thanks
Siqueira
On 9/13/23 10:43, Melissa Wen wrote:
Hi,
This is an update of previous RFC [0] improving the data collection of
Gamma Correction and Blend Gamma color blocks.
As I mentioned in the last version, I'm updating the color state part of
DTN log to match DCN3.0 HW better. Currently, the DTN log co
On 9/13/23 10:43, Melissa Wen wrote:
DCN3 DPP color state was uncollected and some state elements from DCN1
doesn't fit DCN3. Create new elements according to DCN3 color caps and
fill them up for DTN log output.
rfc-v2:
- fix reading of gamcor and blnd gamma states
Signed-off-by: Melissa Wen
On 9/13/23 10:43, Melissa Wen wrote:
Prepare to hook color state logging according to DCN version.
Signed-off-by: Melissa Wen
---
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 27 +--
1 file changed, 19 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/disp
tor_update(&aconnector->base);
if (!aconnector->base.edid_blob_ptr) {
DRM_ERROR("No EDID firmware found on connector: %s ,forcing
to OFF!\n",
Reviewed-by: Rodrigo Siqueira
signed int full_screen,
unsigned int video_mode,
- unsigned int hdr_mode, unsigned int panel_inst);
};
#endif
Reviewed-by: Rodrigo Siqueira
{
int idx = 0;
- memset(available_slices, -1, MIN_AVAILABLE_SLICES_SIZE);
-
if (slice_caps.bits.NUM_SLICES_1)
available_slices[idx++] = 1;
Reviewed-by: Rodrigo Siqueira
This commit adds missing luminance control registers to enable a more
standard way (VESA) to deal with eDP luminance control.
Cc: Anthony Koo
Cc: Iswara Negulendran
Cc: Felipe Clark
Cc: Harry Wentland
Signed-off-by: Rodrigo Siqueira
---
include/drm/display/drm_dp.h | 3 +++
1 file changed
Cc: Anthony Koo
Cc: Iswara Negulendran
Cc: Felipe Clark
Cc: Harry Wentland
Signed-off-by: Rodrigo Siqueira
---
include/drm/display/drm_dp.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 632376c291db..d30a9b2f450c
some
manual tests in my ASICs. Everything looks fine.
I also reviewed this series, and it LGTM:
Reviewed-by: Rodrigo Siqueira
Finally, I pushed it to amd-staging-drm-next.
Thanks
Siqueira
Hi Hans,
Which AMD device do you have available for testing this series?
P.s.: If you have a new version of this series, could you also Cc me?
Thanks for your patchset.
Siqueira
On 3/8/23 14:58, Hans de Goede wrote:
Hi All,
Here is version 2 of my patch series to pass the proper parent devic
data, size) != size);
}
bool dm_helpers_dp_write_dpcd(
Reviewed-by: Rodrigo Siqueira
and pushed to amd-staging-drm-next.
Thanks
Siqueira
rmat_support = {
Reviewed-by: Rodrigo Siqueira
I also applied your change to amd-staging-drm-next.
Thanks!
Siqueira
On 1/11/23 10:19, Harry Wentland wrote:
On 1/10/23 10:58, Rodrigo Siqueira Jordao wrote:
On 11/22/22 06:20, hongao wrote:
[Why]
Setting scaling does not correctly update CRTC state. As a result
dc stream state's src (composition area) && dest (addressable area)
was not
ate();
if (!dc_ctx->perf_trace) {
+ kfree(dc_ctx);
ASSERT_CRITICAL(false);
return false;
}
Reviewed-by: Rodrigo Siqueira
And applied to amd-staging-drm-next.
Thanks
Siqueira
On 11/22/22 06:20, hongao wrote:
[Why]
Setting scaling does not correctly update CRTC state. As a result
dc stream state's src (composition area) && dest (addressable area)
was not calculated as expected. This causes set scaling doesn's work.
[How]
Correctly update CRTC state when setting sca
e(clk_mgr->base.bw_params);
if (clk_mgr->wm_range_table)
dm_helpers_free_gpu_mem(clk_mgr->base.ctx,
DC_MEM_ALLOC_TYPE_GART,
--
2.34.1
Hi,
Reviewed-by: Rodrigo Siqueira
And applied to amd-staging-drm-next.
Thanks
Siqueira
IES);
+
drm_mode_crtc_set_gamma_size(&acrtc->base,
MAX_COLOR_LEGACY_LUT_ENTRIES);
return 0;
Hi,
I tested it in a DCE device and the patch lgtm.
Reviewed-by: Rodrigo Siqueira
and merged it into amd-staging-drm-next.
Thanks
Siqueira
On 10/24/22 06:04, Christian König wrote:
Am 21.10.22 um 18:34 schrieb Hamza Mahfooz:
Unfortunately, printk() doesn't currently support the printing of %f
entries. So, print statements that contain "%f" should be removed.
However, since DC is used on other OSes that can still benefit from the
On 2022-10-19 11:15, Joaquín Ignacio Aramendía wrote:
This file was split in commit 5d945cbcd4b16a29d6470a80dfb19738f9a4319f
("drm/amd/display: Create a file dedicated to planes") the logic in
dm_plane_format_mod_supported() function got changed by a switch logic.
That change broke drm_plane m
Hi Hamza,
On 10/14/22 11:31, Hamza Mahfooz wrote:
Currently, if we encounter unimplemented functions, it is difficult to
tell what caused them just by looking at dmesg and that is compounded by
the fact that it is often hard to reproduce said issues. So, to have
access to more detailed debugging
On 2022-10-04 16:24, Lyude Paul wrote:
Yikes, it appears somehow I totally made a mistake here. We're currently
checking to see if drm_dp_add_payload_part2() returns a non-zero value to
indicate success. That's totally wrong though, as this function only
returns a zero value on success - not t
struct atom_i2c_record *record,
struct graphics_object_i2c_info *info);
Reviewed-by: Rodrigo Siqueira
and applied to amd-staging-drm-next.
Thanks
Siqueira
ketIndex */
&info_frame->hdrsmd,
true);
- sdp_stream_enable = true;
- }
+
/* enable/disable transmission of packet(s).
* If enabled, packet transmission begins on the next frame
*/
Thanks a lot for your patch,
Reviewed-by: Rodrigo Siqueira
and applied to amd-staging-drm-next.
Thanks
Siqueira
27;
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/dcn32_fpu.c:2140: warning:
expecting prototype for dcn32_update_bw_bounding_box(). Prototype was for
dcn32_update_bw_bounding_box_fpu() instead
Reported-by: kernel test robot
Signed-off-by: Randy Dunlap
Cc: George Shen
Cc: Alvin Lee
Cc: Nevenko
Hi Michel,
First of all, thanks a lot for your review. I want to take this
opportunity to discuss this topic in more depth and learn more from you
and others.
+(Nick, Leo, Daniel, Mark, Dave, Sean, Simon)
On 2022-09-15 04:55, Michel Dänzer wrote:
On 2022-09-14 22:08, Alex Hung wrote:
On 20
On 2022-09-12 18:02, Nathan Chancellor wrote:
Hi Rodrigo,
On Mon, Sep 12, 2022 at 05:50:31PM -0400, Rodrigo Siqueira Jordao wrote:
On 2022-08-30 16:34, Nathan Chancellor wrote:
Hi all,
This series aims to address the following warnings, which are visible
when building x86_64
an,
First of all, thanks a lot for your patchset!
Sorry for the delay; it took me more time than I expected to review and
run a couple of tests in this patchset (most of them were IGT). Anyway,
I'm good with this change; this series is:
Reviewed-by: Rodrigo Siqueira
And I applied it to amd
);
}
static enum dc_status enable_link_dp_mst(
LGTM,
Reviewed-by: Rodrigo Siqueira
and applied to amd-staging-drm-next.
Thanks
Siqueira
On 2022-09-06 11:06, Greg Kroah-Hartman wrote:
On Tue, Sep 06, 2022 at 10:52:28AM -0400, Rodrigo Siqueira Jordao wrote:
On 2022-09-02 09:10, Greg Kroah-Hartman wrote:
On Fri, Sep 02, 2022 at 03:01:05PM +0200, Greg Kroah-Hartman wrote:
When calling debugfs_lookup() the result must have
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Alex Deucher
Cc: "Christian König"
Cc: "Pan, Xinhui"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Wayne Lin
Cc: hersen wu
Cc: Wenjing Liu
Cc: Patrik Jakobsson
Cc: Thelford Williams
Cc: Fangzhi Zuo
Cc: Yongzhi Liu
Cc: Mikita Lipski
C
/* Since phantom pipe programming is moved to post_unlock_program_front_end,
* move the SubVP lock to after the phantom pipes have been setup
Reviewed-by: Rodrigo Siqueira
and applied to amd-staging-drm-next.
Thanks
Siqueira
Hi Tomeu,
First of all, nice patch! I just saw it, and I have some basic questions
(I don't understand many of these CI details). I also CC some CI folks
from the display team at AMD.
On 2022-07-26 14:16, Tomeu Vizoso wrote:
And use it to store expectations about what the DRM drivers are
sup
ane Properties
.. kernel-doc:: drivers/gpu/drm/drm_plane.c
:doc: standard plane properties
+.. _plane_composition_properties:
+
Plane Composition Properties
--------
Reviewed-by: Rodrigo Siqueira
specified DPP from the 'secondary' MPC tree.
*
* Parameters:
Reviewed-by: Rodrigo Siqueira
locks
+ * @dpp: color pipes caps for DPP
+ * @mpc: color pipes caps for MPC
+ */
struct dc_color_caps {
struct dpp_color_caps dpp;
struct mpc_color_caps mpc;
This also lgtm, but maybe Harry might want to check it.
From my side,
Reviewed-by: Rodrigo Siqueira
struct dc_plane_state *dc_plane_state)
lgtm,
Reviewed-by: Rodrigo Siqueira
On 2022-08-03 08:41, Imre Deak wrote:
On Tue, Aug 02, 2022 at 12:57:24PM -0400, Rodrigo Siqueira Jordao wrote:
On 2022-08-01 09:52, Imre Deak wrote:
Fix compiler warnings like the following triggered by
'-Wmissing-prototypes':
CC [M] drivers/gpu/drm/amd/amdgpu/../display
drm_device *, struct drm_framebuffer *, int *, int *)’
39 | void get_min_max_dc_plane_scaling(struct drm_device *dev,
complier warning.
Fixes: 5d945cbcd4b1 ("drm/amd/display: Create a file dedicated to planes")
Cc: Rodrigo Siqueira
Cc: Harry Wentland
Cc: Alan Liu
Signed-off-by:
o previous prototype for ‘amd_get_format_info’
[-Wmissing-prototypes]
I see "‘" around "amd_get_format_info"; I'm not sure if my email
client adds that or if there is something wrong in the commit message.
With the commit message change:
Reviewed-by: Rodrigo Siqueir
ml/dcn31 folder")
Signed-off-by: Magali Lemes
Reviewed-by: Maíra Canal
Reviewed-by: Melissa Wen
---
Series is Reviewed-by: André Almeida
Series also
Reviewed-by: Rodrigo Siqueira
Applied to amd-staging-drm-next.
Thanks
Siqueira
On 2022-08-02 09:05, Harry Wentland wrote:
On 2022-08-02 08:04, Magali Lemes wrote:
There are two identical CFLAGS entries for "display_mode_vba_20.o", so
remove one of them. Also, as there's already an entry for
"display_mode_lib.o" CFLAGS, regardless of CONFIG_DRM_AMD_DC_DCN being
defined o
ler_taps.v_taps;
dout_wb.wb_htaps_chroma =
wb_info->dwb_params.scaler_taps.h_taps_c;
dout_wb.wb_vtaps_chroma =
wb_info->dwb_params.scaler_taps.v_taps_c;
dout_wb.wb_hratio =
wb_info->dwb_params.cnv_params.crop_en
On 2022-07-20 18:54, Melissa Wen wrote:
On 07/17, Tales Lelo da Aparecida wrote:
On 16/07/2022 19:25, Melissa Wen wrote:
AMDGPU DM maps DRM color management properties (degamma, ctm and gamma)
to DC color correction entities. Part of this mapping is already
documented as code comments and ca
On 2022-07-20 15:32, Melissa Wen wrote:
An initial report from Guenter[1] shows some soft-fp vs hard-fp error
from DCN31 clk mgr for powerpc. I was not able to reproduce it
cross-compiling with gcc-powerpc-linux-gnu and gcc-11.3, but thanks to
Maíra tips, I can reproduce the issue using make.c
},
+ }
+};
+
static void calculate_wm_set_for_vlevel(int vlevel,
struct wm_range_table_entry *table_entry,
struct dcn_watermarks *wm_set,
Reviewed-by: Rodrigo Siqueira
ATERMARKS_MALL;
+ base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.min_dcfclk =
0;
+ base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.max_dcfclk =
0x;
+ base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.min_uclk =
min_uclk_mhz;
+ base->bw_params->wm_table.nv_entries[WM_D].pmfw_breakdown.max_uclk =
0x;
+}
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h
index dedfe7b5f173..c2024052a497 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.h
@@ -63,5 +63,6 @@ void dcn30_fpu_update_bw_bounding_box(struct dc *dc,
unsigned int *dcfclk_mhz,
unsigned int *dram_speed_mts);
+void dcn3_fpu_build_wm_range_table(struct clk_mgr *base);
#endif /* __DCN30_FPU_H__*/
Reviewed-by: Rodrigo Siqueira
dcn21_update_bw_bounding_box(struct dc *dc, struct clk_bw_params
*bw_params);
+void dcn21_clk_mgr_set_bw_params_wm_table(struct clk_bw_params *bw_params);
+
#endif /* __DCN20_FPU_H__ */
Reviewed-by: Rodrigo Siqueira
Very nice catch!
Reviewed-by: Rodrigo Siqueira
,
+ int pipe_cnt);
+
void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
void dcn31_calculate_wm_and_dlg_fp(
Reviewed-by: Rodrigo Siqueira
On 2022-06-18 19:27, Guenter Roeck wrote:
ppc:allmodconfig builds fail with the following error.
powerpc64-linux-ld:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o
uses hard float,
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn31/dcn31_resource.o
Hi,
First of all, thanks a lot for exploring the introduction of kunit
inside amdgpu.
See my inline comments
On 2022-06-18 05:08, David Gow wrote:
On Sat, Jun 18, 2022 at 4:24 AM Maíra Canal wrote:
On 6/17/22 04:55, David Gow wrote:
On Fri, Jun 17, 2022 at 6:41 AM Maíra Canal wrote:
H
3dlut = dcn30_release_post_bldn_3dlut,
Hi,
Sorry for the delay,
Reviewed-by: Rodrigo Siqueira
Also, applied to amd-staging-drm-next.
Thanks
Patch merged to amd-staging-drm-next.
Thanks a lot!
On 2022-04-05 15:32, Simon Ser wrote:
I've tested this patch and it fixes my bug [1]. Thanks!
Tested-by: Simon Ser
[1]: https://gitlab.freedesktop.org/drm/amd/-/issues/1734>
On 2022-03-26 16:24, Melissa Wen wrote:
From FPU documentation, developers must not use DC_FP_START/END in dml
files, but invoke it when calling FPU-associated functions (isolated in
dml folder). Therefore, the first patch renames dcn10_validate_bandwidth
in dml/calcs to dcn_ for generalizati
ND_MODE_PER_PIXEL_ALPHA;
+ } else {
+ blnd_cfg.alpha_mode = MPCC_ALPHA_BLEND_MODE_GLOBAL_ALPHA;
+ }
+
Hi Melissa,
Thanks a lot for this patch. I run your patch in our CI, and everything
looks good from the IGT test result.
In this sense:
Tested-by: Rodrigo Siqueira
Howev
On 2022-03-07 10:47, Melissa Wen wrote:
This series moves FPU code from DCN 3.1x drivers to dml/dcn31 folder to
isolate FPU operations. For this, it creates dcn31_fpu files to centralize
FPU operations and structs from dcn31x drivers, that include:
- _vcs_dpi_ip_params_st and _vcs_dpi_soc_boun
On 2022-02-21 06:31, Melissa Wen wrote:
Move parts of dcn20 code that uses FPU to dml folder. It aims to isolate
FPU operations as described by series:
drm/amd/display: Introduce FPU directory inside DC
https://patchwork.freedesktop.org/series/93042/
This patch moves the following functions
Hi Zhenneng,
+ some display folks
First of all, thanks a lot for your patch.
We had a similar patch in the past, but we had to revert it because we
cannot simply enable DCN for ARM-based systems. You can refer to this
commit message to get a better context:
https://gitlab.freedesktop.org/ag
1 - 100 of 456 matches
Mail list logo
