rm by default.
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Cc: Joonas Lahtinen
Cc: Jani Nikula
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index df7c261
for platforms greater than gen12.
v2:
- Use simple assignment to copy contents of the structure(JaniN)
Fixes: c2c7075225ef ("drm/i915: Read graphics/media/display arch version from
hw")
Cc: Jani Nikula
Cc: Lucas De Marchi
Cc: Matt Roper
Cc: Ville Syrjälä
Signed-off-by: Radhakrish
Rename struct ip_version to intel_ip_version to comply with the
naming conventions for structures.
Suggested-by: Jani Nikula
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_device_info.c | 2 +-
drivers/gpu/drm/i915/intel_device_info.h | 8
drivers/gpu/drm/i915
for platforms greater than gen12.
Fixes: c2c7075225ef ("drm/i915: Read graphics/media/display arch version from
hw")
Cc: Jani Nikula
Cc: Lucas De Marchi
Cc: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_device_info.c | 12 +++-
1 file c
Meteorlake PCH reuses Alderlake ddc pin mapping. Extend
ADL-P pin mapping for Meteorlake.
Cc: Lucas De Marchi
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display
nop in xcs offset(MattR)
v4:
- Fix rcs register offset(MattR)
v4.1:
- Fix commit message(Lucas)
Bspec: 46261, 46260, 45585
Cc: Balasubramani Vivekanandan
Cc: Licas De Marchi
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 84
nop in xcs offset(MattR)
v4:
- Fix rcs register offset(MattR)
v4.1:
- Fix commit message(Lucas)
Bspec: 46261, 46260, 45585
Cc: Balasubramani Vivekanandan
Cc: Licas De Marchi
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 84
ture platforms might break this formulae and may require a table
mapping to decode GMD step compatible with the convention.
v2:
- Pass the updated ip version structure
v3:
- Skip using GMD to step table(MattR)
Cc: Balasubramani Vivekanandan
Cc: Matt Roper
Signed-off-by: Radhakrishna Sripada
ccumentation changes.
- Normalize HAS_GMD_ID macro value.(JaniN)
Signed-off-by: Matt Roper
Signed-off-by: Rodrigo Vivi
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 +
drivers/gpu/drm/i915/i915_driver.c | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +
:
- Fix the spacing for nop in xcs offset(MattR)
v4:
- Fix rcs register offset(MattR)
Bspec: 46261, 46260, 45585
Cc: Balasubramani Vivekanandan
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 84 -
1 file
The PCI Id's and platform definition are posted earlier.
Handful of early enablement patches including support for
display power wells, VBT and AUX Channel mapping, PCH and
gmbus support, dbus, mbus, sagv and memory bandwidth support
got merged.
This series adds the support for a new way to read G
definitions for MTL_CHICKEN_TRANS(MattR)
Bspec: 34387, 50054
Cc: Jani Nikula
Cc: Matt Roper
Signed-off-by: Madhumitha Tolakanahalli Pradeep
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_display.c | 14 +++---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5
gned-off-by: Rodrigo Vivi
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 +
drivers/gpu/drm/i915/i915_driver.c | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/i915
youts
Radhakrishna Sripada (1):
drm/i915/mtl: Update MBUS_DBOX credits
drivers/gpu/drm/i915/display/intel_display.c | 14 +++-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +-
drivers/gpu/drm/i915/display/skl_watermark.c | 48 ++--
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 +
dr
.(Bala)
- Add missing nop in xcs offsets(Bala)
v3:
- Fix the spacing for nop in xcs offset(MattR)
Bspec: 46261, 46260, 45585
Cc: Balasubramani Vivekanandan
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 82
From: José Roberto de Souza
The GMD step field do not properly match the current stepping convention
that we use(STEP_A0, STEP_A1, STEP_B0...).
One platform could have { arch = 12, rel = 70, step = 1 } and the
actual stepping is STEP_B0 but without the translation of the step
field would mean ST
gets added/removed.(MattR)
Bspec: 49213
Cc: Jose Roberto de Souza
Cc: Matt Roper
Original Author: Caz Yokoyama
Signed-off-by: José Roberto de Souza
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/skl_watermark.c | 48 +---
drivers/gpu/drm/i915/i915_reg.h
.(Bala)
- Add missing nop in xcs offsets(Bala)
Bspec: 46261, 46260, 45585
Cc: Balasubramani Vivekanandan
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 82 -
1 file changed, 80 insertions(+), 2 deletions
gned-off-by: Rodrigo Vivi
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 +
drivers/gpu/drm/i915/i915_driver.c | 3 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/i915
:
- Avoid name collision for ip versions(Jani)
v4.1:
- Fix build error in mock_gem_device.c
Suggested-by: Jani Nikula
Cc: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_drv.h | 14 +++
drivers/gpu/drm/i915/i915_pci.c | 38
legacy pcode mailbox
interface.
Bspec: 64636
Cc: Matt Roper
Original Author: Caz Yokoyama
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_pm.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
Signed-off-by: Imre Deak
Signed-off-by: Radhakrishna Sripada
---
.../i915/display/intel_display_power_map.c| 115 +-
.../i915/display/intel_display_power_well.c | 44 +++
.../i915/display/intel_display_power_well.h | 4 +
drivers/gpu/drm/i915/display/intel_dp_aux.c
: Madhumitha Tolakanahalli Pradeep
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_display.c | 14 ---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +++-
drivers/gpu/drm/i915/display/intel_psr.c | 6 +++--
drivers/gpu/drm/i915/i915_reg.h | 25
off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_gmbus.c | 15 +++
drivers/gpu/drm/i915/display/intel_gmbus.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c
b/drivers/gpu/drm/i915/display/intel_gmbus.c
in
From: José Roberto de Souza
The GMD step field do not properly match the current stepping convention
that we use(STEP_A0, STEP_A1, STEP_B0...).
One platform could have { arch = 12, rel = 70, step = 1 } and the
actual stepping is STEP_B0 but without the translation of the step
field would mean ST
:
- Avoid name collision for ip versions(Jani)
Suggested-by: Jani Nikula
Cc: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_drv.h | 14 -
drivers/gpu/drm/i915/i915_pci.c | 38
drivers/gpu/drm/i915
m higher to lower(MattR)
- Restore platform definition for ADL-P(MattR)
- Move back intel_qgv_point def to intel_bw.c(Jani)
Bspec: 64636, 64608
Cc: Jani Nikula
Reviewed-by: Matt Roper
Original Author: Caz Yokoyama
Signed-off-by: José Roberto de Souza
Signed-off-by: Radhakrishna Sripada
---
From: Imre Deak
On MTL TypeC ports the AUX_CH_CTL and AUX_CH_DATA addresses have
changed wrt. previous platforms, adjust the code accordingly.
Signed-off-by: Imre Deak
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_dp_aux.c | 45 -
drivers/gpu
.(Bala)
Bspec: 46261, 46260, 45585
Cc: Balasubramani Vivekanandan
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 81 -
1 file changed, 79 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt
-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_reg.h | 4 +++
drivers/gpu/drm/i915/intel_pm.c | 47 ++---
2 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d22fabe35a0c
ec: 63361, 64111
v2:
- Move the IP version readout to intel_device_info.c
- Convert the macro into a function
v3:
- Move subplatform init to runtime early init
- Cache runtime ver, release info to compare with hardware values.
Signed-off-by: Matt Roper
Signed-off-by: Rodrigo Vivi
Signed-
drm/i915: Read graphics/media/display arch version from hw
drm/i915/mtl: Define engine context layouts
Radhakrishna Sripada (5):
drm/i915: Move display and media IP version to runtime info
drm/i915/mtl: Add gmbus and gpio support
drm/i915/mtl: Obtain SAGV values from MMIO instead of GT
ec: 63361, 64111
v2:
- Move the IP version readout to intel_device_info.c
- Convert the macro into a function
Signed-off-by: Matt Roper
Signed-off-by: Rodrigo Vivi
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 +
drivers/gpu/drm/i915/i915_driver.c |
From: José Roberto de Souza
The GMD step field do not properly match the current stepping convention
that we use(STEP_A0, STEP_A1, STEP_B0...).
One platform could have { arch = 12, rel = 70, step = 1 } and the
actual stepping is STEP_B0 but without the translation of the step
field would mean ST
m higher to lower(MattR)
- Restore platform definition for ADL-P(MattR)
- Move back intel_qgv_point def to intel_bw.c(Jani)
Bspec: 64636, 64608
Cc: Jani Nikula
Reviewed-by: Matt Roper
Original Author: Caz Yokoyama
Signed-off-by: José Roberto de Souza
Signed-off-by: Radhakrishna Sripada
---
platform offsets.
(And also updates existing CHICKEN_TRANS occurrences to the new definition)
v2: Omit display version check in i915_reg.h(Jani)
Bspec: 34387, 50054
Cc: Jani Nikula
Signed-off-by: Madhumitha Tolakanahalli Pradeep
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display
Signed-off-by: Imre Deak
Signed-off-by: Radhakrishna Sripada
---
.../i915/display/intel_display_power_map.c| 115 +-
.../i915/display/intel_display_power_well.c | 44 +++
.../i915/display/intel_display_power_well.h | 4 +
drivers/gpu/drm/i915/display/intel_dp_aux.c
legacy pcode mailbox
interface.
Bspec: 64636
Cc: Matt Roper
Original Author: Caz Yokoyama
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_pm.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
From: Imre Deak
On MTL TypeC ports the AUX_CH_CTL and AUX_CH_DATA addresses have
changed wrt. previous platforms, adjust the code accordingly.
Signed-off-by: Imre Deak
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_dp_aux.c | 45 -
drivers/gpu
.
Suggested-by: Jani Nikula
Cc: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_drv.h | 8
drivers/gpu/drm/i915/i915_pci.c | 20 ++--
drivers/gpu/drm/i915/intel_device_info.c | 12 ++--
drivers/gpu/drm/i915
.(Bala)
Bspec: 46261, 46260, 45585
Cc: Balasubramani Vivekanandan
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 81 -
1 file changed, 79 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt
-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_reg.h | 4 +++
drivers/gpu/drm/i915/intel_pm.c | 47 ++---
2 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d22fabe35a0c
off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_gmbus.c | 15 +++
drivers/gpu/drm/i915/display/intel_gmbus.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c
b/drivers/gpu/drm/i915/display/intel_gmbus.c
in
drm/i915: Read graphics/media/display arch version from hw
drm/i915/mtl: Define engine context layouts
Radhakrishna Sripada (5):
drm/i915: Move display and media IP version to runtime info
drm/i915/mtl: Add gmbus and gpio support
drm/i915/mtl: Obtain SAGV values from MMIO instead of GT
m higher to lower(MattR)
- Restore platform definition for ADL-P(MattR)
- Move back intel_qgv_point def to intel_bw.c(Jani)
Bspec: 64636, 64608
Cc: Matt Roper
Cc: Jani Nikula
Original Author: Caz Yokoyama
Signed-off-by: José Roberto de Souza
Signed-off-by: Radhakrishna Sripada
---
drivers
From: Imre Deak
Add the proper VBT port,AUX_CH -> i915 port,AUX_CH mapping which just
follows the ADL_P one.
Reviewed-by: Matt Roper
Signed-off-by: Imre Deak
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_bios.c | 14 +++---
1 file changed, 7 inserti
The initialization sequence for Meteorlake reuses the sequence for
icelake for most parts. Some changes viz. reset PICA handshake
are added.
Bspec: 49189
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_display_power.c | 3 +++
drivers/gpu/drm
platform offsets.
(And also updates existing CHICKEN_TRANS occurrences to the new definition)
v2: Omit display version check in i915_reg.h(Jani)
Bspec: 34387, 50054
Cc: Jani Nikula
Signed-off-by: Madhumitha Tolakanahalli Pradeep
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display
-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_reg.h | 4 +++
drivers/gpu/drm/i915/intel_pm.c | 47 ++---
2 files changed, 47 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5245af8d0ea8
: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
b/drivers/gpu/drm/i915/display
Signed-off-by: Imre Deak
Signed-off-by: Radhakrishna Sripada
---
.../i915/display/intel_display_power_map.c| 115 +-
.../i915/display/intel_display_power_well.c | 44 +++
.../i915/display/intel_display_power_well.h | 4 +
drivers/gpu/drm/i915/display/intel_dp_aux.c
Meteorlake uses a similar DBUF calculations as ADL-P.
Reuse the call flow for meteorlake.
Bspec: 49255
Original Author: Caz Yokoyama
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Imre Deak
On MTL TypeC ports the AUX_CH_CTL and AUX_CH_DATA addresses have
changed wrt. previous platforms, adjust the code accordingly.
Signed-off-by: Imre Deak
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_dp_aux.c | 45 -
drivers/gpu
Since Xe LPD+, Memory latency data are in LATENCY_LPX_LPY registers
instead of GT driver mailbox.
v2: Use the extracted wm latency adjustment function(Matt)
Bspec: 64608
Cc: Matt Roper
Original Author: Caz Yokoyama
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/i915_reg.h | 7
Like ADL_P, Meteorlake has different memory characteristics from
past platforms. Update the values used by our memory bandwidth
calculations accordingly.
Bspec: 64631
Reviewed-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915
No need to update mask value/restrict because
"Pcode only wants to use GV bandwidth value, not the mask value."
for Display version greater than 14.
Bspec: 646365
Cc: Matt Roper
Original Author: Caz Yokoyama
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel
From: Clint Taylor
MTL has a fixed rawclk of 38400Khz. Register does not need to be
reprogrammed.
Bspec: 49304
Reviewed-by: Matt Roper
Signed-off-by: Clint Taylor
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 7 +++
1 file changed, 7 insertions
Watermark latency is adjusted in cases when latency is 0us for level
greater than 1, the subsequent levels are disabled. Extract this logic
into its own function.
Suggested-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_pm.c | 88
From: Matt Roper
Previously only dgfx platforms had a 4MB MMIO range, but starting with
MTL we now use the larger range for all platforms.
Bspec: 63834, 63830
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_uncore.c | 11 ++-
1 file
context images are nearly
the same, although the layout had a very slight change --- one POSH
register was removed and the placement of some LRI/noops adjusted
slightly to compensate.
Bspec: 46261, 46260, 45585
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt
STEP_A1.
That is why we will need to have gmd_to_intel_step tables for each IP.
Signed-off-by: José Roberto de Souza
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_step.c | 60 +++
1 file changed, 60 insertions(+)
diff --git a/drivers/gpu/drm/i915
x build error
Bspec: 63361, 64111
Signed-off-by: Matt Roper
Signed-off-by: Rodrigo Vivi
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 +
drivers/gpu/drm/i915/i915_driver.c| 80 ++-
drivers/gpu/drm/i915/i915_drv.
From: Matt Roper
Unlike the Xe_HP platforms, MTL only has a single CCS engine; the
quad-based engine masking logic does not apply to this platform (or
presumably any future platforms that only have 0 or 1 CCS).
Signed-off-by: Matt Roper
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm
Add tables to map the GMBUS pin pairs to GPIO registers and port to DDC.
>From spec we have registers GPIO_CTL[1-5] mapped to native display phys and
GPIO_CTL[9-14] are mapped to TC ports.
BSpec: 49306
Original Author: Brian J Lovin
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i
Add support for Meteorpoint(MTP) PCH used with Meteorlake.
Cc: Matt Roper
Reviewed-by: Anusha Srivatsa
Signed-off-by: Clint Taylor
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_pch.c | 9 -
drivers/gpu/drm/i915/intel_pch.h | 4
2 files changed, 12 insertions
MMIO range is now 4MB
drm/i915/mtl: Don't mask off CCS according to DSS fusing
drm/i915/mtl: Define engine context layouts
Radhakrishna Sripada (10):
drm/i915/mtl: Add PCH support
drm/i915/mtl: Add gmbus and gpio support
drm/i915/mtl: Add support for MTL in Display Init sequences
14: Fix the check in connected_sink_max_bpp(Stan)
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Rodrigo Vivi
Cc: Kishore Kadiyala
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 49
drivers/gpu
Sunpeng Li
Acked-by: Daniel Vetter
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/drm_atomic.c| 5 +
drivers/gpu/drm/drm_atomic_helper.c | 4
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_connector.c | 41 +
i
c: Ville Syrjälä
Cc: Daniel Vetter
Cc: Rodrigo Vivi
Cc: Kishore Kadiyala
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 49
drivers/gpu/drm/i915/intel_dp.c | 4 +++
drivers/gpu/d
check code(Ville)
V9: Const display_info(Ville)
V10,V11: Fix CI issues.
V12: Add the Kernel documentation(Daniel)
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Cc: Sunpeng Li
Acked-by: Daniel Vetter
Signed-off-by: Ra
On Thu, Oct 11, 2018 at 12:55:15AM -0700, Lisovskiy, Stanislav wrote:
> On Wed, 2018-10-10 at 17:12 -0700, Radhakrishna Sripada wrote:
> > Use the newly added "max bpc" connector property to limit pipe bpp.
> >
> > V3: Use drm_connector_state to access the "
Kadiyala
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 48 +---
drivers/gpu/drm/i915/intel_dp.c | 4 +++
drivers/gpu/drm/i915/intel_hdmi.c| 5
3 files changed, 37 inserti
check code(Ville)
V9: Const display_info(Ville)
V10,V11: Fix CI issues.
V12: Add the Kernel documentation(Daniel)
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Cc: Sunpeng Li
Acked-by: Daniel Vetter
Signed-off-by: Ra
On Mon, Oct 01, 2018 at 09:23:38AM +0200, Daniel Vetter wrote:
> On Mon, Sep 24, 2018 at 02:08:14PM -0700, Radhakrishna Sripada wrote:
> > At times 12bpc HDMI cannot be driven due to faulty cables, dongles
> > level shifters etc. To workaround them we may need to drive the output
On Mon, Oct 01, 2018 at 04:48:01PM +0300, Ville Syrjälä wrote:
> On Mon, Sep 24, 2018 at 02:08:15PM -0700, Radhakrishna Sripada wrote:
> > Use the newly added "max bpc" connector property to limit pipe bpp.
> >
> > V3: Use drm_connector_state to access the "
check code(Ville)
V9: Const display_info(Ville)
V10,V11: Fix CI issues.
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Cc: Sunpeng Li
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/drm_atomic.c| 5
Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 48 +---
drivers/gpu/drm/i915/intel_dp.c | 4 +++
drivers/gpu/drm/i915/intel_hdmi.c| 5
3 files changed, 37 insertions(+), 20 deletions(-)
diff --g
check code(Ville)
V9: Const display_info(Ville)
V10: Fix CI issues.
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Cc: Sunpeng Li
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/drm_atomic.c| 5 +
d
Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 48 +---
drivers/gpu/drm/i915/intel_dp.c | 4 +++
drivers/gpu/drm/i915/intel_hdmi.c| 5
3 files changed, 37 insertions(+), 20 deletions(-)
diff --g
Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 48 +---
drivers/gpu/drm/i915/intel_dp.c | 4 +++
drivers/gpu/drm/i915/intel_hdmi.c| 5
3 files changed, 37 insertions(+), 20 deletions(-)
diff --g
check code(Ville)
V9: Const display_info(Ville)
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Reviewed-by: Ville Syrjälä
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/drm_atomic.c| 5 +
drive
check code(Ville)
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/drm_atomic.c| 5 +
drivers/gpu/drm/drm_atomic_helper.c | 4
drivers/gpu/drm/drm_ato
on to attach max_bpc property, remove the redundant
clamping of pipe bpp based on connector info
V7: Fix Checkpatch warnings
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Rodrigo Vivi
Cc: Kishore Kadiyala
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
on to attach max_bpc property, remove the redundant
clamping of pipe bpp based on connector info
V7: Fix Checkpatch warnings
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Rodrigo Vivi
Cc: Kishore Kadiyala
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
iel Vetter
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/drm_atomic.c| 24
drivers/gpu/drm/drm_atomic_helper.c | 4
drivers/gpu/drm/drm_atomic_uapi.c | 4
d
diyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/drm_atomic.c| 24
drivers/gpu/drm/drm_atomic_helper.c | 4
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_connector.
on to attach max_bpc property, remove the redundant
clamping of pipe bpp based on connector info
Cc: Ville Syrjälä
Cc: Daniel Vetter
Cc: Rodrigo Vivi
Cc: Kishore Kadiyala
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/
to satisfy kms_properties
V3: Move the property to drm_connector
V4: Split drm and i915 components(Ville)
V5: Make the property per connector(Ville)
Cc: Ville Syrjälä
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/dr
Cc: Rodrigo Vivi
Cc: Kishore Kadiyala
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 31 +++
drivers/gpu/drm/i915/intel_dp.c | 1 +
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/d
av Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/i915/intel_display.c | 25 +
drivers/gpu/drm/i915/intel_dp.c | 1 +
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_hdmi.c| 7 +++
drivers/gpu/drm/i915/
to satisfy kms_properties
V3: Move the property to drm_connector
V4: Split drm and i915 components(Ville)
Cc: Ville Syrjälä
Cc: Kishore Kadiyala
Cc: Rodrigo Vivi
Cc: Manasi Navare
Cc: Stanislav Lisovskiy
Signed-off-by: Radhakrishna Sripada
---
drivers/gpu/drm/drm_atomic.c| 4
drive
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