Hi Anusha,
On Wed, Apr 02, 2025 at 11:23:45AM -0400, Anusha Srivatsa wrote:
> Move to using the new API devm_drm_panel_alloc() to allocate the
> panel.
>
> Signed-off-by: Anusha Srivatsa
> ---
> drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 8 +---
> 1 file changed, 5 insertions(+), 3 dele
On Wed, Jul 17, 2024 at 08:48:29AM GMT, Dragan Simic wrote:
> Hello all,
>
> On 2024-07-17 08:29, Dragan Simic wrote:
> > From: Ondrej Jirman
> >
> > After a suspend and resume cycle, ISP1 stops receiving data, as observed
> > on the Pine64 PinePhone Pro, which is based on the Rockchip RK3399 So
Hi Guido,
On Wed, Jun 26, 2024 at 02:25:16PM GMT, Guido Günther wrote:
> [...]
> > - ret = ctx->desc->init_sequence(ctx);
> > - if (ret < 0) {
> > - dev_err(ctx->dev, "Panel init sequence failed: %d\n", ret);
> > - return ret;
> > - }
> > + ctx->desc->init_sequence(&dsi
On Mon, Jun 10, 2024 at 12:46:11PM GMT, Maxime Ripard wrote:
> On Sat, 24 Feb 2024 16:05:57 +0100, Ondřej Jirman wrote:
> > From: Ondrej Jirman
> >
> > This series refactors blender setup from individual planes to a common
> > place where it can be performed at once an
Hi Maxime,
On Sun, Apr 21, 2024 at 09:52:58PM GMT, Jernej Škrabec wrote:
> Dne petek, 19. april 2024 ob 15:36:17 GMT +2 je Ondřej Jirman napisal(a):
> > Hi,
> >
> > On Sat, Feb 24, 2024 at 04:05:57PM GMT, megi xff wrote:
> > > From: Ondrej Jirman
> > >
&g
On Mon, May 06, 2024 at 08:52:39AM GMT, Linus Walleij wrote:
> On Fri, May 3, 2024 at 11:36 PM Douglas Anderson
> wrote:
>
> > As talked about in commit d2aacaf07395 ("drm/panel: Check for already
> > prepared/enabled in drm_panel"), we want to remove needless code from
> > panel drivers that wa
On Sun, Apr 21, 2024 at 04:25:34PM GMT, Marek Vasut wrote:
> On 4/21/24 1:09 PM, Ondřej Jirman wrote:
> > Hi,
>
> Hi,
>
> > On Sun, Apr 21, 2024 at 02:22:35AM GMT, Marek Vasut wrote:
> > > Doing modeset in .atomic_pre_enable callback instead of dedicated
> &
Hi,
On Sun, Apr 21, 2024 at 02:22:35AM GMT, Marek Vasut wrote:
> Doing modeset in .atomic_pre_enable callback instead of dedicated .mode_set
> callback does not seem right. Undo this change, which was added as part of
Actually no. If anything, mode_set callback should be dropped entirely:
See ht
at allowed blender pipes to be
> disabled while corresponding DRM planes were requested to be enabled.
>
> Please take a look. :)
>
> v2:
> - use regmap_write where possible
> - add review tags
It would be nice to have this applied.
Kind regards,
o.
> Thank you ve
Hello Frank,
On Sun, Mar 10, 2024 at 02:32:29PM +0100, Frank Oltmanns wrote:
> +static int sun4i_rate_reset_notifier_cb(struct notifier_block *nb,
> + unsigned long event, void *data)
> +{
> + struct sun4i_rate_reset_nb *rate_reset = to_sun4i_rate_reset_nb(nb)
From: Ondrej Jirman
Identical configurations of planes can lead to different (and wrong)
layer -> pipe routing at HW level, depending on the order of atomic
plane changes.
For example:
- Layer 1 is configured to zpos 0 and thus uses pipe 0. No other layer
is enabled. This is a typical situati
From: Ondrej Jirman
These will be needed later on when we move layer configuration to
crtc update.
Signed-off-by: Ondrej Jirman
Reviewed-by: Maxime Ripard
Reviewed-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 4 +++-
drivers/gpu/drm/sun4i/sun4i_crtc.c| 2 +-
drivers/g
enabled.
Please take a look. :)
v2:
- use regmap_write where possible
- add review tags
Thank you very much,
Ondřej Jirman
Ondrej Jirman (3):
drm/sun4i: Unify sun8i_*_layer structs
drm/sun4i: Add more parameters to sunxi_engine commit callback
drm/sun4i: Fix layer zpos change/atomic
From: Ondrej Jirman
These structs are identical, use a single struct to represent private
data for the DRM plane. This is a preparation for configuring layer
routing from the CRTC (mixer) instead of current approach of setting
up routing from individual layer's atomic_update callback.
Signed-off
On Thu, Feb 22, 2024 at 09:02:53PM +0100, Jernej Škrabec wrote:
> Dne sreda, 21. februar 2024 ob 14:45:20 CET je Maxime Ripard napisal(a):
> > Hi,
> >
> > On Fri, Feb 16, 2024 at 08:04:26PM +0100, Ondřej Jirman wrote:
> > > From: Ondrej Jirman
> > >
>
On Thu, Feb 22, 2024 at 09:02:53PM +0100, Jernej Škrabec wrote:
> Dne sreda, 21. februar 2024 ob 14:45:20 CET je Maxime Ripard napisal(a):
> > Hi,
> >
> > On Fri, Feb 16, 2024 at 08:04:26PM +0100, Ondřej Jirman wrote:
> > > From: Ondrej Jirman
> > >
>
Hi Maxime,
On Wed, Feb 21, 2024 at 02:45:20PM +0100, Maxime Ripard wrote:
> Hi,
>
> On Fri, Feb 16, 2024 at 08:04:26PM +0100, Ondřej Jirman wrote:
> > From: Ondrej Jirman
> >
> > Identical configurations of planes can lead to different (and wrong)
> >
On Mon, Feb 19, 2024 at 11:02:01AM +0800, Andy Yan wrote:
> Hi Ondrej:
>
> On 2/18/24 23:17, Ondřej Jirman wrote:
> > Hi Andy,
> >
> > On Sun, Feb 18, 2024 at 07:14:56PM +0800, Andy Yan wrote:
> > > Hi,
> > >
> > > On 2/18/24 0
Hi Andy,
On Sun, Feb 18, 2024 at 07:14:56PM +0800, Andy Yan wrote:
> Hi,
>
> On 2/18/24 02:39, Ondřej Jirman wrote:
> > From: Ondrej Jirman
> >
> > On RK3399 one MIPI DSI device can be alternatively used with the ISP1,
> > to provide RX DPHY. When this is th
From: Ondrej Jirman
For panels that don't use video burst mode, hsclock should match the
pixel clock * bpp / lane exactly. This fixes display image corruption
on Pinephone Pro, which doesn't use video burst mode to drive the panel.
To simplify the addition of exact fout calculation for non-burst
From: Ondrej Jirman
On RK3399 one MIPI DSI device can be alternatively used with the ISP1,
to provide RX DPHY. When this is the case (ISP1 is enabled in device
tree), probe success of DRM is tied to probe success of ISP1 connected
camera sensor. This can fail if the user is able to killswitch the
From: Ondrej Jirman
Identical configurations of planes can lead to different (and wrong)
layer -> pipe routing at HW level, depending on the order of atomic
plane changes.
For example:
- Layer 1 is configured to zpos 0 and thus uses pipe 0. No other layer
is enabled. This is a typical situati
enabled.
Please take a look. :)
Thank you very much,
Ondřej Jirman
Ondrej Jirman (3):
drm/sun4i: Unify sun8i_*_layer structs
drm/sun4i: Add more parameters to sunxi_engine commit callback
drm/sun4i: Fix layer zpos change/atomic modesetting
drivers/gpu/drm/sun4i/sun4i_backend.c | 4
From: Ondrej Jirman
These structs are identical, use a single struct to represent private
data for the DRM plane. This is a preparation for configuring layer
routing from the CRTC (mixer) instead of current approach of setting
up routing from individual layer's atomic_update callback.
Signed-off
From: Ondrej Jirman
These will be needed later on when we move layer configuration to
crtc update.
Signed-off-by: Ondrej Jirman
---
drivers/gpu/drm/sun4i/sun4i_backend.c | 4 +++-
drivers/gpu/drm/sun4i/sun4i_crtc.c| 2 +-
drivers/gpu/drm/sun4i/sun8i_mixer.c | 5 -
drivers/gpu/drm/
Hi Frank,
On Sun, Feb 11, 2024 at 04:09:16PM +0100, Frank Oltmanns wrote:
> Hi Ondřej,
>
> On 2024-02-05 at 17:02:00 +0100, Ondřej Jirman wrote:
> > On Mon, Feb 05, 2024 at 04:54:07PM +0100, Ondřej Jirman wrote:
> >> On Mon, Feb 05, 2024 at 04:22:23PM +01
On Mon, Feb 05, 2024 at 04:54:07PM +0100, Ondřej Jirman wrote:
> On Mon, Feb 05, 2024 at 04:22:23PM +0100, Frank Oltmanns wrote:
> > On some pinephones the video output sometimes freezes (flips between two
> > frames) [1]. It seems to be that the reason for this behaviour is that
&g
On Mon, Feb 05, 2024 at 04:22:23PM +0100, Frank Oltmanns wrote:
> On some pinephones the video output sometimes freezes (flips between two
> frames) [1]. It seems to be that the reason for this behaviour is that
> PLL-MIPI, PLL-GPU and GPU are operating outside their limits.
>
> In this patch seri
Hello Manuel,
thank you for the changes, and finding time to post this.
On Sat, Jan 27, 2024 at 10:48:45AM +0100, Manuel Traut wrote:
> This includes support for both the v0.1 units that were sent to developers and
> the v2.0 units from production.
>
> v1.0 is not included as no units are known
On Fri, Jan 05, 2024 at 05:11:03PM +0100, Manuel Traut wrote:
> On Wed, Jan 03, 2024 at 10:42:54AM +0100, Ondřej Jirman wrote:
> > Hello Manuel,
> >
> > a few more things I noticed:
> >
> > On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrot
Hello Manuel,
a few more things I noticed:
On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote:
> From: Alexander Warnecke
>
> + leds {
> + compatible = "gpio-leds";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&flash_led_en_h>;
> +
> +
On Tue, Jan 02, 2024 at 09:56:20PM +0100, Jonas Karlman wrote:
> Hi Manuel and Ondřej,
>
> On 2024-01-02 19:07, Ondřej Jirman wrote:
> > Hello Manuel,
>
> [...]
>
> >> +
> >> +&sfc {
> >> + pinctrl-names = "default";
Hello Manuel,
see below...
On Tue, Jan 02, 2024 at 05:15:47PM +0100, Manuel Traut wrote:
> From: Alexander Warnecke
>
> [...]
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3566-pinetab2.dtsi
> new file mode 100644
> index ..5d
From: Ondrej Jirman
Before this patch, booting to Linux VT and doing a simple:
echo 2 > /sys/class/graphics/fb0/blank
echo 0 > /sys/class/graphics/fb0/blank
would result in failures to re-enable the panel. Mode set callback is
called only once during boot in this scenario, while calls to
en
Hello Sam,
On Sat, Jun 17, 2023 at 07:35:53PM +0200, Sam Ravnborg wrote:
>
> Hi Ondřej,
>
> On Sat, Jun 17, 2023 at 05:06:33PM +0200, Ondřej Jirman wrote:
> > From: Ondrej Jirman
> >
> > Before this patch, booting to Linux VT and doing a simple:
> >
&g
From: Ondrej Jirman
Before this patch, booting to Linux VT and doing a simple:
echo 2 > /sys/class/graphics/fb0/blank
echo 0 > /sys/class/graphics/fb0/blank
would result in failures to re-enable the panel. Mode set callback is
called only once during boot in this scenario, while calls to
en
Hi,
On Sun, Feb 26, 2023 at 04:17:32PM +0100, Frank Oltmanns wrote:
> Hi Ondřej,
> hi Guido,
>
> On 2023-02-19 at 13:35:42 +0100, Ondřej Jirman wrote:
>
> > On Sun, Feb 19, 2023 at 12:45:53PM +0100, Frank Oltmanns wrote:
> >> Fix the XBD599 panel’s slight visual s
On Sun, Feb 19, 2023 at 12:45:53PM +0100, Frank Oltmanns wrote:
> Fix the XBD599 panel's slight visual stutter by correcting the pixel
> clock speed so that the panel's 60Hz vertical refresh rate is met.
>
> Set the clock speed using the underlying formula instead of a magic
> number. To have a co
Hello,
On Sun, Feb 12, 2023 at 06:52:05PM +0100, Frank Oltmanns wrote:
> Hi Ondřej,
> hi Guido,
>
> Ondřej, thank you very much for your feedback!
>
> I have a couple of questions.
>
> Ondřej Jirman writes:
>
> > On Sun, Feb 12, 2023 at 01:08:29PM +01
On Sun, Feb 12, 2023 at 01:08:29PM +0100, Frank Oltmanns wrote:
> In contrast to the JH057N panel, the XBD599 panel does not require a 20
> msec delay after initialization and exiting sleep mode. Therefore, move
> the delay into the already existing device specific initialization
> function.
>
> A
On Mon, Jan 02, 2023 at 02:51:42PM +0100, Javier Martinez Canillas wrote:
> Hello Ondřej,
>
> [...]
>
> My goal was to have some initial support in mainline even if there could be
> some
> issues. IMO it is better to use upstream as a baseline and attempt to support
> the
> PPP incrementally.
>
Hello Javier,
On Sat, Dec 31, 2022 at 04:15:24PM +0100, Javier Martinez Canillas wrote:
> Hello Ondřej,
>
> Thanks a lot for your comments.
>
> On 12/30/22 16:40, Ondřej Jirman wrote:
> > Hi Javier,
> >
> > On Fri, Dec 30, 2022 at 12:31:52PM +0100, Javier M
Hello Javier,
On Sat, Dec 31, 2022 at 04:29:49PM +0100, Javier Martinez Canillas wrote:
> Hello Ondřej,
>
> Thanks a lot for your feedback.
>
> On 12/30/22 16:37, Ondřej Jirman wrote:
>
> [...]
>
> >> &i2c0 {
> >>clock-frequency = &
Hi Javier,
On Fri, Dec 30, 2022 at 12:31:52PM +0100, Javier Martinez Canillas wrote:
> From: Kamil Trzciński
>
> The driver is for panels based on the Himax HX8394 controller, such as the
> HannStar HSD060BHW4 720x1440 TFT LCD panel that uses a MIPI-DSI interface.
I see you've removed debug pri
Hi Javier,
On Fri, Dec 30, 2022 at 12:31:54PM +0100, Javier Martinez Canillas wrote:
> From: Ondrej Jirman
>
> The phone's display is using Hannstar LCD panel, and Goodix based
> touchscreen. Support it.
>
> Signed-off-by: Ondrej Jirman
> Co-developed-by: Martijn Braam
> Signed-off-by: Martij
Hello,
On Fri, Dec 30, 2022 at 12:31:53PM +0100, Javier Martinez Canillas wrote:
> Add myself as maintainer for the driver and devicetree bindings schema.
>
> Signed-off-by: Javier Martinez Canillas
> Acked-by: Sam Ravnborg
> ---
>
> Changes in v4:
> - Add Sam Ravnborg's Acked-by tag.
>
> MA
Hi Roman,
On Thu, Jun 02, 2022 at 06:01:18PM +, Roman Stratiienko wrote:
> According to DE2.0/DE3.0 manual VI scaler enable register is double
> buffered, but de facto it doesn't, or the hardware has the shadow
> register latching issues which causes single-frame picture corruption
> after cha
t; Ondrej
>
> > which Christian pushed to drm-misc-next instead of drm-misc-fixes. I
> > already asked Christian in some other thread to cherry-pick it over.
> > -Daniel
> >
> > On Mon, Nov 15, 2021 at 3:56 PM Daniel Stone wrote:
> > > Hi Ond
drej,
> >
> > On Mon, 15 Nov 2021 at 07:35, Ondřej Jirman wrote:
> > > I'm getting some fence refcounting related panics with the current
> > > Linus's master branch:
> > >
> > > It happens immediately whenever I start Xorg or sway.
> >
Hello,
I'm getting some fence refcounting related panics with the current
Linus's master branch:
It happens immediately whenever I start Xorg or sway.
Anyone has any ideas where to start looking? It works fine with v5.15.
(sorry for the interleaved log, it's coming from multiple CPUs at once
I
Hello Jernej,
On Mon, Sep 13, 2021 at 07:21:54PM +0200, Jernej Skrabec wrote:
> Recent rework, which made HDMI PHY driver a platform device, inadvertely
> reversed clock setup order. HW is very touchy about it. Proper way is to
> handle controllers resets and clocks first and HDMI PHYs second.
>
On Wed, Mar 31, 2021 at 07:16:40PM +0200, Dafna Hirschfeld wrote:
> Hi,
>
> On 05.03.21 18:24, Ondřej Jirman wrote:
> > Hello Dafna,
> >
[...]
> > > > > + vconn-en1-gpios:
> > > > > +description: Controls the VCON
Hello Dafna,
On Fri, Mar 05, 2021 at 04:14:03PM +0100, Dafna Hirschfeld wrote:
> Hi
>
> On 05.03.21 15:34, Laurent Pinchart wrote:
> > Hi Dafna,
> >
> > Thank you for the patch.
> >
> > On Fri, Mar 05, 2021 at 01:43:50PM +0100, Dafna Hirschfeld wrote:
> > > ANX7688 is a USB Type-C port controll
On Tue, Sep 01, 2020 at 11:30:47PM +0300, Roman Stratiienko wrote:
> Fixes: e1ef9006663b ("drm/sun4i: Wire in DE2 YUV support")
> Signed-off-by: Roman Stratiienko
>
> ---
> CC: meg...@megous.com
> CC: jernej.skra...@gmail.com
> CC: linux-su...@googlegroups.com
> CC: dri-devel@lists.freedesktop.or
On Fri, Aug 28, 2020 at 02:35:26PM +0200, Jernej Škrabec wrote:
> Dne petek, 28. avgust 2020 ob 13:24:44 CEST je Ondrej Jirman napisal(a):
> > It's writing too much data. regmap_bulk_write expects number of
> > register sized chunks to write, not a byte sized length of the
> > bounce buffer. Bounce
On Fri, Aug 28, 2020 at 02:16:36PM +0200, Clément Péron wrote:
> Hi Maxime,
>
> On Tue, 25 Aug 2020 at 15:35, Maxime Ripard wrote:
> >
> > Hi Clement,
> >
> > On Mon, Aug 03, 2020 at 09:54:05AM +0200, Clément Péron wrote:
> > > Hi Maxime and All,
> > >
> > > On Sat, 4 Jul 2020 at 16:56, Clément P
Hello,
On Wed, Jul 29, 2020 at 05:48:09PM +0200, Guido Günther wrote:
> Hi,
> On Sat, Jul 18, 2020 at 07:42:15PM +0200, Ondřej Jirman wrote:
> > Hello,
> >
> > On Sat, Jul 18, 2020 at 07:31:24PM +0200, Guido Günther wrote:
> > > Hi,
> > > On Thu, Jul 1
Hello,
On Sat, Jul 18, 2020 at 07:31:24PM +0200, Guido Günther wrote:
> Hi,
> On Thu, Jul 16, 2020 at 04:32:09PM +0200, Ondřej Jirman wrote:
> > Hi Guido,
> >
> > On Thu, Jul 16, 2020 at 04:08:43PM +0200, Guido Günther wrote:
> > > Hi Ondrej,
> > >
Hi Guido,
On Thu, Jul 16, 2020 at 04:08:43PM +0200, Guido Günther wrote:
> Hi Ondrej,
> On Thu, Jul 16, 2020 at 02:37:51PM +0200, Ondrej Jirman wrote:
> > When extending the driver for xbd599 panel support I tried to do minimal
> > changes and keep the existing initialization timing.
> >
> > It t
Hello Clément,
On Sat, Jul 04, 2020 at 12:25:21PM +0200, Clément Péron wrote:
> Hi,
>
> This serie cleans and adds regulator support to Panfrost devfreq.
> This is mostly based on comment for the freshly introduced lima
> devfreq.
I tried to test the series, but I'm unsure what it's meant to
be
Hello Lukas,
On Sun, Jul 05, 2020 at 08:59:17AM +0200, Lukas Bulwahn wrote:
> Commit a74e81a56405 ("drm/panel: rocktech-jh057n00900: Rename the driver to
> st7703") and commit 7317f4574492 ("dt-bindings: panel: Convert
> rocktech,jh057n00900 to yaml") renamed and converted the files mentioned in
>
On Fri, Jul 03, 2020 at 12:44:48PM +0200, megous hlavni wrote:
> Hello Sam,
>
> On Fri, Jul 03, 2020 at 07:11:55AM +0200, Sam Ravnborg wrote:
> > Hi Ondrej.
> >
> > > > My bot found errors running 'make dt_binding_check' on your patch:
> > > >
> > > > /builds/robherring/linux-dt-review/Documenta
Hello Sam,
On Fri, Jul 03, 2020 at 07:11:55AM +0200, Sam Ravnborg wrote:
> Hi Ondrej.
>
> > > My bot found errors running 'make dt_binding_check' on your patch:
> > >
> > > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/display/bridge/nwl-dsi.example.dt.yaml:
> > > panel@0
On Thu, Jul 02, 2020 at 02:51:43PM -0600, Rob Herring wrote:
> On Wed, 01 Jul 2020 18:29:17 +0200, Ondrej Jirman wrote:
> > Convert Rocktech MIPI DSI panel driver from txt to yaml bindings.
> >
> > Signed-off-by: Ondrej Jirman
> > ---
> > .../display/panel/rocktech,jh057n00900.txt| 23 --
Hello Sam,
On Wed, Jul 01, 2020 at 07:30:18PM +0200, Sam Ravnborg wrote:
> Hi Ondrej.
>
> On Wed, Jul 01, 2020 at 06:29:15PM +0200, Ondrej Jirman wrote:
> > This patchset adds support for the LCD panel of PinePhone.
> >
> > I've tested this on PinePhone 1.0 and 1.2.
>
> Thanks for this nive ser
Hello Linus,
On Wed, Jul 01, 2020 at 09:50:40AM +0200, Linus Walleij wrote:
> On Fri, Jun 26, 2020 at 2:56 AM Ondrej Jirman wrote:
>
> > Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel used in
> > PinePhone. Add support for it.
> >
> > Signed-off-by: Icenowy Zheng
> > Signed-off-by: On
Hello,
On Wed, Jul 01, 2020 at 05:54:05PM +0200, Guido Günther wrote:
> Hi,
> On Wed, Jul 01, 2020 at 12:31:13PM +0200, Ondrej Jirman wrote:
> > This patchset adds support for the LCD panel of PinePhone.
>
> I gave this a quick spin on the Librem5 devkit so
>
> Tested-by: Guido Günther
>
> but
Hello Sam,
On Wed, Jul 01, 2020 at 05:25:32PM +0200, Sam Ravnborg wrote:
> Hi Ondrej.
>
> On Wed, Jul 01, 2020 at 12:31:13PM +0200, Ondrej Jirman wrote:
> > This patchset adds support for the LCD panel of PinePhone.
> >
> > I've tested this on PinePhone 1.0 and 1.2.
> >
> > Please take a look.
Hi Icenowy,
On Wed, Jul 01, 2020 at 08:01:14PM +0800, Icenowy Zheng wrote:
>
>
> 于 2020年7月1日 GMT+08:00 下午6:31:26, Ondrej Jirman 写到:
> >Pinephone has a Goodix GT917S capacitive touchscreen controller on
> >I2C0 bus. Add support for it.
> >
> >Signed-off-by: Ondrej Jirman
> >Acked-by: Linus Wall
Hello Guido,
On Wed, Jul 01, 2020 at 05:58:57PM +0200, Guido Günther wrote:
> Hi Ondrej,
> On Wed, Jul 01, 2020 at 12:31:15PM +0200, Ondrej Jirman wrote:
> > Convert Rocktech MIPI DSI panel driver from txt to yaml bindings.
> >
> > Signed-off-by: Ondrej Jirman
> > ---
> > .../display/panel/rock
Hello Sam,
On Mon, Jun 22, 2020 at 10:08:02AM +0200, Sam Ravnborg wrote:
> On Sun, Jun 21, 2020 at 12:30:10AM +0200, Ondřej Jirman wrote:
> > On Sat, Jun 20, 2020 at 11:25:29PM +0200, Sam Ravnborg wrote:
> > > Hi Ondrej et al.
...
> > > Would it not be better to
On Sat, Jun 20, 2020 at 11:25:29PM +0200, Sam Ravnborg wrote:
> Hi Ondrej et al.
>
> On Wed, Jun 17, 2020 at 02:32:07AM +0200, Ondrej Jirman wrote:
> > From: Icenowy Zheng
> >
> > Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
> > Xingbangda, which is used on PinePhone fina
Hello Linus,
On Tue, May 26, 2020 at 01:32:25PM +0200, Linus Walleij wrote:
> Hi Ondrej,
>
[...]
> > + dsi_dcs_write_seq(dsi, ST7703_CMD_SETGIP1,
> > + 0x82, 0x10, 0x06, 0x05, 0xA2, 0x0A, 0xA5, 0x12,
> > + 0x31, 0x23, 0x37, 0x83, 0x04, 0xBC,
On Thu, Mar 19, 2020 at 10:51:36PM +0800, Icenowy Zheng wrote:
> 在 2020-03-16星期一的 21:35 +0800，Icenowy Zheng写道：
> > PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
> > display.
> >
> > Add its device nodes.
> >
> > Signed-off-by: Icenowy Zheng
> > ---
> > No changes in v2.
> >
>
Hello Icenowy,
On Mon, Mar 16, 2020 at 09:35:01PM +0800, Icenowy Zheng wrote:
> Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
> Xingbangda, which is used on PinePhone final assembled phones.
>
> [snip]
>
> +static const struct drm_display_mode xbd599_default_mode = {
> +
On Tue, Mar 10, 2020 at 11:27:24AM +0100, Pascal Roeleven wrote:
> The Topwise A721/LY-F1 tablet is a tablet sold around 2012 under
> different brands. The mainboard mentions A721 clearly, so this tablet
> is best known under this name.
>
> Signed-off-by: Pascal Roeleven
> ---
> arch/arm/boot/dt
Hello Pascal,
On Tue, Mar 10, 2020 at 11:27:24AM +0100, Pascal Roeleven wrote:
> The Topwise A721/LY-F1 tablet is a tablet sold around 2012 under
> different brands. The mainboard mentions A721 clearly, so this tablet
> is best known under this name.
>
> Signed-off-by: Pascal Roeleven
> ---
> a
On Fri, Mar 06, 2020 at 09:46:51AM +0100, Enric Balletbo i Serra wrote:
> Hi Ondrej,
>
> On 5/3/20 20:35, Ondřej Jirman wrote:
> > Hi,
> >
> > On Thu, Mar 05, 2020 at 10:29:33AM -0800, Vasily Khoruzhick wrote:
> >> On Thu, Mar 5, 2020 at 7:28 AM Enric Balletbo
On Fri, Mar 06, 2020 at 04:53:46PM +0800, Icenowy Zheng wrote:
> 在 2020-03-06星期五的 09:46 +0100，Enric Balletbo i Serra写道：
> > Hi Ondrej,
> >
> > On 5/3/20 20:35, Ondřej Jirman wrote:
> > > Hi,
> > >
> > > On Thu, Mar 05, 2020 at 10:29:33AM -0800
On Fri, Mar 06, 2020 at 08:11:07PM +0800, Nicolas Boichat wrote:
> On Fri, Mar 6, 2020 at 8:07 PM Ondřej Jirman wrote:
>
> What about the values at 0x2c?
i2cdump 0 0x28
0 1 2 3 4 5 6 7 8 9 a b c d e f0123456789abcdef
00: aa aa 88 76 ac 00 00 00 00 00 00 00 00
Hi,
On Thu, Mar 05, 2020 at 10:29:33AM -0800, Vasily Khoruzhick wrote:
> On Thu, Mar 5, 2020 at 7:28 AM Enric Balletbo i Serra
> wrote:
> >
> > Hi Vasily,
>
> CC: Icenowy and Ondrej
> >
> > Would you mind to check which firmware version is running the anx7688 in
> > PinePhone, I think should be
HI Icenowy,
On Sun, Oct 06, 2019 at 11:12:43PM +0800, Icenowy Zheng wrote:
> 在 2019-10-06日的 22:44 +0800，Icenowy Zheng写道：
> > 在 2019-10-03四的 09:53 +0530，Jagan Teki写道：
> > > Hi Wens,
> > >
> > > On Tue, Oct 1, 2019 at 1:34 PM Icenowy Zheng
> > > wrote:
> > > > This reverts commit 62e7511a4f4dcf07f
Hi,
On Tue, Sep 24, 2019 at 02:40:54PM +0200, megous hlavni wrote:
> > > On first run of the X server, only the black screen and the layer
> > > containing the cursor is visible. Switching to console and back
> > > corrects the situation.
> > >
> > > I have dumped registers, and found out this
On Fri, Sep 20, 2019 at 05:11:42PM +0200, Maxime Ripard wrote:
> On Thu, Sep 19, 2019 at 03:12:44PM +0200, Ondřej Jirman wrote:
> > On Thu, Sep 19, 2019 at 02:20:58PM +0200, megous hlavni wrote:
> > > On Wed, Sep 18, 2019 at 10:16:17PM +0200, Maxime Ripard wrote:
> > > &
On Thu, Sep 19, 2019 at 02:20:58PM +0200, megous hlavni wrote:
> On Wed, Sep 18, 2019 at 10:16:17PM +0200, Maxime Ripard wrote:
> > On Wed, Sep 18, 2019 at 05:23:09PM +0200, Ondřej Jirman wrote:
> > > Hi,
> > >
> > > On Wed, Sep 18, 2019 at 04:17:34PM +0
On Wed, Sep 18, 2019 at 10:16:17PM +0200, Maxime Ripard wrote:
> On Wed, Sep 18, 2019 at 05:23:09PM +0200, Ondřej Jirman wrote:
> > Hi,
> >
> > On Wed, Sep 18, 2019 at 04:17:34PM +0200, Maxime Ripard wrote:
> > > Hi,
> > >
> > > On Sun, Sep 15, 2
Hi,
On Wed, Sep 18, 2019 at 04:17:34PM +0200, Maxime Ripard wrote:
> Hi,
>
> On Sun, Sep 15, 2019 at 12:03:37AM +0200, meg...@megous.com wrote:
> > From: Ondrej Jirman
> >
> > There are various issues that this re-work of sun8i_[uv]i_layer_enable
> > function fixes:
> >
> > - Make sure that we r
On Sun, Sep 15, 2019 at 12:03:37AM +0200, megous hlavni wrote:
> From: Ondrej Jirman
>
> There are various issues that this re-work of sun8i_[uv]i_layer_enable
> function fixes:
>
> - Make sure that we re-initialize zpos on reset
> - Minimize register updates by doing them only when state change
On Fri, Aug 09, 2019 at 10:25:32AM +0200, Code Kipper wrote:
> On Tue, 6 Aug 2019 at 17:57, wrote:
> >
> > From: Ondrej Jirman
> >
> > Orange Pi 3 has a DDC_CEC_EN signal connected to PH2, that enables the DDC
> > I2C bus voltage shifter. Before EDID can be read, we need to pull PH2 high.
> > Thi
On Mon, Jun 24, 2019 at 01:24:56PM -0700, David Miller wrote:
> From: Ondřej Jirman
> Date: Mon, 24 Jun 2019 19:46:37 +0200
>
> > This series was even longer before, with patches all around for various
> > maintainers. I'd expect that relevant maintainers pick the rang
On Mon, Jun 24, 2019 at 10:29:27AM -0700, David Miller wrote:
> From: meg...@megous.com
> Date: Thu, 20 Jun 2019 15:47:42 +0200
>
> > From: Ondrej Jirman
> >
> > This series implements support for Xunlong Orange Pi 3 board.
> >
> > - ethernet support (patches 1-3)
> > - HDMI support (patches 4-
On Thu, Jun 20, 2019 at 03:47:42PM +0200, verejna wrote:
> From: Ondrej Jirman
>
> This series implements support for Xunlong Orange Pi 3 board.
>
> - ethernet support (patches 1-3)
> - HDMI support (patches 4-6)
>
> For some people, ethernet doesn't work after reboot (but works on cold
> boot)
Hi Jernej,
On Thu, Jun 20, 2019 at 05:53:58PM +0200, Jernej Škrabec wrote:
> Hi!
>
> Dne četrtek, 20. junij 2019 ob 15:47:42 CEST je megous via linux-sunxi
> napisal(a):
> > From: Ondrej Jirman
> >
> > This series implements support for Xunlong Orange Pi 3 board.
> >
> > - ethernet support (p
Hi Jernej,
On Sun, Jun 16, 2019 at 01:05:13PM +0200, Jernej Škrabec wrote:
> Hi Ondrej!
>
> Dne ponedeljek, 27. maj 2019 ob 18:22:36 CEST je megous via linux-sunxi
> napisal(a):
> > From: Ondrej Jirman
> >
> > Orange Pi 3 board requires enabling a voltage shifting circuit via GPIO
> > for the
On Tue, Jun 11, 2019 at 03:52:06PM -0600, Rob Herring wrote:
> On Mon, 27 May 2019 18:22:35 +0200, meg...@megous.com wrote:
> > From: Ondrej Jirman
> >
> > Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable
> > on-board voltage shifting logic for the DDC bus using a gpio to
Hello,
On Mon, May 27, 2019 at 06:22:31PM +0200, megous via linux-sunxi wrote:
> From: Ondrej Jirman
>
> This series implements support for Xunlong Orange Pi 3 board.
>
> Unfortunately, this board needs some small driver patches, so I have
> split the boards DT patch into chunks that require pa
Hi Maxime,
On Tue, May 21, 2019 at 01:46:11PM +0200, Maxime Ripard wrote:
> Hi,
>
> On Tue, May 21, 2019 at 01:50:08AM +0200, meg...@megous.com wrote:
> > From: Ondrej Jirman
> >
> > Orange Pi 3 board requires enabling a voltage shifting circuit via GPIO
> > for the DDC bus to be usable.
> >
> >
Hello Sergei,
On Tue, May 21, 2019 at 12:27:24PM +0300, Sergei Shtylyov wrote:
> Hello!
>
> On 21.05.2019 2:50, meg...@megous.com wrote:
>
> > From: Icenowy Zheng
> >
> > The PHY selection bit also exists on SoCs without an internal PHY; if it's
> > set to 1 (internal PHY, default value) then
On Fri, Apr 26, 2019 at 01:23:37PM -0500, Rob Herring wrote:
> On Sat, Apr 13, 2019 at 06:54:15PM +0200, meg...@megous.com wrote:
> > From: Ondrej Jirman
> >
> > Some Allwinner SoC using boards (Orange Pi 3 for example) need to enable
> > on-board voltage shifting logic for the DDC bus to be usab
On Fri, Apr 26, 2019 at 03:02:50PM -0500, Rob Herring wrote:
> On Fri, Apr 26, 2019 at 2:20 PM Ondřej Jirman wrote:
> >
> > On Fri, Apr 26, 2019 at 01:23:37PM -0500, Rob Herring wrote:
> > > On Sat, Apr 13, 2019 at 06:54:15PM +0200, meg...@megous.com wrote:
>
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