[PATCH v4 0/5] drm/tiny: panel-mipi-dbi: Support 18 bits per color RGB666

2024-06-04 Thread Noralf Trønnes via B4 Relay
Hi, In this version I've fixed up a commit message that I had forgotten to write before sending and improved a struct member name. See version 1 of the patchset for the full cover letter. Signed-off-by: Noralf Trønnes --- Changes in v4: - Expand the commit message (Dmitry) - s/emulation_format

[PATCH v4 3/5] drm/mipi-dbi: Make bits per word configurable for pixel transfers

2024-06-04 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes MIPI DCS write/set commands have 8 bit parameters except for the write_memory commands where it depends on the pixel format. drm_mipi_dbi does currently only support RGB565 which is 16-bit and it has to make sure that the pixels enters the SPI bus in big endian format since t

[PATCH v4 2/5] drm/mipi-dbi: Remove mipi_dbi_machine_little_endian()

2024-06-04 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes mipi_dbi_machine_little_endian() should really have been called mipi_dbi_framebuffer_little_endian() because that's the function it performs. When I added support for these SPI displays I thought that the framebuffers on big endian machines were also big endian, but I have la

[PATCH v4 4/5] drm/mipi-dbi: Add support for DRM_FORMAT_RGB888

2024-06-04 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes DRM_FORMAT_RGB888 is 24 bits per pixel and it would be natural to send it on the SPI bus using a 24 bits per word transfer. The problem with this is that not all SPI controllers support 24 bpw. Since DRM_FORMAT_RGB888 is stored in memory as little endian and the SPI bus is b

[PATCH v4 1/5] dt-bindings: display: panel: mipi-dbi-spi: Add a pixel format property

2024-06-04 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes The MIPI DBI 2.0 specification (2005) lists only two pixel formats for the Type C Interface (SPI) and that is 3-bits/pixel RGB111 with 2 options for bit layout. For Type A and B (parallel) the following formats are listed: RGB332, RGB444, RGB565, RGB666 and RGB888 (some have

[PATCH v4 5/5] drm/tiny: panel-mipi-dbi: Support the pixel format property

2024-06-04 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes Add support for these pixel format property values: - r5g6b5, RGB565 - b6x2g6x2r6x2, BGR666 BGR666 is presented to userspace as RGB888. The 2 LSB in each color are discarded by the controller. The pixel is sent on the wire using 8 bits per word (little endian) so the control

[PATCH v3 4/5] drm/mipi-dbi: Add support for DRM_FORMAT_RGB888

2024-06-03 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes DRM_FORMAT_RGB888 is 24 bits per pixel and it would be natural to send it on the SPI bus using a 24 bits per word transfer. The problem with this is that not all SPI controllers support 24 bpw. Since DRM_FORMAT_RGB888 is stored in memory as little endian and the SPI bus is b

[PATCH v3 3/5] drm/mipi-dbi: Make bits per word configurable for pixel transfers

2024-06-03 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes This prepares for supporting other pixel formats than RGB565. Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/drm_mipi_dbi.c | 14 ++ include/drm/drm_mipi_dbi.h | 5 + 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/dr

[PATCH v3 1/5] dt-bindings: display: panel: mipi-dbi-spi: Add a pixel format property

2024-06-03 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes The MIPI DBI 2.0 specification (2005) lists only two pixel formats for the Type C Interface (SPI) and that is 3-bits/pixel RGB111 with 2 options for bit layout. For Type A and B (parallel) the following formats are listed: RGB332, RGB444, RGB565, RGB666 and RGB888 (some have

[PATCH v3 2/5] drm/mipi-dbi: Remove mipi_dbi_machine_little_endian()

2024-06-03 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes mipi_dbi_machine_little_endian() should really have been called mipi_dbi_framebuffer_little_endian() because that's the function it performs. When I added support for these SPI displays I thought that the framebuffers on big endian machines were also big endian, but I have la

[PATCH v3 0/5] drm/tiny: panel-mipi-dbi: Support 18 bits per color RGB666

2024-06-03 Thread Noralf Trønnes via B4 Relay
Hi, The binding and driver patches have been reviewed and I appreciate if someone can take a look at the drm_mipi_dbi patches. The first patch removes some erroneous big endian code and the 2 other makes it possible to configure bits per word for the SPI pixel transfer. It's currently hardcoded fo

[PATCH v3 5/5] drm/tiny: panel-mipi-dbi: Support the pixel format property

2024-06-03 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes Add support for these pixel format property values: - r5g6b5, RGB565 - b6x2g6x2r6x2, BGR666 BGR666 is presented to userspace as RGB888. The 2 LSB in each color are discarded by the controller. The pixel is sent on the wire using 8 bits per word (little endian) so the control

[PATCH v2 3/5] drm/mipi-dbi: Make bits per word configurable for pixel transfers

2024-05-12 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes This prepares for supporting other pixel formats than RGB565. Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/drm_mipi_dbi.c | 14 ++ include/drm/drm_mipi_dbi.h | 5 + 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/dr

[PATCH v2 5/5] drm/tiny: panel-mipi-dbi: Support the pixel format property

2024-05-12 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes Add support for these pixel format property values: - r5g6b5, RGB565 - b6x2g6x2r6x2, BGR666 BGR666 is presented to userspace as RGB888. The 2 LSB in each color are discarded by the controller. The pixel is sent on the wire using 8 bits per word (little endian) so the control

[PATCH v2 4/5] drm/mipi-dbi: Add support for DRM_FORMAT_RGB888

2024-05-12 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes DRM_FORMAT_RGB888 is 24 bits per pixel and it would be natural to send it on the SPI bus using a 24 bits per word transfer. The problem with this is that not all SPI controllers support 24 bpw. Since DRM_FORMAT_RGB888 is stored in memory as little endian and the SPI bus is b

[PATCH v2 1/5] dt-bindings: display: panel: mipi-dbi-spi: Add a pixel format property

2024-05-12 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes The MIPI DBI 2.0 specification (2005) lists only two pixel formats for the Type C Interface (SPI) and that is 3-bits/pixel RGB111 with 2 options for bit layout. For Type A and B (parallel) the following formats are listed: RGB332, RGB444, RGB565, RGB666 and RGB888 (some have

[PATCH v2 2/5] drm/mipi-dbi: Remove mipi_dbi_machine_little_endian()

2024-05-12 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes mipi_dbi_machine_little_endian() should really have been called mipi_dbi_framebuffer_little_endian() because that's the function it performs. When I added support for these SPI displays I thought that the framebuffers on big endian machines were also big endian, but I have la

[PATCH 4/5] drm/mipi-dbi: Add support for DRM_FORMAT_RGB888

2024-05-07 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes DRM_FORMAT_RGB888 is 24 bits per pixel and it would be natural to send it on the SPI bus using a 24 bits per word transfer. The problem with this is that not all SPI controllers support 24 bpw. Since DRM_FORMAT_RGB888 is stored in memory as little endian and the SPI bus is b

[PATCH 3/5] drm/mipi-dbi: Make bits per word configurable for pixel transfers

2024-05-07 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes This prepares for supporting other pixel formats than RGB565. Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/drm_mipi_dbi.c | 14 ++ include/drm/drm_mipi_dbi.h | 5 + 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/dr

[PATCH 5/5] drm/tiny: panel-mipi-dbi: Support the pixel format property

2024-05-07 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes Add support for these pixel format property values: - r5g6b5, RGB565 - b6x2g6x2r6x2, BGR666 BGR666 is presented to userspace as RGB888. The 2 LSB in each color are discarded by the controller. The pixel is sent on the wire using 8 bits per word (little endian) so the control

[PATCH 2/5] drm/mipi-dbi: Remove mipi_dbi_machine_little_endian()

2024-05-07 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes mipi_dbi_machine_little_endian() should really have been called mipi_dbi_framebuffer_little_endian() because that's the function it performs. When I added support for these SPI displays I thought that the framebuffers on big endian machines were also big endian, but I have la

[PATCH 1/5] dt-bindings: display: panel: mipi-dbi-spi: Add a pixel format property

2024-05-07 Thread Noralf Trønnes via B4 Relay
From: Noralf Trønnes The MIPI DBI 2.0 specification (2005) lists only two pixel formats for the Type C Interface (SPI) and that is 3-bits/pixel RGB111 with 2 options for bit layout. For Type A and B (parallel) the following formats are listed: RGB332, RGB444, RGB565, RGB666 and RGB888 (some have