#x27; when used with
drm_dp_mst_topology_mgr_init()
- Add/remove related DPCD code conversion from/to kHz where applicable
Signed-off-by: Nikola Cornij
Acked-by: Jani Nikula
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 ++--
drivers/gpu/drm/drm_dp_mst_topology.c | 8
Change log:
v2:
- Added 'Acked-by' to comment
v1:
- Initial
Nikola Cornij (1):
drm/dp_mst: Use kHz as link rate units when settig source max link
caps at init
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 ++--
drivers/gpu/drm/drm_dp_mst_
#x27; when used with
drm_dp_mst_topology_mgr_init()
- Add/remove related DPCD code conversion from/to kHz where applicable
Signed-off-by: Nikola Cornij
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 ++--
drivers/gpu/drm/drm_dp_mst_topology.c | 8
drivers/gpu/drm/i915/di
: Use Extended Base Receiver Capability DPCD
space")
Signed-off-by: Nikola Cornij
Reviewed-by: Lyude Paul
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i9
This is a follow-up change to fix incorrectly used max link rate source
capability at MST init time.
Change history:
v1:
- Initial
v2:
- Use local variabale for improved code readability
- Fix the comment to point to the correct sub-directory
Nikola Cornij (1):
drm/i915: Use the
: Use Extended Base Receiver Capability DPCD
space")
Signed-off-by: Nikola Cornij
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_m
This is a follow-up change to fix incorrectly used max link rate source
capability at MST init time.
Change history:
v1:
- Initial
Nikola Cornij (1):
drm/dp_mst: Use the correct max source link rate for i915
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 ++---
1 file changed, 2
#x27;commit ad44c03208e4 ("drm/dp_mst: Retrieve extended DPCD
caps for topology manager")'.
Signed-off-by: Nikola Cornij
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 18 ++
drivers/gpu/drm/amd/displ
ent format
v6:
- Submited from (hopefully) the correct repo to fix build error
v5:
- Fixed min_t() macro arguments
v4:
- Fixed drm/radeon/ lane count and rate
v3:
- Fixed check-patch errors
v2:
- No changes, this was my mistaken reply to my patch
v1:
- Initial revision
Nikola Cornij
#x27;commit ad44c03208e4 ("drm/dp_mst: Retrieve extended DPCD
caps for topology manager")'.
Signed-off-by: Nikola Cornij
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 18 ++
drivers/gpu/drm/amd/displ
he correct repo to fix build error
v5:
- Fixed min_t() macro arguments
v4:
- Fixed drm/radeon/ lane count and rate
v3:
- Fixed check-patch errors
v2:
- No changes, this was my mistaken reply to my patch
v1:
- Initial revision
Nikola Cornij (1):
drm/drm_mst: Use Extended Base Receiver
#x27;commit ad44c03208e4 ("drm/dp_mst: Retrieve extended DPCD
caps for topology manager")'.
Signed-off-by: Nikola Cornij
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 18 ++
drivers/gpu/drm/amd/displ
drm/radeon/ lane count and rate
v3:
- Fixed check-patch errors
v2:
- No changes, this was my mistaken reply to my patch
v1:
- Initial revision
Nikola Cornij (1):
drm/drm_mst: Use Extended Base Receiver Capability DPCD space
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/a
#x27;commit ad44c03208e4 ("drm/dp_mst: Retrieve extended DPCD
caps for topology manager")'.
Signed-off-by: Nikola Cornij
---
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 18 ++
drivers/gpu/drm/amd/displ
d rate
v3:
- Fixed check-patch errors
v2:
- No changes, this was my mistaken reply to my patch
v1:
- Initial revision
Nikola Cornij (1):
drm/drm_mst: Use Extended Base Receiver Capability DPCD space
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 5 +++
.../gpu/drm/amd/display/dc/core/dc_link_
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