Re: [PATCH v12 4/7] drm/meson: gate px_clk when setting rate

; + if (ret) { > + dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret > %d)\n", ret); > + return ret; > + } > + > switch (mipi_dsi->dsi_device->format) { > case MIPI_DSI_FMT_RGB888: > dpi_data_format = DPI_COLOR_24BIT; > > -- > 2.34.1 > Looks good to me Reviewed-by: Nicolas Belin

Re: [PATCH v5 11/17] drm/meson: add DSI encoder

/* > +* We should have now in place: > +* encoder->[dsi encoder bridge]->[dw-mipi-dsi bridge]->[panel > bridge]->[panel] > +*/ > + > + priv->encoders[MESON_ENC_DSI] = meson_encoder_dsi; > + > + dev_dbg(priv->dev, "DSI en

Re: [PATCH v5 09/17] drm/meson: only use components with dw-hdmi

omponents_dev_match, remote)) { > + component_match_add(&pdev->dev, &match, > component_compare_of, remote); > > - component_match_add(&pdev->dev, &match, component_compare_of, > remote); > + dev_dbg(&pdev->dev, "parent %pOF remote match add > %pOF parent %s\n", > + np, remote, dev_name(&pdev->dev)); > + } > > of_node_put(remote); > > > -- > 2.34.1 > Reviewed-by: Nicolas Belin Tested-by: Nicolas Belin # on Khadas VIM3 + TS050 Panel Thanks, Nicolas

Re: [PATCH v5 10/17] drm/meson: venc: add ENCL encoder setup for MIPI-DSI output

son/meson_venc.h > b/drivers/gpu/drm/meson/meson_venc.h > index 9138255ffc9e..0f59adb1c6db 100644 > --- a/drivers/gpu/drm/meson/meson_venc.h > +++ b/drivers/gpu/drm/meson/meson_venc.h > @@ -21,6 +21,7 @@ enum { > MESON_VENC_MODE_CVBS_PAL, > MESON_VENC_MODE_CV

Re: [PATCH v5 12/17] drm/meson: add support for MIPI-DSI transceiver

IT10 > +#define DPI_COLOR_12BIT_YCBCR_420 11 > + > +#define MIPI_DSI_TOP_DPI_COLOR_MODEGENMASK(23, 20) > +#define MIPI_DSI_TOP_IN_COLOR_MODE GENMASK(18, 16) > +#define MIPI_DSI_TOP_CHROMA_SUBSAMPLE GENMASK(15, 14) > +#define MIPI_DSI_TOP_COMP2_SEL GENMASK(13, 12) > +#define MIPI_DSI_TOP_COMP1_SEL GENMASK(11, 10) > +#define MIPI_DSI_TOP_COMP0_SEL GENMASK(9, 8) > +#define MIPI_DSI_TOP_DE_INVERT BIT(6) > +#define MIPI_DSI_TOP_HSYNC_INVERT BIT(5) > +#define MIPI_DSI_TOP_VSYNC_INVERT BIT(4) > +#define MIPI_DSI_TOP_DPICOLORM BIT(3) > +#define MIPI_DSI_TOP_DPISHUTDN BIT(2) > + > +#define MIPI_DSI_TOP_SUSPEND_CNTL 0x3cc > +#define MIPI_DSI_TOP_SUSPEND_LINE 0x3d0 > +#define MIPI_DSI_TOP_SUSPEND_PIX 0x3d4 > +#define MIPI_DSI_TOP_MEAS_CNTL 0x3d8 > +/* [0] R stat_edpihalt: edpihalt signal from IP.Default 0. */ > +#define MIPI_DSI_TOP_STAT 0x3dc > +#define MIPI_DSI_TOP_MEAS_STAT_TE0 0x3e0 > +#define MIPI_DSI_TOP_MEAS_STAT_TE1 0x3e4 > +#define MIPI_DSI_TOP_MEAS_STAT_VS0 0x3e8 > +#define MIPI_DSI_TOP_MEAS_STAT_VS1 0x3ec > +/* [31:16] RW intr_stat/clr. Default 0. > + * For each bit, read as this interrupt level status, > + * write 1 to clear. > + * [31:22] Reserved > + * [ 21] stat/clr of eof interrupt > + * [ 21] vde_fall interrupt > + * [ 19] stat/clr of de_rise interrupt > + * [ 18] stat/clr of vs_fall interrupt > + * [ 17] stat/clr of vs_rise interrupt > + * [ 16] stat/clr of dwc_edpite interrupt > + * [15: 0] RW intr_enable. Default 0. > + * For each bit, 1=enable this interrupt, 0=disable. > + * [15: 6] Reserved > + * [5] eof interrupt > + * [4] de_fall interrupt > + * [3] de_rise interrupt > + * [2] vs_fall interrupt > + * [1] vs_rise interrupt > + * [0] dwc_edpite interrupt > + */ > +#define MIPI_DSI_TOP_INTR_CNTL_STAT0x3f0 > +// 31: 2Reserved. Default 0. > +// 1: 0 RW mem_pd. Default 3. > +#define MIPI_DSI_TOP_MEM_PD0x3f4 > + > +#endif /* __MESON_DW_MIPI_DSI_H */ > > -- > 2.34.1 > Reviewed-by: Nicolas Belin Tested-by: Nicolas Belin # on Khadas VIM3 + TS050 Panel Thanks, Nicolas

Re: [PATCH v5 08/17] drm/meson: fix unbind path if HDMI fails to bind

; drm_dev_put(drm); > > + meson_encoder_hdmi_remove(priv); > + meson_encoder_cvbs_remove(priv); > + > + if (has_components) > + component_unbind_all(dev, drm); > + > return ret; > } > > > -- > 2.34.1 > Works fine on a Khadas VIM3 using a TS050 panel, Thanks Reviewed-by: Nicolas Belin Tested-by: Nicolas Belin

Re: [PATCH v5 13/17] drm/panel: khadas-ts050: update timings to achieve 60Hz refresh rate

7 + 5 + 160, > .vdisplay = 1920, > .vsync_start = 1920 + 4, > - .vsync_end = 1920 + 4 + 2, > - .vtotal = 1920 + 4 + 2 + 3, > + .vsync_end = 1920 + 4 + 3, > + .vtotal = 1920 + 4 + 3 + 31, > .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE

[PATCH 3/3] drm: bridge: it66121: Add audio support

Adding the audio support on the HDMI bridge for I2S only. Signed-off-by: Nicolas Belin Signed-off-by: Andy.Hsieh --- drivers/gpu/drm/bridge/ite-it66121.c | 627 +++ 1 file changed, 627 insertions(+) diff --git a/drivers/gpu/drm/bridge/ite-it66121.c b/drivers/gpu/drm

[PATCH 2/3] drm: bridge: it66121: Fix the register page length

Set the register page length or window length to 0x100 according to the documentation. Fixes: 988156dc2fc9 ("drm: bridge: add it66121 driver") Signed-off-by: Nicolas Belin --- drivers/gpu/drm/bridge/ite-it66121.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/d

[PATCH 0/3] drm: bridge: it66121: Add audio support

actual driver modifications in order to add the audio support on the ITE 66121 HDMI bridge. Nicolas Belin (3): dt-bindings: display: bridge: it66121: Add audio support drm: bridge: it66121: Fix the register page length drm: bridge: it66121: Add audio support .../bindings/display/bridge/ite

[PATCH 1/3] dt-bindings: display: bridge: it66121: Add audio support

Update the ITE bridge HDMI it66121 bindings in order to support audio. Signed-off-by: Nicolas Belin --- .../devicetree/bindings/display/bridge/ite,it66121.yaml| 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml b