drm_device *drm,
if (ret)
return ERR_PTR(ret);
- bridge->pre_enable_prev_first = panel->prepare_prev_first;
-
return bridge;
}
EXPORT_SYMBOL(drmm_panel_bridge_add);
---
base-commit: 8936cec5cb6e27649b86fabf383d7ce4113bba49
change-id: 20250220-panel_prev_first-fc90c6c8aefa
Best regards,
Reviewed-by: Neil Armstrong
ret = auxiliary_device_init(adev);
if (ret) {
of_node_put(adev->dev.platform_data);
---
base-commit: 4f27f06ec12190c7c62c722e99ab6243dea81a94
change-id: 20250608-fix-aud-hpd-bridge-97ec55341c4c
Best regards,
Reviewed-by: Neil Armstrong
@@
#include
#include
#include
+#include
#include
#include
Reviewed-by: Neil Armstrong
On 16/06/2025 18:05, Marek Vasut wrote:
On 6/16/25 1:45 PM, Neil Armstrong wrote:
On 13/06/2025 12:54, Marek Vasut wrote:
On 6/13/25 11:29 AM, Neil Armstrong wrote:
On 12/06/2025 01:49, Marek Vasut wrote:
Use u8 to hold lane count in struct ili9881c_desc {} to avoid
alignment gap between
On 13/06/2025 12:54, Marek Vasut wrote:
On 6/13/25 11:29 AM, Neil Armstrong wrote:
On 12/06/2025 01:49, Marek Vasut wrote:
Use u8 to hold lane count in struct ili9881c_desc {} to avoid
alignment gap between default_address_mode and lanes members.
The ili9881c controller can only operate up to
arten Lankhorst
Cc: Maxime Ripard
Cc: Neil Armstrong
Cc: Simona Vetter
Cc: Thomas Zimmermann
Cc: dri-devel@lists.freedesktop.org
Cc: linux-renesas-...@vger.kernel.org
---
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gp
*master, void *data)
info = adreno_info(config.chip_id);
/* We shouldn't have gotten this far if we don't recognize the GPU: */
- if (!WARN_ON(info))
+ if (WARN_ON(!info))
return -ENXIO;
config.info = info;
This does the trick a
On 10/06/2025 16:05, Krzysztof Kozlowski wrote:
v12.0 DPU on SM8750 comes with 10-bit color alpha. Add register
differences and new implementations of setup_alpha_out(),
setup_border_color() and setup_blend_config().
Notable changes in v6:
Correct fg_alpha shift on new DPU, pointed out by Abel
m_crtc *crtc,
struct dpu_plane_state *pstate = NULL;
const struct msm_format *format;
struct dpu_hw_ctl *ctl = mixer->lm_ctl;
-
- uint32_t lm_idx;
+ u32 lm_idx;
bool bg_alpha_enable = false;
DECLARE_BITMAP(active_fetch, SSPP_MAX);
Reviewed-by: Neil Armstrong
Hi,
On Sat, 07 Jun 2025 00:10:31 +0200, Martin Blumenstingl wrote:
> meson_vclk_vic_supported_freq() has a debug print which includes the
> pixel freq. However, within the whole function the pixel freq is
> irrelevant, other than checking the end of the params array. Switch to
> printing the vclk_
Hi,
On Mon, 09 Jun 2025 22:27:51 +0200, Martin Blumenstingl wrote:
> Commit 1017560164b6 ("drm/meson: use unsigned long long / Hz for
> frequency types") attempts to resolve video playback using 59.94Hz.
> using YUV420 by changing the clock calculation to use
> Hz instead of kHz (thus yielding mo
Hi,
On Fri, 06 Jun 2025 22:37:29 +0200, Martin Blumenstingl wrote:
> The "phy" and "vclk" frequency labels were swapped, making it more
> difficult to debug driver errors. Swap the label order to make them
> match with the actual frequencies printed to correct this.
>
>
Thanks, Applied to https
(vclk_freq == params[freq].vclk_freq ||
-vclk_freq ==
PIXEL_FREQ_1000_1001(params[freq].vclk_freq))) {
+ if (meson_vclk_freqs_are_matching_param(freq, phy_freq,
+ vclk_freq)) {
if (vclk_freq != params[freq].vclk_freq)
vic_alternate_clock = true;
else
Reviewed-by: Neil Armstrong
Hi,
On Sun, 08 Jun 2025 16:28:16 +0200, Marek Vasut wrote:
> Document the 7" Raspberry Pi 720x1280 DSI panel based on ili9881.
>
>
Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
(drm-misc-next)
[1/3] dt-bindings: ili9881c: Document 7" Raspberry Pi 720x1280
https:
Hi,
On Fri, 06 Jun 2025 13:45:49 +0200, Stefan Eichenberger wrote:
> This patch series adds support for the Winstar wf40eswaa6mnn0 panel. The
> datasheet including the init sequence was taken from here:
> https://www.winstar.com.tw/d/308/WF40ESWAA6MNN0.pdf
>
> Stefan Eichenberger (2):
> drm/pan
son and others
---
Cc: Conor Dooley
Cc: Dave Stevenson
Cc: David Airlie
Cc: Jessica Zhang
Cc: Krzysztof Kozlowski
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Neil Armstrong
Cc: Rob Herring
Cc: Simona Vetter
Cc: Thomas Zimmermann
Cc: devicet...@vger.kernel.org
Cc: dri-devel@lists.fre
;)
by Dave Stevenson and others
---
Cc: Conor Dooley
Cc: Dave Stevenson
Cc: David Airlie
Cc: Jessica Zhang
Cc: Krzysztof Kozlowski
Cc: Maarten Lankhorst
Cc: Maxime Ripard
Cc: Neil Armstrong
Cc: Rob Herring
Cc: Simona Vetter
Cc: Thomas Zimmermann
Cc: devicet...@vger.kernel.org
Cc:
= &ts8550b_desc },
+ { .compatible = "winstar,wf40eswaa6mnn0", .data = &wf40eswaa6mnn0_desc
},
{ }
};
MODULE_DEVICE_TABLE(of, st7701_dsi_of_match);
Reviewed-by: Neil Armstrong
uot;,
i, params[i].phy_freq,
PHY_FREQ_1000_1001(params[i].phy_freq));
Reviewed-by: Neil Armstrong
"vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
+ "phy:%lluHz vclk=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n",
phy_freq, vclk_freq, venc_freq, hdmi_freq,
priv->venc.hdmi_use_enci);
Reviewed-by: Neil Armstrong
_major_ver >= 5)
ops->dp_phy_intf_sel = dpu_hw_dp_phy_intf_sel;
- if (cap & BIT(DPU_MDP_AUDIO_SELECT))
+ if (mdss_rev->core_major_ver == 4 ||
+ mdss_rev->core_major_ver == 5)
ops->intf_audio_select = dpu_hw_intf_audio_select;
}
Reviewed-by: Neil Armstrong
Hi,
On Tue, 20 May 2025 09:41:10 +0200, Michael Walle wrote:
> The panel lacked the connector type which causes a warning. Adding the
> connector type reveals wrong bus_flags and bits per pixel. Fix all of
> it.
>
>
Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
(drm-mis
Hi,
On Wed, 21 May 2025 17:32:05 -0700, Douglas Anderson wrote:
> It's unclear why I originally wrote in the description of
> `prepare_to_enable` that "This is not specified in a standard way on
> eDP timing diagrams" and then also wrote "It is effectively the time
> from HPD going high till you c
Hi,
On Mon, 19 May 2025 16:33:45 +0300, Andy Shevchenko wrote:
> struct device *dev from struct ili9341 is not used anywhere, remove it.
>
>
Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
(drm-misc-next)
[1/1] drm/panel: ili9341: Remove unused member from struct ili9341
Hi,
On Tue, 03 Jun 2025 14:39:26 -0500, Chris Morgan wrote:
> From: Chris Morgan
>
> Add support for the DSI panel as found on the Gameforce Ace handheld
> gaming console based on the RK3588s.
>
> Chris Morgan (4):
> dt-bindings: vendor-prefixes: Add prefix for Huiling
> dt-bindings: displa
Hi,
On Tue, 20 May 2025 09:44:38 +0200, Michael Walle wrote:
> Add AUO P238HAN01 23.8" 1920x1080 LVDS panel compatible string.
>
>
Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
(drm-misc-next)
[1/2] dt-bindings: display: simple: add AUO P238HAN01 panel
https://g
On 20/05/2025 22:44, Dmitry Baryshkov wrote:
From: Dmitry Baryshkov
Change the MSM HDMI driver to use generic PHY subsystem. Moving PHY
drivers allows better code sharing with the rest of the PHY system.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/ms
0x094
+#define UNIPHY_PLL_CAL_CFG11 0x098
+#define UNIPHY_PLL_STATUS 0x0c0
+
+#endif
Reviewed-by: Neil Armstrong
+#define UNIPHY_PLL_DEBUG_BUS0 0x0c4
+#define UNIPHY_PLL_DEBUG_BUS1 0x0c8
+#define UNIPHY_PLL_DEBUG_BUS2 0x0cc
+#define UNIPHY_PLL_DEBUG_BUS3 0x0d0
+#define UNIPHY_PLL_CTRL_54 0x0d4
#endif
Reviewed-by: Neil Armstrong
*
-* This is not specified in a standard way on eDP timing diagrams.
+* This is usually (T4+T5+T6+T8)-min on eDP timing diagrams.
* It is effectively the time from HPD going high till you can
* turn on the backlight.
*/
Reviewed-by: Neil Armstrong
On 20/05/2025 23:29, Dmitry Baryshkov wrote:
On Tue, May 20, 2025 at 09:57:38AM +0200, neil.armstr...@linaro.org wrote:
On 19/05/2025 18:04, Dmitry Baryshkov wrote:
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_CTL_ACTIVE_CFG feature bit with the
DPU_INTF_INPUT_CTRL = 0x1,
- DPU_INTF_MAX
-};
-
/**
* WB sub-blocks and features
* @DPU_WB_LINE_MODEWriteback module supports line/linear mode
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
index
54c2e984ef0ce604e3eda49595d2816ea41bd7fd..a80ac82a96255da1d52e1f2fa7fc39388fc3782b
100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c
@@ -588,7 +588,7 @@ struct dpu_hw_intf *dpu_hw_intf_init(struct drm_device *dev,
c->ops.setup_misr = dpu_hw_intf_setup_misr;
c->ops.collect_misr = dpu_hw_intf_collect_misr;
- if (cfg->features & BIT(DPU_INTF_INPUT_CTRL))
+ if (mdss_rev->core_major_ver >= 5)
c->ops.bind_pingpong_blk = dpu_hw_intf_bind_pingpong_blk;
/* INTF TE is only for DSI interfaces */
Reviewed-by: Neil Armstrong
- if (cap & BIT(DPU_INTF_STATUS_SUPPORTED))
+ if (intf->mdss_ver->core_major_ver >= 5)
s->is_en = DPU_REG_READ(c, INTF_STATUS) & BIT(0);
else
s->is_en = DPU_REG_READ(c, INTF_TIMING_ENGINE_EN);
Reviewed-by: Neil Armstrong
e6f3e56ed1f9af581bad9845971fad315ef83c
100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -113,8 +113,6 @@
#define CTL_SM8550_MASK \
(CTL_SC7280_MASK | BIT(DPU_CTL_HAS_LAYER_EXT4))
-#define DSPP_SC7180_MASK BIT(DPU_DSPP_PCC)
-
#define INTF_SC7180_MASK \
(BIT(DPU_INTF_INPUT_CTRL) | \
BIT(DPU_INTF_STATUS_SUPPORTED) | \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
index
0f5a74398e66642fba48c112db41ffc75ae2a79f..11fb1bc54fa92a5d9926addb437bc4b8f283723b
100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c
@@ -90,7 +90,7 @@ struct dpu_hw_dspp *dpu_hw_dspp_init(struct drm_device *dev,
/* Assign ops */
c->idx = cfg->id;
c->cap = cfg;
- if (test_bit(DPU_DSPP_PCC, &c->cap->features))
+ if (c->cap->sblk->pcc.base)
c->ops.setup_pcc = dpu_setup_dspp_pcc;
return c;
Reviewed-by: Neil Armstrong
CONNECTOR_LVDS,
};
static const struct display_timing evervision_vgg804821_timing = {
Reviewed-by: Neil Armstrong
g190ean01",
.data = &auo_g190ean01,
+ }, {
+ .compatible = "auo,p238han01",
+ .data = &auo_p238han01,
}, {
.compatible = "auo,p320hvn03",
.data = &auo_p320hvn03,
Reviewed-by: Neil Armstrong
, MDP_PERIPH_TOP0,
dpu_kms->mmio + cat->mdp[0].base, "top");
msm_disp_snapshot_add_block(disp_state, cat->mdp[0].len -
MDP_PERIPH_TOP0_END,
Reviewed-by: Neil Armstrong
struct dpu_hw_ctl *hw;
const struct dpu_ctl_cfg *ctl = &cat->ctl[i];
- hw = dpu_hw_ctl_init(dev, ctl, mmio, cat->mixer_count, cat->mixer);
+ hw = dpu_hw_ctl_init(dev, ctl, mmio, cat->mdss_ver,
cat->mixer_count, cat->mixer);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed ctl object creation: err %d\n", rc);
Reviewed-by: Neil Armstrong
->core_major_ver >= 5) {
/*
* DATA_HCTL_EN controls data timing which can be different from
* video timing. It is recommended to enable it for all cases,
except
Reviewed-by: Neil Armstrong
On 19/05/2025 18:04, Dmitry Baryshkov wrote:
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_MDP_AUDIO_SELECT feature bit with the core_major_ver == 8 ||
core_major_ver == 5 check.
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
---
pp_init(struct drm_device *dev,
/* Assign ops */
c->idx = cfg->id;
c->cap = cfg;
- _setup_dspp_ops(c, c->cap->features);
+ if (test_bit(DPU_DSPP_PCC, &c->cap->features))
+ c->ops.setup_pcc = dpu_setup_dspp_pcc;
return c;
}
Reviewed-by: Neil Armstrong
= cfg;
- _setup_mdp_ops(&mdp->ops, mdp->caps->features, mdss_rev);
+ _setup_mdp_ops(&mdp->ops, mdss_rev);
return mdp;
}
Reviewed-by: Neil Armstrong
* @DPU_MIXER_MAX maximum value
*/
enum {
- DPU_MIXER_LAYER = 0x1,
- DPU_MIXER_SOURCESPLIT,
- DPU_MIXER_GC,
- DPU_MIXER_MAX
+ DPU_MIXER_SOURCESPLIT = 0x1,
+ DPU_MIXER_MAX,
};
/**
Reviewed-by: Neil Armstrong
- */
-enum {
- DPU_PINGPONG_SPLIT = 0x1,
- DPU_PINGPONG_SLAVE,
- DPU_PINGPONG_MAX
-};
-
/**
* CTL sub-blocks
* @DPU_CTL_SPLIT_DISPLAY:CTL supports video mode split display
Reviewed-by: Neil Armstrong
{
- DPU_MDP_PANIC_PER_PIPE = 0x1,
- DPU_MDP_10BIT_SUPPORT,
- DPU_MDP_MAX
-};
-
/**
* SSPP sub-blocks/features
* @DPU_SSPP_SCALER_QSEED2, QSEED2 algorithm support
Reviewed-by: Neil Armstrong
ion *mdss_ver;
+
/* Ops */
struct dpu_hw_sspp_ops ops;
};
Reviewed-by: Neil Armstrong
.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -171,7 +171,7 @@ int dpu_rm_init(struct drm_device *dev,
if (cat->mdss_ver->core_major_ver >= 7)
hw = dpu_hw_dsc_init_1_2(dev, dsc, mmio);
else
- hw = dpu_hw_dsc_init(dev, dsc, mmio);
+ hw = dpu_hw_dsc_init(dev, dsc, mmio, cat->mdss_ver);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
Reviewed-by: Neil Armstrong
s(struct dpu_hw_wb_ops *ops,
if (test_bit(DPU_WB_CDP, &features))
ops->setup_cdp = dpu_hw_wb_setup_cdp;
- if (test_bit(DPU_WB_INPUT_CTRL, &features))
+ if (mdss_rev->core_major_ver >= 5)
ops->bind_pingpong_blk = dpu_hw_wb_bind_pingpong_blk;
if (mdss_rev->core_major_ver >= 9)
Reviewed-by: Neil Armstrong
struct dpu_dsc_blk ctl = cat->dsc[i].sblk->ctl;
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index
7bcb1e057b143a5512aafbd640199c8f3b436527..c2a659512cb747e1dd5ed9e28534286ff8d67f4f
100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
@@ -168,7 +168,7 @@ int dpu_rm_init(struct drm_device *dev,
struct dpu_hw_dsc *hw;
const struct dpu_dsc_cfg *dsc = &cat->dsc[i];
- if (test_bit(DPU_DSC_HW_REV_1_2, &dsc->features))
+ if (cat->mdss_ver->core_major_ver >= 7)
hw = dpu_hw_dsc_init_1_2(dev, dsc, mmio);
else
hw = dpu_hw_dsc_init(dev, dsc, mmio);
Reviewed-by: Neil Armstrong
73dab18c89e4159855da4d2b
100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -89,12 +89,6 @@
#define MIXER_MSM8998_MASK \
(BIT(DPU_MIXER_SOURCESPLIT))
-#define MIXER_SDM845_MASK \
- (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER))
-
-#define MIXER_QCM2290_MASK \
- (BIT(DPU_DIM_LAYER))
-
#define WB_SDM845_MASK (BIT(DPU_WB_LINE_MODE) | \
BIT(DPU_WB_UBWC) | \
BIT(DPU_WB_YUV_CONFIG) | \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index
5e4608d10c6d4fee387c9a599a73b15661148430..cc17b20a7d4c15b0cd9c5dc8b9a4b78d4cb78315
100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -84,14 +84,12 @@ enum {
* @DPU_MIXER_LAYER Layer mixer layer blend configuration,
* @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration
* @DPU_MIXER_GC Gamma correction block
- * @DPU_DIM_LAYER Layer mixer supports dim layer
* @DPU_MIXER_MAX maximum value
*/
enum {
DPU_MIXER_LAYER = 0x1,
DPU_MIXER_SOURCESPLIT,
DPU_MIXER_GC,
- DPU_DIM_LAYER,
DPU_MIXER_MAX
};
Reviewed-by: Neil Armstrong
DPU_ERROR("failed lm object creation: err %d\n", rc);
Reviewed-by: Neil Armstrong
fig = dpu_hw_lm_setup_blend_config;
+ c->ops.setup_alpha_out = dpu_hw_lm_setup_color3;
+ c->ops.setup_border_color = dpu_hw_lm_setup_border_color;
+ c->ops.setup_misr = dpu_hw_lm_setup_misr;
+ c->ops.collect_misr = dpu_hw_lm_collect_misr;
return c;
}
Reviewed-by: Neil Armstrong
On 19/05/2025 18:04, Dmitry Baryshkov wrote:
From: Dmitry Baryshkov
Continue migration to the MDSS-revision based checks and replace
DPU_CTL_ACTIVE_CFG feature bit with the core_major_ver >= 5 check.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
h_dspp =
dpu_hw_ctl_update_pending_flush_dspp;
- if (c->caps->features & BIT(DPU_CTL_FETCH_ACTIVE))
+ if (mdss_ver->core_major_ver >= 7)
c->ops.set_active_fetch_pipes =
dpu_hw_ctl_set_active_fetch_pipes;
c->idx = cfg->id;
Reviewed-by: Neil Armstrong
e_pending_flush_dspp_sub_blocks;
else
c->ops.update_pending_flush_dspp =
dpu_hw_ctl_update_pending_flush_dspp;
Reviewed-by: Neil Armstrong
_hw_ctl.c
index
edb82c81b0a449b1a7273fc258961b9447be8d9d..fe4fdfb8774b176fb024d76dc0bd269d9736d226
100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
@@ -575,7 +575,7 @@ static void dpu_hw_ctl_intf_cfg_v1(struct dpu_hw_ctl *ctx,
* per VM. Explicitly disable it until VM support is
* added in SW. Power on reset value is not disable.
*/
- if ((test_bit(DPU_CTL_VM_CFG, &ctx->caps->features)))
+ if (ctx->mdss_ver->core_major_ver >= 7)
mode_sel = CTL_DEFAULT_GROUP_ID << 28;
if (cfg->intf_mode_sel == DPU_CTL_MODE_SEL_CMD)
Reviewed-by: Neil Armstrong
autorefresh = dpu_hw_pp_disable_autorefresh;
}
- if (test_bit(DPU_PINGPONG_DSC, &cfg->features)) {
+ if (mdss_rev->core_major_ver < 7) {
c->ops.setup_dsc = dpu_hw_pp_setup_dsc;
c->ops.enable_dsc = dpu_hw_pp_dsc_enable;
c->ops.disable_dsc = dpu_hw_pp_dsc_disable;
Reviewed-by: Neil Armstrong
p/dpu1/dpu_hw_catalog.c
@@ -95,12 +95,6 @@
#define MIXER_QCM2290_MASK \
(BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA))
-#define PINGPONG_SDM845_MASK \
- (BIT(DPU_PINGPONG_DITHER))
-
-#define PINGPONG_SM8150_MASK \
- (BIT(DPU_PINGPONG_DITHER))
-
#define WB_SDM845_MASK (BIT(DPU_WB_LINE_MODE) | \
BIT(DPU_WB_UBWC) | \
BIT(DPU_WB_YUV_CONFIG) | \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
index
ac63f753b43615f7c34d2da51fce919fd77142bf..d48c26a7cb6b69961cebc19576e3f7fc3b8dd2c5
100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
@@ -117,13 +117,11 @@ enum {
* PINGPONG sub-blocks
* @DPU_PINGPONG_SPLIT PP block supports split fifo
* @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo
- * @DPU_PINGPONG_DITHER Dither blocks
* @DPU_PINGPONG_MAX
*/
enum {
DPU_PINGPONG_SPLIT = 0x1,
DPU_PINGPONG_SLAVE,
- DPU_PINGPONG_DITHER,
DPU_PINGPONG_MAX
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
index
49e03ecee9e8b567a3f809b977deb83731006ac0..138071be56496da9fdcaff902f68ebb09a212e2e
100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
@@ -325,7 +325,7 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(struct
drm_device *dev,
c->ops.disable_dsc = dpu_hw_pp_dsc_disable;
}
- if (test_bit(DPU_PINGPONG_DITHER, &cfg->features))
+ if (mdss_rev->core_major_ver >= 3)
c->ops.setup_dither = dpu_hw_pp_setup_dither;
return c;
Reviewed-by: Neil Armstrong
_sel;
else if (!(cap & BIT(DPU_MDP_PERIPH_0_REMOVED)))
ops->setup_vsync_source = dpu_hw_setup_wd_timer;
Reviewed-by: Neil Armstrong
;
const struct ili9341_config *conf;
struct drm_panel panel;
struct gpio_desc *reset_gpio;
Reviewed-by: Neil Armstrong
_pingpong_blk = dpu_hw_dsc_bind_pingpong_blk;
return c;
}
Reviewed-by: Neil Armstrong
nding_flush_dspp_sub_blocks;
+ else
+ c->ops.update_pending_flush_dspp =
dpu_hw_ctl_update_pending_flush_dspp;
+
+ if (c->caps->features & BIT(DPU_CTL_FETCH_ACTIVE))
+ c->ops.set_active_fetch_pipes =
dpu_hw_ctl_set_active_fetch_pipes;
+
c->idx = cfg->id;
c->mixer_count = mixer_count;
c->mixer_hw_caps = mixer;
Reviewed-by: Neil Armstrong
+125,8 @@ struct dpu_hw_intf {
enum dpu_intf idx;
const struct dpu_intf_cfg *cap;
+ const struct dpu_mdss_version *mdss_ver;
+
/* ops */
struct dpu_hw_intf_ops ops;
};
Reviewed-by: Neil Armstrong
Hi,
On Tue, 06 May 2025 02:43:38 +0800, I Hsin Cheng wrote:
> Coverity scan reported the usage of "mode->clock * 1000" may lead to
> integer overflow. Use "1000ULL" instead of "1000"
> when utilizing it to avoid potential integer overflow issue.
>
>
Thanks, Applied to https://gitlab.freedesktop
On 09/05/2025 20:27, Martin Blumenstingl wrote:
On Fri, May 9, 2025 at 5:35 PM wrote:
On 05/05/2025 20:43, I Hsin Cheng wrote:
Coverity scan reported the usage of "mode->clock * 1000" may lead to
integer overflow. Use "1000ULL" instead of "1000"
when utilizing it to avoid potential integer ov
On 05/05/2025 20:43, I Hsin Cheng wrote:
Coverity scan reported the usage of "mode->clock * 1000" may lead to
integer overflow. Use "1000ULL" instead of "1000"
when utilizing it to avoid potential integer overflow issue.
Link:
https://scan5.scan.coverity.com/#/project-view/10074/10063?selectedI
From: Caleb Connolly
Add support for another variant of the rm69299 panel. This panel is
1080x2160 and is found in the shift-axolotl (SHIFT6mq).
Signed-off-by: Caleb Connolly
[narmstrong: moved to panel_desc]
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/panel-visionox-rm69299.c
Switch to devm_regulator_bulk_get_const() to move the supply
data to const.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/panel-visionox-rm69299.c | 21 -
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-visionox-rm69299.c
From: Caleb Connolly
Document a new compatible string for the second panel variant.
Signed-off-by: Caleb Connolly
Acked-by: Rob Herring
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml | 4 +++-
1 file changed, 3 insertions(+), 1
Switch to devm_drm_panel_alloc() to add panel refcounting.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/panel-visionox-rm69299.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-visionox-rm69299.c
b/drivers/gpu/drm/panel/panel
Switch to the DSI _multi variants to simplify error handling.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/panel-visionox-rm69299.c | 48 +++---
1 file changed, 13 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-visionox-rm69299.c
b
/20220123173650.290349-5-ca...@connolly.tech/
Signed-off-by: Neil Armstrong
---
Changes in v2:
- Add panel_desc to support the variant
- Switch to _multi calls
- Switch to const supplies
- Switch to new panel alloc
- Fix shift panel init seq name
- Link to v1:
https://lore.kernel.org/r/20250507-topic-misc
In order to support a panel variant, add plumbing code to pass
init sequence and mode as compatible data.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/panel-visionox-rm69299.c | 58 ++
1 file changed, 32 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu
On 08/05/2025 19:24, Anusha Srivatsa wrote:
On Mon, Apr 7, 2025 at 6:04 AM Neil Armstrong mailto:neil.armstr...@linaro.org>> wrote:
On 03/04/2025 22:20, Anusha Srivatsa wrote:
> Start converting drivers to use the API - devm_drm_panel_alloc().
>
> Final
: removed cosmetic changes, fixed to apply, use enums to select mode]
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/panel/panel-visionox-rm69299.c | 221 ++---
1 file changed, 195 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-visionox-rm69299.c
b
Hi,
On Wed, 07 May 2025 11:19:21 +0200, Neil Armstrong wrote:
> Convert the Truly NT35597 2K display panel bindings to dt-schema.
>
> The vdispp-supply & vdispn-supply are not marked as required since
> in practice they are not defined in sdm845-mtp.dts which is the
> only use
Hi,
On Thu, 08 May 2025 16:34:46 +0200, Krzysztof Kozlowski wrote:
> Changes in v2:
> - Use devm_drm_panel_alloc (Neil)
> - Add novatek_nt37801_switch_page (Linus)
> - Add Rb tags
> - Link to v1:
> https://lore.kernel.org/r/20250505-sm8750-display-panel-v1-0-e5b539848...@linaro.org
>
> Add drive
Re-spin of [1] and [2] to finally document and support this panel
variant.
[1] https://lore.kernel.org/all/20220123173650.290349-4-ca...@connolly.tech/
[2] https://lore.kernel.org/all/20220123173650.290349-5-ca...@connolly.tech/
Signed-off-by: Neil Armstrong
---
Caleb Connolly (2):
dt
From: Caleb Connolly
Document a new compatible string for the second panel variant.
Signed-off-by: Caleb Connolly
Acked-by: Rob Herring
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/panel/visionox,rm69299.yaml | 4 +++-
1 file changed, 3 insertions(+), 1
From: Caleb Connolly
Add support for another variant of the rm69299 panel. This panel is
1080x2160 and is found in the shift-axolotl (SHIFT6mq).
Signed-off-by: Caleb Connolly
[narmstrong: removed cosmetic changes, fixed to apply, use enums to select mode]
Signed-off-by: Neil Armstrong
Convert the Truly NT35597 2K display panel bindings to dt-schema.
The vdispp-supply & vdispn-supply are not marked as required since
in practice they are not defined in sdm845-mtp.dts which is the
only used of these bindings.
Signed-off-by: Neil Armstrong
---
.../display/panel/truly,nt3559
On 06/05/2025 13:59, Dmitry Baryshkov wrote:
On Mon, 05 May 2025 12:02:56 -0500, Kevin Baker wrote:
Switch to panel timings based on datasheet for the AUO G101EVN01.0
LVDS panel. Default timings were tested on the panel.
Previous mode-based timings resulted in horizontal display shift.
Appl
Hi,
On Mon, 05 May 2025 12:02:56 -0500, Kevin Baker wrote:
> Switch to panel timings based on datasheet for the AUO G101EVN01.0
> LVDS panel. Default timings were tested on the panel.
>
> Previous mode-based timings resulted in horizontal display shift.
>
>
Thanks, Applied to https://gitlab.fr
.width = 216,
.height = 135,
},
.bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
+ .bus_flags = DRM_BUS_FLAG_DE_HIGH,
.connector_type = DRM_MODE_CONNECTOR_LVDS,
};
Reviewed-by: Neil Armstrong
;, ret);
+
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id novatek_nt37801_of_match[] = {
+ { .compatible = "novatek,nt37801" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, novatek_nt37801_of_match);
+
+static struct mipi_dsi_driver novatek_nt37801_driver = {
+ .probe = novatek_nt37801_probe,
+ .remove = novatek_nt37801_remove,
+ .driver = {
+ .name = "panel-novatek-nt37801",
+ .of_match_table = novatek_nt37801_of_match,
+ },
+};
+module_mipi_dsi_driver(novatek_nt37801_driver);
+
+MODULE_AUTHOR("Krzysztof Kozlowski ");
+MODULE_DESCRIPTION("Panel driver for the Novatek NT37801/NT37810 AMOLED DSI
panel");
+MODULE_LICENSE("GPL");
With that fixed:
Reviewed-by: Neil Armstrong
Thanks,
Neil
On 05/05/2025 13:41, Svyatoslav Ryhel wrote:
пн, 5 трав. 2025 р. о 10:50 Neil Armstrong пише:
On 03/05/2025 11:41, Svyatoslav Ryhel wrote:
R61307 is liquid crystal driver for high-definition amorphous silicon
(a-Si) panels and is ideal for tablets and smartphones.
Supported compatibles are
Hi,
On Wed, 30 Apr 2025 21:42:11 +0200, Barnabás Czémán wrote:
> Add driver for BOE TD4320 DSI panel, used in Xiaomi Redmi Note 7
> smartphones.
>
>
Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
(drm-misc-next)
[1/2] dt-bindings: display: panel: Add BOE TD4320
h
On 28/04/2025 23:07, Kevin Baker wrote:
Switch to panel timings based on datasheet for the AUO G101EVN01.0
LVDS panel. Default timings were tested on the panel.
Previous mode-based timings resulted in horizontal display shift.
Can you add a Fixes tag ?
Thanks,
Neil
Signed-off-by: Kevin Bak
v->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret) {
+ dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
+ drm_panel_remove(&priv->panel);
+ return ret;
+ }
+
+ return 0;
+}
+
With that fixed:
Reviewed-by: Neil Armstrong
SI_MODE_LPM;
+
+ drm_panel_init(&priv->panel, dev, &renesas_r61307_panel_funcs,
+ DRM_MODE_CONNECTOR_DSI);
Please switch to devm_drm_panel_alloc()
+
+ ret = drm_panel_of_backlight(&priv->panel);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to get backlight\n");
+
+ drm_panel_add(&priv->panel);
+
With that:
Reviewed-by: Neil Armstrong
+}
+
+static const struct of_device_id boe_td4320_of_match[] = {
+ { .compatible = "boe,td4320" },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, boe_td4320_of_match);
+
+static struct mipi_dsi_driver boe_td4320_driver = {
+ .probe = boe_td4320_probe,
+ .remove = boe_td4320_remove,
+ .driver = {
+ .name = "panel-boe-td4320",
+ .of_match_table = boe_td4320_of_match,
+ },
+};
+module_mipi_dsi_driver(boe_td4320_driver);
+
+MODULE_AUTHOR("Barnabas Czeman ");
+MODULE_DESCRIPTION("DRM driver for boe td4320 fhdplus video mode dsi panel");
+MODULE_LICENSE("GPL");
Reviewed-by: Neil Armstrong
On 30/04/2025 18:39, Konrad Dybcio wrote:
On 4/30/25 6:19 PM, neil.armstr...@linaro.org wrote:
On 30/04/2025 17:36, Konrad Dybcio wrote:
On 4/30/25 4:49 PM, neil.armstr...@linaro.org wrote:
On 30/04/2025 15:09, Konrad Dybcio wrote:
On 4/30/25 2:49 PM, neil.armstr...@linaro.org wrote:
On 30/0
On 30/04/2025 13:34, Konrad Dybcio wrote:
From: Konrad Dybcio
On recent (SM8550+) Snapdragon platforms, the GPU speed bin data is
abstracted through SMEM, instead of being directly available in a fuse.
Add support for SMEM-based speed binning, which includes getting
"feature code" and "product
On 30/04/2025 17:36, Konrad Dybcio wrote:
On 4/30/25 4:49 PM, neil.armstr...@linaro.org wrote:
On 30/04/2025 15:09, Konrad Dybcio wrote:
On 4/30/25 2:49 PM, neil.armstr...@linaro.org wrote:
On 30/04/2025 14:35, Konrad Dybcio wrote:
On 4/30/25 2:26 PM, neil.armstr...@linaro.org wrote:
Hi,
On
On 30/04/2025 15:09, Konrad Dybcio wrote:
On 4/30/25 2:49 PM, neil.armstr...@linaro.org wrote:
On 30/04/2025 14:35, Konrad Dybcio wrote:
On 4/30/25 2:26 PM, neil.armstr...@linaro.org wrote:
Hi,
On 30/04/2025 13:34, Konrad Dybcio wrote:
From: Konrad Dybcio
Add speebin data for A740, as foun
On 30/04/2025 14:35, Konrad Dybcio wrote:
On 4/30/25 2:26 PM, neil.armstr...@linaro.org wrote:
Hi,
On 30/04/2025 13:34, Konrad Dybcio wrote:
From: Konrad Dybcio
Add speebin data for A740, as found on SM8550 and derivative SoCs.
For non-development SoCs it seems that "everything except FC_AC
Hi,
On 30/04/2025 13:34, Konrad Dybcio wrote:
From: Konrad Dybcio
Add speebin data for A740, as found on SM8550 and derivative SoCs.
For non-development SoCs it seems that "everything except FC_AC, FC_AF
should be speedbin 1", but what the values are for said "everything" are
not known, so th
On 29/04/2025 23:33, Barnabás Czémán wrote:
Add driver for BOE TD4320 DSI panel, used in Xiaomi Redmi Note 7
mobile phone.
Signed-off-by: Barnabás Czémán
---
drivers/gpu/drm/panel/Kconfig| 9 ++
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-boe-
ing-tee-ss-without-mem-obj-362c66340527
Best regards,
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8650-HDK
# /unittest -d
[test_print_diagnostics_info][52] 831360 = Total bytes as heap
[test_print_diagnostics_info][
Hi,
On Wed, 23 Apr 2025 10:41:41 -0700, Nathan Chancellor wrote:
> Clang warns (or errors with CONFIG_WERROR=y):
>
> drivers/gpu/drm/panel/panel-himax-hx8279.c:838:6: error: variable
> 'goa_even_valid' is used uninitialized whenever 'if' condition is false
> [-Werror,-Wsometimes-uninitialized
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