Better guess. Secondary CSC registers are from 0xF.
Signed-off-by: Martin Cerveny
---
drivers/gpu/drm/sun4i/sun8i_mixer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c
b/drivers/gpu/drm/sun4i/sun8i_mixer.c
index cc4fb916318f
The secondary video layer (VI) on "Allwinner V3s" displays
decoded video (YUV) in wrong colors. The secondary
CSC should be programmed.
Let's correct CSC register offset and extend regmap size.
Regards.
Martin Cerveny (2):
drm/sun4i: sun8i-csc: Secondary CSC register correct
"Allwinner V3s" has secondary video layer (VI).
Decoded video is displayed in wrong colors until
secondary CSC registers are programmed correctly.
Signed-off-by: Martin Cerveny
---
drivers/gpu/drm/sun4i/sun8i_csc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/d
Hello.
On Mon, 5 Feb 2018, Heiko Stuebner wrote:
From: Zheng Yang
Add a driver for the Innosilicon hdmi phy used on rk3228/rk3229
and rk3328 socs from Rockchip.
Signed-off-by: Zheng Yang
Signed-off-by: Heiko Stuebner
---
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
+static u32 inno_h