On 05/07/2025, Luca Ceresoli wrote:
> Hello Liu,
>
> On Wed, 7 May 2025 10:10:53 +0800
> Liu Ying wrote:
>
>> On 05/07/2025, Luca Ceresoli wrote:
>>> Hello Liu,
>>
>> Hi Luca,
>>
>>>
>>> thanks for your further feedb
Hi Maxime, drm/misc maintainers,
On 04/14/2025, Liu Ying wrote:
> Hi,
>
> This patch series aims to add Freescale i.MX8qxp Display Controller support.
>
> The controller is comprised of three main components that include a blit
> engine for 2D graphics accelerations, disp
On 05/07/2025, Luca Ceresoli wrote:
> Hello Liu,
Hi Luca,
>
> thanks for your further feedback.
>
> On Tue, 6 May 2025 10:24:18 +0800
> Liu Ying wrote:
>
>> On 04/30/2025, Luca Ceresoli wrote:
>>> Hello Liu,
>>
>> Hi Luca,
>>
>>
On 04/30/2025, Luca Ceresoli wrote:
> Hello Liu,
Hi Luca,
>
> On Tue, 29 Apr 2025 10:10:55 +0800
> Liu Ying wrote:
>
>> Hi,
>>
>> On 04/25/2025, Luca Ceresoli wrote:
>>> This is the new API for allocating DRM bridges.
>>>
>>> Thi
sing devm_drm_bridge_alloc()
> * adapt ldb_add_bridge_helper() to not set the funcs pointer
>(now done by devm_drm_bridge_alloc())
> * adapt the code wherever using the channels
>
> Signed-off-by: Luca Ceresoli
>
> ---
>
> Cc: Liu Ying
> ---
> drivers/gpu
Adrien Grassein
> Cc: Aleksandr Mishin
> Cc: Andy Yan
> Cc: AngeloGioacchino Del Regno
> Cc: Benson Leung
> Cc: Biju Das
> Cc: Christoph Fritz
> Cc: Cristian Ciocaltea
> Cc: Detlev Casanova
> Cc: Dharma Balasubiramani
> Cc: Guenter Roeck
> Cc: Heiko Stu
make the new, dynamic bridge allocation possible:
>
> * change the array of channels into an array of channel pointers
> * allocate each channel using devm_drm_bridge_alloc()
> * adapt the code wherever using the channels
>
> Signed-off-by: Luca Ceresoli
>
> ---
>
>
Baryshkov
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* s/shdld/shdload/ for DE/ED IRQs. (Dmitry)
* Use dc_{de,pe}_post_bind(). (Dmitry)
* Drop dc_plane_check_no_off_screen(). (Dmitry)
* Collect Dmitry's R-b tag.
v7:
* Drop using typeof in macros and explicitly define variable types. (D
pixel engine driver and those unit
drivers are components to be aggregated by a master registered in
the upcoming DRM driver.
Reviewed-by: Maxime Ripard
Signed-off-by: Liu Ying
Reviewed-by: Dmitry Baryshkov
---
v9:
* Add Dmitry's R-b tag.
v8:
* Get CF/ED/FL/FW/LB device instance numbers th
assigned-clock* properties can be used by default now, so allow them.
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch as needed by MIPI/LVDS subsystems device tree
Enable display controller for i.MX8qxp MEK.
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch. (Francesco)
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 4
1 file
i.MX8qxp Display Controller(DC) is comprised of three main components that
include a blit engine for 2D graphics accelerations, display controller for
display output processing, as well as a command sequencer.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8
i.MX8qxp Display Controller display engine consists of all processing units
that operate in a display clock domain.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* Drop instance numbers from compatible strings. This means switching back to
the patch in v4
Freescale i.MX8qxp Display Controller is implemented as construction set of
building blocks with unified concept and standardized interfaces. Document
all existing processing units.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* Drop instance numbers from
et instance id from display driver.
* Find next bridge from TCon's port from display driver.
* Drop drm/drm_module.h include from dc-drv.c.
* Improve file list in MAINTAINERS. (Frank)
* Add entire i.MX8qxp display controller device tree for review. (Krzysztof)
* Add MIPI/LVDS subsystems dev
Add myself as the maintainer of i.MX8qxp Display Controller.
Signed-off-by: Liu Ying
Reviewed-by: Maxime Ripard
---
v9:
* Add Maxime's R-b tag.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* Improve file list. (
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit. Add driver for it.
Reviewed-by: Maxime Ripard
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* Collect Dmitry's R-b tag.
v7:
i.MX8qxp Display Controller pixel engine consists of all processing units
that operate in the AXI bus clock domain. Command sequencer and interrupt
controller of the Display Controller work with AXI bus clock, but they are
not in pixel engine.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring
The MIPI-LVDS combo subsystems are peripherals of pixel link MSI
bus in i.MX8qxp display controller subsystem. Add the MIPI-LVDS
combo subsystems.
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No
i.MX8qxp Display Controller contains a command sequencer is designed to
autonomously process command lists.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* Add Rob's R-b tag.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* Replace &quo
aggregated by a master registered in the upcoming
DRM driver.
Reviewed-by: Maxime Ripard
Signed-off-by: Liu Ying
Reviewed-by: Dmitry Baryshkov
---
v9:
* Add Dmitry's R-b tag.
v8:
* Get DE/FG/TC device instance numbers through register start addresses of the
devices, instead of compa
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel
and a touch IC. Add an overlay to support the LCD panel on i.MX8qxp
MEK. mipi_lvds_0_ldb channel0 and mipi_lvds_1_ldb channel1 send odd
and even pixels to the panel respectively.
Signed-off-by: Liu Ying
---
v9:
* Rebase on
Add display controller subsystem in i.MX8qxp SoC.
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* Drop instance numbers from display controller internal devices' compatible
strings. (Dmitry)
v7:
* Add instance numbers to display controller internal devices' compatible
strin
Document SCU controlled display pixel link child nodes.
Signed-off-by: Liu Ying
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch as needed by display controller subsystem device tree
i.MX8qxp Display Controller contains a AXI performance counter which allows
measurement of average bandwidth and latency during operation.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4
i.MX8qxp Display Controller contains a blit engine for raster graphics.
It may read up to 3 source images from memory and computes one destination
image from it, which is written back to memory.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v9:
* No change.
v8:
* Drop instance
641089/?series=145843&rev=1
--
Regards,
Liu Ying
drm/bridge/fsl-ldb.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Applied to misc/kernel.git (drm-misc-next).
Thanks!
--
Regards,
Liu Ying
1 insertion(+), 1 deletion(-)
Applied to misc/kernel.git (drm-misc-next).
Thanks!
--
Regards,
Liu Ying
On 03/06/2025, Maxime Ripard wrote:
> On Thu, Mar 06, 2025 at 03:02:41PM +0800, Liu Ying wrote:
>> On 03/06/2025, Rob Herring wrote:
>>> On Wed, Mar 05, 2025 at 10:35:26AM +0100, Alexander Stein wrote:
>>>> Hi,
>>>>
>>>> Am Dienstag, 4. Mär
On 03/07/2025, Luca Ceresoli wrote:
> Hello Liu,
Hello Luca,
>
> thanks for your reviews.
>
> On Fri, 7 Mar 2025 14:33:37 +0800
> Liu Ying wrote:
>
>> On 03/07/2025, Luca Ceresoli wrote:
>>> This warning notifies a clock was set to an inaccurate value. Mo
On 03/10/2025, Maxime Ripard wrote:
> On Fri, Mar 07, 2025 at 11:25:40AM +0800, Liu Ying wrote:
>> On 03/07/2025, Rob Herring wrote:
>>> On Thu, Mar 06, 2025 at 12:35:49PM +0100, Maxime Ripard wrote:
>>>> On Thu, Mar 06, 2025 at 03:02:41PM +0800, Liu Ying wrote:
&g
On 03/10/2025, Maxime Ripard wrote:
> On Fri, Mar 07, 2025 at 11:10:00AM +0800, Liu Ying wrote:
>> On 03/06/2025, Maxime Ripard wrote:
>>> On Thu, Mar 06, 2025 at 03:02:41PM +0800, Liu Ying wrote:
>>>> On 03/06/2025, Rob Herring wrote:
>>>>> On Wed
On 03/07/2025, Luca Ceresoli wrote:
> Hello Liu,
>
> On Fri, 7 Mar 2025 14:42:12 +0800
> Liu Ying wrote:
>
>> On 03/07/2025, Luca Ceresoli wrote:
>>> 'ret' can only be 0 at this point, being preceded by a 'if (ret) return
>>> ret;'. So
On 03/06/2025, Rob Herring wrote:
> On Wed, Mar 05, 2025 at 10:35:26AM +0100, Alexander Stein wrote:
>> Hi,
>>
>> Am Dienstag, 4. März 2025, 16:23:20 CET schrieb Rob Herring:
>>> On Tue, Mar 04, 2025 at 06:15:28PM +0800, Liu Ying wrote:
>>>> A DPI
only place across the kernel tree where this cleanup
could be done. So, maybe use some tools to cleanup them all?
> }
>
> static void imx8qxp_ldb_remove(struct platform_device *pdev)
>
--
Regards,
Liu Ying
fsl_ldb->clk, configured_link_freq,
>> requested_link_freq);
>
> commit message said show clock name, but %p is for pointer value. Are sure
> it show clock name?
%pC prints clock name. Please see Documentation/core-api/printk-formats.rst.
>
> Frank
>
>>
>> clk_prepare_enable(fsl_ldb->clk);
>>
>>
>> --
>> 2.48.1
>>
--
Regards,
Liu Ying
s it make sense to s/%pC/%pCn/ so that the clock name is printed in lower
case instead of upper case, since it seems that all i.MX specific clock names
are in lower case?
>
> clk_prepare_enable(fsl_ldb->clk);
>
>
--
Regards,
Liu Ying
rm/bridge/imx/imx-legacy-bridge.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Applied to misc/kernel.git (drm-misc-next).
Thanks!
--
Regards,
Liu Ying
On 03/07/2025, Rob Herring wrote:
> On Thu, Mar 06, 2025 at 12:35:49PM +0100, Maxime Ripard wrote:
>> On Thu, Mar 06, 2025 at 03:02:41PM +0800, Liu Ying wrote:
>>> On 03/06/2025, Rob Herring wrote:
>>>> On Wed, Mar 05, 2025 at 10:35:26AM +0100, Alexander Stein w
On 03/04/2025, Maxime Ripard wrote:
> On Tue, Mar 04, 2025 at 06:15:28PM +0800, Liu Ying wrote:
>> A DPI color encoder, as a simple display bridge, converts input DPI color
>> coding to output DPI color coding, like Adafruit Kippah DPI hat[1] which
>> converts input 18-bit
t the only criteria, and not having to manipulate
>> strings but instead just doing int comparison is a huge plus.
>
> Sure, defines work as well. BTW, it has a minor drawback on bindings as
> it means you might need to update both binding and the header when
> adding new entry, but I understand that it makes implementation life
> easier or faster.
If no objections, I'd use integer color codings.
>
> Best regards,
> Krzysztof
--
Regards,
Liu Ying
On 03/04/2025, Maxime Ripard wrote:
> On Tue, Mar 04, 2025 at 06:15:30PM +0800, Liu Ying wrote:
>> The next bridge connected to a simple bridge could be a panel, e.g.,
>> a DPI panel connected to a DPI color encoder. Add the next panel support,
>> instead of supporting non-p
On 03/04/2025, Maxime Ripard wrote:
> On Tue, Mar 04, 2025 at 06:15:29PM +0800, Liu Ying wrote:
>> A DPI color encoder, as a simple display bridge, converts input DPI color
>> coding to output DPI color coding, like Adafruit Kippah DPI hat[1] which
>> converts input 18-bit
rm/bridge/imx/imx-legacy-bridge.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Liu Ying
] https://learn.adafruit.com/adafruit-dpi-display-kippah-ttl-tft/downloads
Signed-off-by: Liu Ying
---
.../display/bridge/simple-bridge.yaml | 89 ++-
1 file changed, 87 insertions(+), 2 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/bridge/simple
The next bridge connected to a simple bridge could be a panel, e.g.,
a DPI panel connected to a DPI color encoder. Add the next panel support,
instead of supporting non-panel next bridge only.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/Kconfig | 1 +
drivers/gpu/drm/bridge
m/design/design-center/development-boards-and-designs/i.MX93EVK
[3]
https://www.nxp.com/design/design-center/development-boards-and-designs/IMX93QSB
Liu Ying (5):
dt-bindings: display: Document DPI color codings
drm/of: Add drm_of_dpi_get_color_coding()
dt-bindings: display: simple-brid
the simple bridge driver.
[1] https://learn.adafruit.com/adafruit-dpi-display-kippah-ttl-tft/downloads
Signed-off-by: Liu Ying
---
drivers/gpu/drm/bridge/simple-bridge.c | 104 -
1 file changed, 102 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/simple
Document DPI color codings according to MIPI Alliance Standard for
Display Pixel Interface(DPI-2) Version 2.00(15 September 2005).
Signed-off-by: Liu Ying
---
.../bindings/display/dpi-color-coding.yaml| 90 +++
1 file changed, 90 insertions(+)
create mode 100644
Add helper function drm_of_dpi_get_color_coding() to get media bus format
value from MIPI DPI color coding string.
Signed-off-by: Liu Ying
---
drivers/gpu/drm/drm_of.c | 43
include/drm/drm_of.h | 7 +++
2 files changed, 50 insertions(+)
diff
tag on patch 1/2 and with the patch set rebased
upon v6.11-rc1.
v1->v2:
* Set *num_input_fmts to zero in case
imx93_pdfc_bridge_atomic_get_input_bus_fmts() returns NULL in patch 2/2.
* Replace .remove callback with .remove_new callback in
imx93_pdfc_bridge_driver in patch 2/2.
Liu Ying (2):
NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which
configures parallel display format by using the "PARALLEL_DISP_FORMAT"
field. Add a DRM bridge driver to support the display format configuration.
Signed-off-by: Liu Ying
---
v4->v5:
* Rebase upon next-20250303.
i.MX93 SoC mediamix blk-ctrl contains one DISPLAY_MUX register which
configures parallel display format by using the "PARALLEL_DISP_FORMAT"
field. Document the Parallel Display Format Configuration(PDFC) subnode
and add the subnode to example.
Signed-off-by: Liu Ying
Reviewed-by: Co
ch series[1]
to add the i.MX93 parallel display format configuration support. I may send
a new version to rename .remove_new to .remove in the bridge driver at least.
[1] https://patchwork.freedesktop.org/series/113457/
--
Regards,
Liu Ying
On 01/28/2025, Maxime Ripard wrote:
> On Wed, Dec 18, 2024 at 02:02:18PM +0800, Liu Ying wrote:
>> On 12/17/2024, Maxime Ripard wrote:
>>> On Thu, Nov 14, 2024 at 02:57:52PM +0800, Liu Ying wrote:
>>>> This patch series aims to add ITE IT6263 LVDS to HDMI
Hi Dmitry, Maxime,
On 12/30/2024, Liu Ying wrote:
> Add myself as the maintainer of i.MX8qxp Display Controller.
>
> Signed-off-by: Liu Ying
> ---
> v8:
> * No change.
>
> v7:
> * No change.
>
> v6:
> * No change.
>
> v5:
> * No change.
>
>
IT6263 LVDS to HDMI converter")
> Signed-off-by: Dan Carpenter
> ---
> drivers/gpu/drm/bridge/ite-it6263.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Applied to misc/kernel.git (drm-misc-fixes).
Thanks!
--
Regards,
Liu Ying
548c8ff0ab ("drm/rockchip: inno_hdmi: Switch to HDMI connector")
Signed-off-by: Liu Ying
---
Tested with i.MX8MP imx-lcdif.
sun4i and rockchip are not tested due to no HW access.
v2:
* Trim backtrace in commit message. (Dmitry)
* Drop timestamps from backtrace commit message. (Dmitr
Atomic check should succeed when disabling a connector. Add a test
case drm_test_check_disabling_connector() to make sure of this.
Suggested-by: Dmitry Baryshkov
Signed-off-by: Liu Ying
---
v2:
* New patch to add the test case. (Dmitry)
.../drm/tests/drm_hdmi_state_helper_test.c| 52
it message. (Dmitry)
* Move the necessary checks from drm_bridge_connector_atomic_check() to
drm_atomic_helper_connector_hdmi_check(). (Dmitry)
* Add the KUnit test case in patch 2. (Dmitry)
Liu Ying (2):
drm/connector: hdmi: Do atomic check when necessary
drm/tests: hdmi: Add connector disabl
On 01/08/2025, Dmitry Baryshkov wrote:
> On Wed, Jan 08, 2025 at 06:13:51PM +0800, Liu Ying wrote:
>> It's ok to pass atomic check successfully if an atomic commit tries to
>> disable the display pipeline which the connector belongs to. That is,
>> when the crtc or th
Code: d50323bf d65f03c0 52800041 17e6 (b941)
[ 46.980350] ---[ end trace ]---
Fixes: 8ec116ff21a9 ("drm/display: bridge_connector: provide atomic_check for
HDMI bridges")
Signed-off-by: Liu Ying
---
drivers/gpu/drm/display/drm_bridge_connector.c | 5 +
1
ns(-)
Reviewed-by: Liu Ying
uot;);
Nit: s/find/get/, since "get" was used.
> }
>
> return 0;
ldb_init_helper() may return -EPROBE_DEFER too, so it needs to be changed.
--
Regards,
Liu Ying
ns(-)
Reviewed-by: Liu Ying
m/bridge/imx/imx8qxp-ldb.c | 37 ++-
> .../gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 19 +++---
> drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 26 -----
> 4 files changed, 29 insertions(+), 66 deletions(-)
>
--
Regards,
Liu Ying
quot;failed to find next bridge: %d\n",
> - ret);
> - return ret;
> - }
> + if (IS_ERR(p2d->next_bridge))
> + return dev_err_probe(dev, PTR_ERR(p2d->next_bridge),
> + "failed to find next bridge\n");
>
> ret = imx8qxp_pxl2dpi_set_pixel_link_sel(p2d);
> if (ret)
imx8qxp_pxl2dpi_parse_dt_companion() may return -EPROBE_DEFER too, so it needs
to be changed.
--
Regards,
Liu Ying
by: Marek Vasut
> ---
> Cc: Andrzej Hajda
> Cc: David Airlie
> Cc: Fabio Estevam
> Cc: Jernej Skrabec
> Cc: Jonas Karlman
> Cc: Laurent Pinchart
> Cc: Liu Ying
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Neil Armstrong
> Cc: Pengutronix Kernel Team
&
by: Marek Vasut
> ---
> Cc: Andrzej Hajda
> Cc: David Airlie
> Cc: Fabio Estevam
> Cc: Jernej Skrabec
> Cc: Jonas Karlman
> Cc: Laurent Pinchart
> Cc: Liu Ying
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Neil Armstrong
> Cc: Pengutronix Kernel Team
&
gt;
> Based on 2e87bf389e13 ("drm/rockchip: add DRM_BRIDGE_ATTACH_NO_CONNECTOR flag
> to drm_bridge_attach")
>
> This makes LT9611 work with i.MX8M Mini.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Andrzej Hajda
> Cc: David Airlie
> Cc: Fabio Estevam
> Cc: Jernej Sk
> + ret = drm_connector_attach_encoder(connector, encoder);
> + if (ret < 0) {
of_node_put(ep);
> + dev_err_probe(drm->dev, ret,
> + "Failed to attach encoder.\n");
It looks like no one else calls dev_err_probe() when
drm_connector_attach_encoder() fails, plus drm_connector_attach_encoder()
doesn't return -EPROBE_DEFER at all.
> + drm_connector_cleanup(connector);
> + return ret;
> + }
> }
>
> return 0;
--
Regards,
Liu Ying
c
> Cc: Jonas Karlman
> Cc: Laurent Pinchart
> Cc: Liu Ying
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Neil Armstrong
> Cc: Pengutronix Kernel Team
> Cc: Robert Foss
> Cc: Sascha Hauer
> Cc: Shawn Guo
> Cc: Simona Vetter
> Cc: Stefan Agner
&
assigned-clock* properties can be used by default now, so allow them.
Signed-off-by: Liu Ying
---
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch as needed by MIPI/LVDS subsystems device tree.
.../devicetree/bindings
Document SCU controlled display pixel link child nodes.
Signed-off-by: Liu Ying
---
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch as needed by display controller subsystem device tree.
.../devicetree/bindings
i.MX8qxp Display Controller(DC) is comprised of three main components that
include a blit engine for 2D graphics accelerations, display controller for
display output processing, as well as a command sequencer.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v8:
* Drop instance
pixel engine driver and those unit
drivers are components to be aggregated by a master registered in
the upcoming DRM driver.
Reviewed-by: Maxime Ripard
Signed-off-by: Liu Ying
---
v8:
* Get CF/ED/FL/FW/LB device instance numbers through register start addresses
of the devices, instead of
Baryshkov
Signed-off-by: Liu Ying
---
v8:
* s/shdld/shdload/ for DE/ED IRQs. (Dmitry)
* Use dc_{de,pe}_post_bind(). (Dmitry)
* Drop dc_plane_check_no_off_screen(). (Dmitry)
* Collect Dmitry's R-b tag.
v7:
* Drop using typeof in macros and explicitly define variable types. (Dmitry)
* Add a co
i.MX8qxp Display Controller contains a blit engine for raster graphics.
It may read up to 3 source images from memory and computes one destination
image from it, which is written back to memory.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v8:
* Drop instance numbers from
Freescale i.MX8qxp Display Controller is implemented as construction set of
building blocks with unified concept and standardized interfaces. Document
all existing processing units.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v8:
* Drop instance numbers from compatible strings
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* Collect Rob's R-
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel
and a touch IC. Add an overlay to support the LCD panel on i.MX8qxp
MEK. mipi_lvds_0_ldb channel0 and mipi_lvds_1_ldb channel1 send odd
and even pixels to the panel respectively.
Signed-off-by: Liu Ying
---
v8:
* No change
Enable display controller for i.MX8qxp MEK.
Signed-off-by: Liu Ying
---
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch. (Francesco)
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 4
1 file changed, 4 insertions
The MIPI-LVDS combo subsystems are peripherals of pixel link MSI
bus in i.MX8qxp display controller subsystem. Add the MIPI-LVDS
combo subsystems.
Signed-off-by: Liu Ying
---
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New
Add display controller subsystem in i.MX8qxp SoC.
Signed-off-by: Liu Ying
---
v8:
* Drop instance numbers from display controller internal devices' compatible
strings. (Dmitry)
v7:
* Add instance numbers to display controller internal devices' compatible
strings.
* Drop aliases.
Add myself as the maintainer of i.MX8qxp Display Controller.
Signed-off-by: Liu Ying
---
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* Improve file list. (Frank)
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit. Add driver for it.
Reviewed-by: Maxime Ripard
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Liu Ying
---
v8:
* Collect Dmitry's R-b tag.
v7:
* Fix regmap_config definiti
aggregated by a master registered in the upcoming
DRM driver.
Reviewed-by: Maxime Ripard
Signed-off-by: Liu Ying
---
v8:
* Get DE/FG/TC device instance numbers through register start addresses of the
devices, instead of compatible strings. (Dmitry)
* s/shdld/shdload/ for DE IRQs. (Dmitry)
* Drop
i.MX8qxp Display Controller contains a command sequencer is designed to
autonomously process command lists.
Signed-off-by: Liu Ying
---
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* Replace "fsl,iram" property with standard "sram" property. (R
i.MX8qxp Display Controller contains a AXI performance counter which allows
measurement of average bandwidth and latency during operation.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v8:
* No change.
v7:
* No change.
v6:
* No change.
v5:
* No change.
v4:
* Collect Rob'
i.MX8qxp Display Controller display engine consists of all processing units
that operate in a display clock domain.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v8:
* Drop instance numbers from compatible strings. This means switching back to
the patch in v4. So, add Rob&#
i.MX8qxp Display Controller pixel engine consists of all processing units
that operate in the AXI bus clock domain. Command sequencer and interrupt
controller of the Display Controller work with AXI bus clock, but they are
not in pixel engine.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring
dc*.yaml.
* Use OF alias id to get instance id from display driver.
* Find next bridge from TCon's port from display driver.
* Drop drm/drm_module.h include from dc-drv.c.
* Improve file list in MAINTAINERS. (Frank)
* Add entire i.MX8qxp display controller device tree for review. (Krzysztof)
* Ad
On 12/27/2024, Dmitry Baryshkov wrote:
> On Wed, 25 Dec 2024 at 09:18, Liu Ying wrote:
>>
>> On 12/23/2024, Dmitry Baryshkov wrote:
>>> On Mon, Dec 23, 2024 at 02:41:40PM +0800, Liu Ying wrote:
>>>> i.MX8qxp Display Controller(DC) is comprised of three main
On 12/23/2024, Dmitry Baryshkov wrote:
> On Mon, Dec 23, 2024 at 02:41:40PM +0800, Liu Ying wrote:
>> i.MX8qxp Display Controller(DC) is comprised of three main components that
>> include a blit engine for 2D graphics accelerations, display controller for
>> display output pro
On 12/24/2024, Dmitry Baryshkov wrote:
> On Tue, 24 Dec 2024 at 08:21, Liu Ying wrote:
>>
>> On 12/23/2024, Dmitry Baryshkov wrote:
>>> On Mon, Dec 23, 2024 at 02:41:37PM +0800, Liu Ying wrote:
>>>> i.MX8qxp Display Controller display engine consists of all pro
On 12/24/2024, Dmitry Baryshkov wrote:
> On Tue, 24 Dec 2024 at 07:56, Liu Ying wrote:
>>
>> On 12/23/2024, Dmitry Baryshkov wrote:
>>> On Mon, Dec 23, 2024 at 02:41:31PM +0800, Liu Ying wrote:
>>>> i.MX8qxp Display Controller display engine consists of all pro
On 12/23/2024, Dmitry Baryshkov wrote:
> On Mon, Dec 23, 2024 at 02:41:38PM +0800, Liu Ying wrote:
>> i.MX8qxp Display Controller pixel engine consists of all processing
>> units that operate in the AXI bus clock domain. Add drivers for
>> ConstFrame, ExtDst, FetchLayer, Fet
On 12/23/2024, Dmitry Baryshkov wrote:
> On Mon, Dec 23, 2024 at 02:41:37PM +0800, Liu Ying wrote:
>> i.MX8qxp Display Controller display engine consists of all processing
>> units that operate in a display clock domain. Add minimal feature
>> support with FrameGen and TCon s
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