Hi Jonathan,
Are the pagefault reported for any unit in the GPU (including command
streamer?) or is it limited to execution units?
Thanks,
-Lionel
On 28/03/2025 22:40, Jonathan Cavitt wrote:
Add additional information to each VM so they can report up to the first
50 seen faults. Only pagef
Hi Andi,
In Mesa we've been relying on I915_CONTEXT_PARAM_GTT_SIZE so as long as
that is adjusted by the kernel, we should be able to continue working
without issues.
Acked-by: Lionel Landwerlin
Thanks,
-Lionel
On 13/03/2024 21:39, Andi Shyti wrote:
Commit 9bb66c179f50 (&quo
in the OA buffer (after rewind). If report
size is not a power of 2, we need to zero out the entire report to be able
to detect unlanded reports reliably.
Cc: Umesh Nerlige Ramappa
Signed-off-by: Ashutosh Dixit
Sad but necessary unfortunately
Reviewed-by: Lionel Landwerlin
On 27/04/2023 21:19, Teres Alexis, Alan Previn wrote:
(fixed email addresses again - why is my Evolution client deteorating??)
On Thu, 2023-04-27 at 17:18 +, Teres Alexis, Alan Previn wrote:
On Wed, 2023-04-26 at 15:35 -0700, Justen, Jordan L wrote:
On 2023-04-26 11:17:16, Teres Alexis, Al
On 14/04/2023 18:17, Teres Alexis, Alan Previn wrote:
Hi Lionel, does this patch work for you?
Hi, Sorry for the late answer.
That looks good :
Acked-by: Lionel Landwerlin
Thanks,
-Lionel
On Mon, 2023-04-10 at 10:22 -0700, Ceraolo Spurio, Daniele wrote:
On 4/6/2023 10:44 AM, Alan
On 04/04/2023 19:04, Yang, Fei wrote:
Subject: Re: [Intel-gfx] [PATCH 7/7] drm/i915: Allow user to set cache at BO
creation
On 01/04/2023 09:38, fei.y...@intel.com wrote:
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out its life cycl
On 01/04/2023 09:38, fei.y...@intel.com wrote:
From: Fei Yang
To comply with the design that buffer objects shall have immutable
cache setting through out its life cycle, {set, get}_caching ioctl's
are no longer supported from MTL onward. With that change caching
policy can only be set at objec
On 26/03/2023 14:18, Rodrigo Vivi wrote:
On Sat, Mar 25, 2023 at 02:19:21AM -0400, Teres Alexis, Alan Previn wrote:
alan:snip
@@ -353,8 +367,20 @@ int intel_pxp_start(struct intel_pxp *pxp)
alan:snip
+ if (HAS_ENGINE(pxp->ctrl_gt, GSC0)) {
+ /*
+* GSC-fw loa
I'll let Lucas comment. I've only looked a little at it.
From what I remember just enabling sw_signaling was enough to fix the
issue.
-Lionel
On 12/07/2022 13:26, Christian König wrote:
Ping to the Intel guys here. Especially Lucas/Nirmoy/Lionel.
IIRC you stumbled over that problem as well,
On 30/06/2022 20:12, Zanoni, Paulo R wrote:
Can you please explain what happens when we try to write to a range
that's bound as read-only?
It will be mapped as read-only in device page table. Hence any
write access will fail. I would expect a CAT error reported.
What's a CAT error? Does this l
On 23/06/2022 14:05, Tvrtko Ursulin wrote:
On 23/06/2022 09:57, Lionel Landwerlin wrote:
On 23/06/2022 11:27, Tvrtko Ursulin wrote:
After a vm_unbind, UMD can re-bind to same VA range against an
active VM.
Though I am not sue with Mesa usecase if that new mapping is
required for
running
On 22/06/2022 18:12, Niranjana Vishwanathapura wrote:
On Wed, Jun 22, 2022 at 09:10:07AM +0100, Tvrtko Ursulin wrote:
On 22/06/2022 04:56, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
v2: Reduce the scope to simple Mesa use case.
v3: Expand VM_UNBIND documentation and
On 23/06/2022 11:27, Tvrtko Ursulin wrote:
After a vm_unbind, UMD can re-bind to same VA range against an active
VM.
Though I am not sue with Mesa usecase if that new mapping is required
for
running GPU job or it will be for the next submission. But ensuring the
tlb flush upon unbind, KMD can
line
discussion.
v4:
- Various improvements all over. (Tvrtko)
v5:
- Include newer integrated platforms when applying the non-recoverable
context and error capture restriction. (Thomas)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
Cc:
list - DRI
developers de...@lists.freedesktop.org>; Hellstrom, Thomas
;
Wilson, Chris P ; Vetter, Daniel
; Christian König
Subject: Re: [Intel-gfx] [RFC v3 1/3] drm/doc/rfc: VM_BIND feature
design
document
On Fri, Jun 10, 2022 at 11:18:14AM +0300, Lionel Landwerlin wrote:
>On 10/06/2022
On 10/06/2022 11:53, Matthew Brost wrote:
On Fri, Jun 10, 2022 at 12:07:11AM -0700, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
Signed-off-by: Niranjana Vishwanathapura
---
Documentation/gpu/rfc/i915_vm_bind.h | 490 +++
1 file changed, 490
On 10/06/2022 13:37, Tvrtko Ursulin wrote:
On 10/06/2022 08:07, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
Signed-off-by: Niranjana Vishwanathapura
---
Documentation/gpu/rfc/i915_vm_bind.h | 490 +++
1 file changed, 490 insertions(+)
c
On 10/06/2022 10:54, Niranjana Vishwanathapura wrote:
On Fri, Jun 10, 2022 at 09:53:24AM +0300, Lionel Landwerlin wrote:
On 09/06/2022 22:31, Niranjana Vishwanathapura wrote:
On Thu, Jun 09, 2022 at 05:49:09PM +0300, Lionel Landwerlin wrote:
On 09/06/2022 00:55, Jason Ekstrand wrote
On 09/06/2022 22:31, Niranjana Vishwanathapura wrote:
On Thu, Jun 09, 2022 at 05:49:09PM +0300, Lionel Landwerlin wrote:
On 09/06/2022 00:55, Jason Ekstrand wrote:
On Wed, Jun 8, 2022 at 4:44 PM Niranjana Vishwanathapura
wrote:
On Wed, Jun 08, 2022 at 08:33:25AM +0100, Tvrtko
1:18:11AM -0700, Niranjana
Vishwanathapura wrote:
>>>On Tue, Jun 07, 2022 at 12:12:03PM -0500, Jason Ekstrand wrote:
>>>> On Fri, Jun 3, 2022 at 6:52 PM Niranjana Vishwanathapura
>>>> wrote:
>>>>
>>>> On Fri, Jun 03,
On 08/06/2022 11:36, Tvrtko Ursulin wrote:
On 08/06/2022 07:40, Lionel Landwerlin wrote:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On Tue, 24 May 2022 at 05:20, Niranjana Vishwanathap
On 08/06/2022 09:40, Lionel Landwerlin wrote:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On Tue, 24 May 2022 at 05:20, Niranjana Vishwanathap
On 02/06/2022 23:35, Jason Ekstrand wrote:
On Thu, Jun 2, 2022 at 3:11 PM Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 01:28:36PM -0700, Matthew Brost wrote:
>On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
>> On 17/05/2022 21:32,
On 02/06/2022 00:18, Matthew Brost wrote:
On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
+VM_BIND/UNBIND ioctl will immediately start binding/unbinding the mapping in an
+async worker. The binding and unbinding will work
On 17/05/2022 21:32, Niranjana Vishwanathapura wrote:
+VM_BIND/UNBIND ioctl will immediately start binding/unbinding the mapping in an
+async worker. The binding and unbinding will work like a special GPU engine.
+The binding and unbinding operations are serialized and will wait on specified
+inp
+.
FYI, we're also not using I915_PARAM_EU_TOTAL on Gfx10+ for the same reason.
Acked-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/i915_getparam.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_getparam.c
b/drivers/gpu/drm/i915/i915_getparam.c
index c12a
On 30/05/2022 14:40, Christian König wrote:
Am 30.05.22 um 12:09 schrieb Lionel Landwerlin:
On 30/05/2022 12:52, Christian König wrote:
Am 25.05.22 um 23:59 schrieb Lucas De Marchi:
On Wed, May 25, 2022 at 12:38:51PM +0200, Christian König wrote:
Am 25.05.22 um 11:35 schrieb Lionel
On 30/05/2022 12:52, Christian König wrote:
Am 25.05.22 um 23:59 schrieb Lucas De Marchi:
On Wed, May 25, 2022 at 12:38:51PM +0200, Christian König wrote:
Am 25.05.22 um 11:35 schrieb Lionel Landwerlin:
[SNIP]
Err... Let's double check with my colleagues.
It seems we're running i
Just noticed a small nit on this one :
ordering via these fences, it is the respnosibility of userspace to use
-> responsibility
Acked-by: Lionel Landwerlin
Cheers,
-Lionel
Acked-by: Lionel Landwerlin
On 25/05/2022 12:26, Lionel Landwerlin wrote:
On 25/05/2022 11:24, Christian König wrote:
Am 25.05.22 um 08:47 schrieb Lionel Landwerlin:
On 09/02/2022 20:26, Christian König wrote:
It is illegal to add a dma_fence_chain as timeline point. Flatten out
the fences into a dma_fence_array instead
On 25/05/2022 11:24, Christian König wrote:
Am 25.05.22 um 08:47 schrieb Lionel Landwerlin:
On 09/02/2022 20:26, Christian König wrote:
It is illegal to add a dma_fence_chain as timeline point. Flatten out
the fences into a dma_fence_array instead.
Signed-off-by: Christian König
On 09/02/2022 20:26, Christian König wrote:
It is illegal to add a dma_fence_chain as timeline point. Flatten out
the fences into a dma_fence_array instead.
Signed-off-by: Christian König
---
drivers/gpu/drm/drm_syncobj.c | 61 ---
1 file changed, 56 insertion
On 20/05/2022 01:52, Zanoni, Paulo R wrote:
On Tue, 2022-05-17 at 11:32 -0700, Niranjana Vishwanathapura wrote:
VM_BIND design document with description of intended use cases.
v2: Add more documentation and format as per review comments
from Daniel.
Signed-off-by: Niranjana Vishwanathapur
On 17/05/2022 12:23, Tvrtko Ursulin wrote:
On 17/05/2022 09:55, Lionel Landwerlin wrote:
On 17/05/2022 11:29, Tvrtko Ursulin wrote:
On 16/05/2022 19:11, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks
nels, since this came up in some offline
discussion.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jon Bloomfield
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
Cc:
On 14/05/2022 00:06, Jordan Justen wrote:
On 2022-05-13 05:31:00, Lionel Landwerlin wrote:
On 02/05/2022 17:15, Ramalingam C wrote:
Capture the impact of memory region preference list of the objects, on
their memory residency and Flat-CCS capability.
v2:
Fix the Flat-CCS capability of an
-by: Ramalingam C
cc: Matthew Auld
cc: Thomas Hellstrom
cc: Daniel Vetter
cc: Jon Bloomfield
cc: Lionel Landwerlin
cc: Kenneth Graunke
cc: mesa-...@lists.freedesktop.org
cc: Jordan Justen
cc: Tony Ye
Reviewed-by: Matthew Auld
---
include/uapi/drm/i915_drm.h | 16
1 file
On 03/05/2022 17:27, Matthew Auld wrote:
On 03/05/2022 11:39, Lionel Landwerlin wrote:
On 03/05/2022 13:22, Matthew Auld wrote:
On 02/05/2022 09:53, Lionel Landwerlin wrote:
On 02/05/2022 10:54, Lionel Landwerlin wrote:
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi
On 03/05/2022 13:22, Matthew Auld wrote:
On 02/05/2022 09:53, Lionel Landwerlin wrote:
On 02/05/2022 10:54, Lionel Landwerlin wrote:
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks
On 03/05/2022 12:07, Matthew Auld wrote:
On 02/05/2022 19:03, Lionel Landwerlin wrote:
On 02/05/2022 20:58, Abodunrin, Akeem G wrote:
-Original Message-
From: Landwerlin, Lionel G
Sent: Monday, May 2, 2022 12:55 AM
To: Auld, Matthew ;
intel-...@lists.freedesktop.org
Cc: dri-devel
. (Akeem & Thomas)
- Rework error capture interactions, including no longer needing
NEEDS_CPU_ACCESS for objects marked for capture. (Thomas)
- Add probed_cpu_visible_size. (Lionel)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Jon Bloomfield
Cc: Da
On 02/05/2022 10:54, Lionel Landwerlin wrote:
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks. (Akeem & Thomas)
- Rework error capture interactions, including no longer nee
ture. (Thomas)
- Add probed_cpu_visible_size. (Lionel)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
Cc: mesa-...@lists.freedesktop.org
---
Documentation/gpu
On 27/04/2022 18:18, Matthew Auld wrote:
On 27/04/2022 07:48, Lionel Landwerlin wrote:
One question though, how do we detect that this flag
(I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS) is accepted on a given
kernel?
I assume older kernels are going to reject object creation if we use
this flag
to select the placement on the GEM object and then query
whether it's mappable by address?
You made a comment stating this is racy, wouldn't querying on the GEM
object prevent this?
Thanks,
-Lionel
On 27/04/2022 09:35, Lionel Landwerlin wrote:
Hi Matt,
The proposal looks good to
ture interactions, including no longer needing
NEEDS_CPU_ACCESS for objects marked for capture. (Thomas)
- Add probed_cpu_visible_size. (Lionel)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
Hey Matthew, all,
This sounds like a good thing to have.
There are a number of DG2 machines where we have a small BAR and this is
causing more apps to fail.
Anv currently reports 3 memory heaps to the app :
- local device only (not host visible) -> mapped to lmem
- device/cpu -> mappe
On 09/12/2021 17:45, Ramalingam C wrote:
From: Mika Kahola
DG2 clear color render compression uses Tile4 layout. Therefore, we need
to define a new format modifier for uAPI to support clear color rendering.
Signed-off-by: Mika Kahola
cc: Anshuman Gupta
Signed-off-by: Juha-Pekka Heikkilä
Sig
the fix to drm_syncobj_find_fence from the transfer
functions.
Fixes: ea569910cbab ("drm/syncobj: add transition iotcls between
binary and timeline v2")
Cc: sta...@vger.kernel.org
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Christian König
Thanks!
Acked-by: Lionel Landwerlin
-
On 07/12/2021 13:00, Christian König wrote:
Am 07.12.21 um 11:40 schrieb Bas Nieuwenhuizen:
On Tue, Dec 7, 2021 at 8:21 AM Christian König
wrote:
Am 07.12.21 um 08:10 schrieb Lionel Landwerlin:
On 07/12/2021 03:32, Bas Nieuwenhuizen wrote:
See the comments in the code. Basically if the
On 07/12/2021 03:32, Bas Nieuwenhuizen wrote:
See the comments in the code. Basically if the seqno is already
signalled then we get a NULL fence. If we then put the NULL fence
in a binary syncobj it counts as unsignalled, making that syncobj
pretty much useless for all expected uses.
Not 100% su
Cc: Alan Previn
Cc: Lionel Landwerlin
Cc: Jason Ekstrand
Cc: Daniel Vetter
Updated the Mesa series for GL/Vulkan.
UAPI looks good :
Acked-by: Lionel Landwerlin
Cheers,
-Lionel
Landwerlin
Signed-off-by: Matt Roper
Thanks,
Acked-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 7 +++
drivers/gpu/drm/i915/gt/intel_engine_types.h | 3 +++
drivers/gpu/drm/i915/i915_gpu_error.c| 10 --
drivers/gpu/drm/i915/i915_reg.h
On 10/06/2021 23:46, john.c.harri...@intel.com wrote:
From: John Harrison
Various UMDs need to know the L3 bank count. So add a query API for it.
Signed-off-by: John Harrison
---
drivers/gpu/drm/i915/gt/intel_gt.c | 15 +++
drivers/gpu/drm/i915/gt/intel_gt.h | 1 +
drivers/gp
return it to user.
v11: (Jani)
- IS_GEN deprecated. User GRAPHICS_VER instead.
v12: (Jason)
- Split cpu timestamp array into timestamp and delta for cleaner API
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
Thanks for the update :
Reviewed-by: Lionel Landwerlin
On 28/04/2021 23:45, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:14 PM Lionel Landwerlin
wrote:
On 28/04/2021 22:54, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 2:50 PM Lionel Landwerlin
wrote:
On 28/04/2021 22:24, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:43 AM Jani Nikula
On 28/04/2021 23:14, Lionel Landwerlin wrote:
On 28/04/2021 22:54, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 2:50 PM Lionel Landwerlin
wrote:
On 28/04/2021 22:24, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:43 AM Jani Nikula
wrote:
On Tue, 27 Apr 2021, Umesh Nerlige Ramappa
On 28/04/2021 22:54, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 2:50 PM Lionel Landwerlin
wrote:
On 28/04/2021 22:24, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:43 AM Jani Nikula wrote:
On Tue, 27 Apr 2021, Umesh Nerlige Ramappa
wrote:
Perf measurements rely on CPU and engine
On 28/04/2021 22:24, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:43 AM Jani Nikula wrote:
On Tue, 27 Apr 2021, Umesh Nerlige Ramappa
wrote:
Perf measurements rely on CPU and engine timestamps to correlate
events of interest across these time domains. Current mechanisms get
these timestam
On 02/03/2021 20:48, Simon Ser wrote:
On Tuesday, March 2nd, 2021 at 7:47 PM, Lionel Landwerlin
wrote:
Thanks Simon. Do you have the rights to push this patch?
Ah, since you're asking about this, it probably means you don't have the
rights. I'll push the patch now to drm-misc
Thanks Simon. Do you have the rights to push this patch?
-Lionel
On 02/03/2021 20:46, Simon Ser wrote:
Good catch!
Reviewed-by: Simon Ser
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dr
Just a silly mistake
Signed-off-by: Lionel Landwerlin
Suggested-by: Ben Widawsky
---
include/uapi/drm/drm_mode.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index b49fbf2bdc408..93b494f704b91 100644
--- a/include
n/gpu/i915:646: ./drivers/gpu/drm/i915/i915_perf.c:4260:
WARNING: Duplicate C declaration, also defined in 'gpu/i915'.
Declaration is 'i915_perf_init'.
./Documentation/gpu/i915:646: ./drivers/gpu/drm/i915/i915_perf.c:4423:
WARNING: Duplicate C declaration
On 16/10/2020 14:50, Jani Nikula wrote:
On Fri, 16 Oct 2020, Lionel Landwerlin wrote:
On 16/10/2020 14:37, Mauro Carvalho Chehab wrote:
Em Fri, 16 Oct 2020 14:01:07 +0300
Joonas Lahtinen escreveu:
+ Lionel
Can you please take a look at best resolving the below problem.
Maybe we should
n/gpu/i915:646: ./drivers/gpu/drm/i915/i915_perf.c:4260:
WARNING: Duplicate C declaration, also defined in 'gpu/i915'.
Declaration is 'i915_perf_init'.
./Documentation/gpu/i915:646: ./drivers/gpu/drm/i915/i915_perf.c:4423:
WARNING: Duplicate C declaration
On 16/10/2020 14:37, Mauro Carvalho Chehab wrote:
Em Fri, 16 Oct 2020 14:01:07 +0300
Joonas Lahtinen escreveu:
+ Lionel
Can you please take a look at best resolving the below problem.
Maybe we should eliminate the duplicate declarations? Updating such
a list manually seems error prone to me.
ut for now.
References: https://patchwork.freedesktop.org/series/80146/
Signed-off-by: Daniel Vetter
Cc: Chris Wilson
Cc: Lionel Landwerlin
Cc: "Christian König"
---
drivers/gpu/drm/drm_syncobj.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm
On 25/06/2020 15:43, Christian König wrote:
Am 25.06.20 um 14:34 schrieb Lionel Landwerlin:
This reverts commit 5de376bb434f80a13138f0ebedc8351ab73d8b0d.
This change breaks synchronization of a timeline.
dma_fence_chain_find_seqno() might be a bit of a confusing name but
this function is not
On 26/06/2020 17:22, Chris Wilson wrote:
Quoting Lionel Landwerlin (2020-06-26 13:21:00)
Trying to explain a bit how this thing works. In my opinion diagrams
are a bit easier to understand than words.
Signed-off-by: Lionel Landwerlin
---
drivers/dma-buf/dma-fence-chain.c | 37
On 26/06/2020 15:43, Daniel Vetter wrote:
On Fri, Jun 26, 2020 at 2:21 PM Lionel Landwerlin
wrote:
Trying to explain a bit how this thing works. In my opinion diagrams
are a bit easier to understand than words.
kerneldoc supports in-line DOT graphs, see e.g.
https://dri.freedesktop.org/docs
Trying to explain a bit how this thing works. In my opinion diagrams
are a bit easier to understand than words.
Signed-off-by: Lionel Landwerlin
---
drivers/dma-buf/dma-fence-chain.c | 37 +++
1 file changed, 37 insertions(+)
diff --git a/drivers/dma-buf/dma-fence
On 25/06/2020 16:47, Chris Wilson wrote:
Quoting Lionel Landwerlin (2020-06-25 14:23:25)
On 25/06/2020 16:18, Chris Wilson wrote:
Quoting Lionel Landwerlin (2020-06-25 13:34:43)
There was probably a misunderstand on how the dma-fence-chain is
supposed to work or what
On 25/06/2020 16:18, Chris Wilson wrote:
Quoting Lionel Landwerlin (2020-06-25 13:34:43)
There was probably a misunderstand on how the dma-fence-chain is
supposed to work or what dma_fence_chain_find_seqno() is supposed to
return.
dma_fence_chain_find_seqno() is here to give us the fence to
in the timeline.
In a timeline, a particular value is reached when all the points up to
and including that value have signaled.
Signed-off-by: Lionel Landwerlin
---
drivers/dma-buf/dma-fence-chain.c | 7 ---
1 file changed, 7 deletions(-)
diff --git a/drivers/dma-buf/dma-fence-chain.c
b
points prior to a given number have completed.
Signed-off-by: Lionel Landwerlin
Fixes: dc2f7e67a28a5c ("dma-buf: Exercise dma-fence-chain under selftests")
---
drivers/dma-buf/st-dma-fence-chain.c | 43 ++--
1 file changed, 21 insertions(+), 22 deletions(-)
di
On 01/03/2020 17:52, Chris Wilson wrote:
Rather than put sensitive, and often voluminous, user details into a
global dmesg, report the error and debug messages directly back to the
user via the kernel tracing mechanism.
Sounds really nice. Don't you want the existing global tracing to be the
On 28/02/2020 13:46, Michel Dänzer wrote:
On 2020-02-28 12:02 p.m., Erik Faye-Lund wrote:
On Fri, 2020-02-28 at 10:43 +, Daniel Stone wrote:
On Fri, 28 Feb 2020 at 10:06, Erik Faye-Lund
wrote:
On Fri, 2020-02-28 at 11:40 +0200, Lionel Landwerlin wrote:
Yeah, changes on vulkan drivers or
On 28/02/2020 11:28, Erik Faye-Lund wrote:
On Fri, 2020-02-28 at 13:37 +1000, Dave Airlie wrote:
On Fri, 28 Feb 2020 at 07:27, Daniel Vetter
wrote:
Hi all,
You might have read the short take in the X.org board meeting
minutes
already, here's the long version.
The good news: gitlab.fd.o has b
On 14/01/2020 16:25, Christian König wrote:
Am 14.01.20 um 13:19 schrieb Lionel Landwerlin:
We've added a set of new APIs to manipulate syncobjs holding timelines
of dma_fence. This adds a bit of documentation about how this works.
v2: Small language nits (Lionel)
Signed-off-by: L
We've added a set of new APIs to manipulate syncobjs holding timelines
of dma_fence. This adds a bit of documentation about how this works.
v2: Small language nits (Lionel)
Signed-off-by: Lionel Landwerlin
Cc: Christian Koenig
Cc: Jason Ekstrand
Cc: David(ChunMing) Zhou
---
drivers/gp
more costly (more ioctls) than the feature in this
patch, so I'm looking for your feedback on this.
Thanks a lot,
-Lionel
On 17/09/2019 16:06, Lionel Landwerlin wrote:
Thanks David,
I'll try to fix the test to match AMD's restrictions.
The v7 here was to fix another e
On 04/10/2019 15:16, Zbigniew Kempczyński wrote:
Remove dead code, likely overseened during review process.
Signed-off-by: Zbigniew Kempczyński
Cc: Chunming Zhou
Cc: Daniel Vetter
Cc: Jason Ekstrand
---
drivers/gpu/drm/drm_syncobj.c | 4
1 file changed, 4 deletions(-)
diff --git a/d
e.
I tried your signal-order test, seems it isn't ready to run, not sure
if I can reproduce your this issue.
-David
----
*From:* Lionel Landwerlin
*Sent:* Tuesday, September 17, 2019 7:03 PM
*To:* dri-devel@lists.freed
blattant mistakes
Store payload atomically (Chris)
v6: Only touch atomic value once (Jason)
v7: Updated atomic value when importing sync file
Signed-off-by: Lionel Landwerlin
Reviewed-by: David Zhou (v6)
Cc: Christian Koenig
Cc: Jason Ekstrand
Cc: David(ChunMing) Zhou
---
drivers/gpu/drm
timeline because the atomic binary payload
may then have a value inferior to the seqno of the new installed
fence.
Cheers,
Lionel Landwerlin (1):
drm/syncobj: add sideband payload
drivers/gpu/drm/drm_internal.h | 2 ++
drivers/gpu/drm/drm_ioctl.c| 3 ++
drivers/gpu/drm/drm_syncobj.c
On 27/08/2019 19:27, Daniel Vetter wrote:
On Mon, Aug 26, 2019 at 07:30:08AM +0300, Lionel Landwerlin wrote:
On 26/08/2019 00:01, Daniel Vetter wrote:
On Fri, Aug 23, 2019 at 8:53 PM Jason Ekstrand wrote:
On Thu, Aug 22, 2019 at 5:28 PM Lionel Landwerlin
wrote:
On 22/08/2019 21:24, Jason
Similarly to the host path from drm_syncobj.c we would like to
disallow those operations to help applications figure where they using
the wrong kind of ioctl.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a
adding to
the timeline.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/drm_syncobj.c | 30 +-
include/drm/drm_syncobj.h | 8
include/uapi/drm/drm.h| 1 +
3 files changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 09248398fa7b..f1af3490f96b 100644
--- a/drivers
chain instead of replacing it.
We still allow explicit reset.
Apart from the fact we need to enforce this policy in each driver's
submission path, I haven't run into odds things yet.
Cheers,
[1] : https://lists.freedesktop.org/archives/dri-devel/2019-August/232700.html
Lionel Landwe
On 26/08/2019 00:01, Daniel Vetter wrote:
On Fri, Aug 23, 2019 at 8:53 PM Jason Ekstrand wrote:
On Thu, Aug 22, 2019 at 5:28 PM Lionel Landwerlin
wrote:
On 22/08/2019 21:24, Jason Ekstrand wrote:
On Thu, Aug 22, 2019 at 9:55 AM Lionel Landwerlin
wrote:
We've added a set of new AP
On 22/08/2019 21:24, Jason Ekstrand wrote:
On Thu, Aug 22, 2019 at 9:55 AM Lionel Landwerlin
mailto:lionel.g.landwer...@intel.com>>
wrote:
We've added a set of new APIs to manipulate syncobjs holding timelines
of dma_fence. This adds a bit of documentation about how
We've added a set of new APIs to manipulate syncobjs holding timelines
of dma_fence. This adds a bit of documentation about how this works.
Signed-off-by: Lionel Landwerlin
Cc: Christian Koenig
Cc: Jason Ekstrand
Cc: David(ChunMing) Zhou
---
drivers/gpu/drm/drm_syncobj.c
blattant mistakes
Store payload atomically (Chris)
v6: Only touch atomic value once (Jason)
Signed-off-by: Lionel Landwerlin
Reviewed-by: David Zhou (v5)
Cc: Christian Koenig
Cc: Jason Ekstrand
Cc: David(ChunMing) Zhou
---
drivers/gpu/drm/drm_internal.h | 2 ++
drivers/gpu/drm
blattant mistakes
Store payload atomically (Chris)
Signed-off-by: Lionel Landwerlin
Cc: Christian Koenig
Cc: Jason Ekstrand
Cc: David(ChunMing) Zhou
---
drivers/gpu/drm/drm_internal.h | 2 ++
drivers/gpu/drm/drm_ioctl.c| 3 ++
drivers/gpu/drm/drm_syncobj.c | 58
A bunch of fixes :)
Lionel Landwerlin (1):
drm/syncobj: add sideband payload
drivers/gpu/drm/drm_internal.h | 2 ++
drivers/gpu/drm/drm_ioctl.c| 3 ++
drivers/gpu/drm/drm_syncobj.c | 58 +-
include/drm/drm_syncobj.h | 9 ++
include/uapi/drm
On 09/08/2019 15:27, Koenig, Christian wrote:
Am 09.08.19 um 14:26 schrieb Lionel Landwerlin:
On 09/08/2019 14:44, Chris Wilson wrote:
Quoting Lionel Landwerlin (2019-08-09 12:30:30)
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index 8a5b2f8f8eb9..1ce83853f997 100644
--- a
1 - 100 of 293 matches
Mail list logo
