On Sun, Mar 17, 2024 at 08:18:57PM +0100, Frej Drejhammar wrote:
> Hi Kevin,
>
> Kevin Hao writes:
>
> > But after kernel commit c91acda3a380, the FB will not be created
> > successfully due to the check of the valid pixel format. Then the bpp
> > is set to 24,
' combo is not a valid pixel format.
Fix this issue by explicitly setting the preferred_depth in this driver.
With this change, the modesetting driver would choose the correct
depth/bpp combo based on our setting in xorg.conf.
Fixes: c91acda3a380 ("drm/gem: Check for valid formats")
Cc:
nything. For instance xserver leaves vrefresh to zero
> causing a division by zero when setting the mode. We want to make sure
> the value is valid and force its recalculation in
> tilcdc_crtc_set_mode().
>
> Reported-by: Kevin Hao
> Fixes: 11abbc9f39e0 ("drm/tilcdc: Set framebuffe
On Tue, Oct 10, 2017 at 04:58:15PM +0300, Jyri Sarha wrote:
>
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
>
> On 10/10/17 15:09, Kevin Hao wrote:
> > The check for vrefresh has b
39e0 ("drm/tilcdc: Set framebuffer DMA address to HW only if
CRTC is enabled")
Cc: # v4.11+
Signed-off-by: Kevin Hao
---
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
b/drivers/gpu/drm/tilcdc/tilcdc_crtc.
