Jessica Zhang 于2025年1月23日周四 15:32写道：
>
>
>
> On 1/17/2025 8:00 AM, Jun Nie wrote:
> > 2 or more SSPPs and dual-DSI interface are need for super wide panel.
> > And 4 DSC are preferred for power optimal in this case due to width
> > limitation of SSPP and MDP clock
Marijn Suijten 于2025年1月20日周一 04:58写道：
>
> On 2025-01-17 15:32:44, Jun Nie wrote:
> > Dmitry Baryshkov 于2025年1月16日周四 16:32写道：
> > >
> > > On Thu, Jan 16, 2025 at 03:26:05PM +0800, Jun Nie wrote:
> > > > Request 4 mixers and 4 DSC for the case that
Marijn Suijten 于2025年1月20日周一 05:15写道：
>
> On 2025-01-18 00:00:51, Jun Nie wrote:
> > There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
> > interface to 3rd PP instead of the 2nd PP.
>
> Can you explain why this patch uses the number of LMs, instead of divi
selected as right mixer. To correctly select the mixer
within a pair, test the least significant bit of the counter. If the
least significant bit is not set, select the mixer as left one;
otherwise, select the mixer as right one for all pairs.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
-resolution cases where both DSC
and dual interfaces are enabled. More use cases can be incorporated
later if quad-pipe capabilities are required.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 6
screen ROI if topology is quad pipe case.
The clipped rectangle on every half of screen is futher handled by two
pipes if its width exceeds a limit for a single pipe.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 11 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2
STAGES_PER_PLANE and blend pipes per mixer pair with configuration in the
stage structure.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 45 +++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 +
2 files changed, 30 insertions(+), 16 deletions
the plane.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 14 +++---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 4 ++--
4
There are 2 pipes in a drm plane at most currently, while 4 pipes are
required for quad-pipe case. Generalize the handling to pipe pair and
ease handling to another pipe pair later. Store pipes in array with
removing dedicated r_pipe.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
Add pipe as trace argument in trace_dpu_crtc_setup_mixer() to ease
converting pipe into pipe array later.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 10 +-
2 files changed, 6
operation. While the sspp assignment is in
drm_atomic_helper_check_planes() call tree. So CRTC is more central
than encoder. Siwtching the id achieves above goal.
Co-developed-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1
completely clearing it. This prevents all
pairs from being cleared in cases where multiple LM pairs are needed.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers
Currently if DSC support is requested, the driver only supports using
2 DSC blocks. We need 4 DSC in quad-pipe topology in future. So Only
configure DSC engines in use, instead of the maximum number of DSC
engines.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm
to the subsequent two pipes.
Assign SSPPs to the pipes in each stage using a unified method and
to loop the stages accordingly.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 63 +++
1 file changed, 39 insertions(+), 24 deletions(-)
diff
.
Fixes: ("dbbf57dfd04e6 drm/msm/dpu: split dpu_plane_atomic_check()")
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 71 ---
1 file changed, 36 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
b/d
There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
interface to 3rd PP instead of the 2nd PP.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 15 +--
1 file changed, 13 insertions(+), 2
failure, so add a table to match the type ID
to an human readable resource name and use it in the error print.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
...@linaro.org
Signed-off-by: Jun Nie
---
Jun Nie (15):
drm/msm/dpu: check every pipe per capability
drm/msm/dpu: Do not fix number of DSC
drm/msm/dpu: configure DSC per number in use
drm/msm/dpu: polish log for resource allocation
drm/msm/dpu: decide right side per last bit
Currently, if DSC is enabled, only 2 DSC engines are supported so far.
More usage cases will be added, such as 4 DSC in 4:4:2 topology. So
get the real number of DSCs to decide whether DSC merging is needed.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1
Dmitry Baryshkov 于2025年1月16日周四 16:32写道：
>
> On Thu, Jan 16, 2025 at 03:26:05PM +0800, Jun Nie wrote:
> > Request 4 mixers and 4 DSC for the case that both dual-DSI and DSC are
> > enabled.
>
> Why? What is the issue that you are solving?
To support high-resolution cas
Dmitry Baryshkov 于2025年1月16日周四 18:08写道：
>
> On Thu, Jan 16, 2025 at 05:49:43PM +0800, Jun Nie wrote:
> > Dmitry Baryshkov 于2025年1月16日周四 16:00写道：
> > >
> > > On Thu, Jan 16, 2025 at 03:25:59PM +0800, Jun Nie wrote:
> > > > Store pipes in array with remo
Dmitry Baryshkov 于2025年1月16日周四 15:44写道：
>
> On Thu, Jan 16, 2025 at 03:25:50PM +0800, Jun Nie wrote:
> > Move requreiment check to routine of every pipe check. As sblk
> > and pipe_hw_caps of r_pipe are not checked in current implementation.
>
How about this version?
The
Dmitry Baryshkov 于2025年1月16日周四 16:18写道：
>
> On Thu, Jan 16, 2025 at 03:26:03PM +0800, Jun Nie wrote:
> > Support SSPP assignment for quad-pipe case with unified method.
> > The first 2 pipes can share a set of mixer config and enable
> > multi-rect mode if condition is
Dmitry Baryshkov 于2025年1月16日周四 16:14写道：
>
> On Thu, Jan 16, 2025 at 03:26:02PM +0800, Jun Nie wrote:
> > The content of every half of screen is sent out via one interface in
> > dual-DSI case. The content for every interface is blended by a LM
> > pair in quad-pipe case, t
Jun Nie 于2025年1月16日周四 17:49写道：
>
> Dmitry Baryshkov 于2025年1月16日周四 16:00写道：
> >
> > On Thu, Jan 16, 2025 at 03:25:59PM +0800, Jun Nie wrote:
> > > Store pipes in array with removing dedicated r_pipe. There are
> > > 2 pipes in a drm plane at most currently,
Dmitry Baryshkov 于2025年1月16日周四 16:00写道：
>
> On Thu, Jan 16, 2025 at 03:25:59PM +0800, Jun Nie wrote:
> > Store pipes in array with removing dedicated r_pipe. There are
> > 2 pipes in a drm plane at most currently, while 4 pipes are
> > required for quad-pipe case. General
selected as right mixer. To correctly select the mixer
within a pair, test the least significant bit of the counter. If the
least significant bit is not set, select the left mixer; otherwise,
select the right mixer for all pairs.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu
Add resource type info on allocation failure to ease debug. Because
more resources are required in new usage cases, such as quad-pipe case.
It is more likely that resource allocation may fail than existing usage
cases.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 23
Currently, 2 pipes are supported at most. It is enough to check id to
know which pipe is in multi-rect mode and disable it. Multiple pairs
are used and need to check multirect_index to decide what pipes are in
multi-rect mode to disable them.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp
Currently if DSC support is requested, the driver only supports using
2 DSC blocks. We need 4 DSC in quad-pipe topology in future. So Only
configure DSC engines in use, instead of the maximum number of DSC
engines.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6
STAGES_PER_PLANE and blend pipes per mixer pair with configuration in the
stage structure.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 42 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 +
2 files changed, 26 insertions(+), 17 deletions
being cleared in cases
where multiple LM pairs are needed.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index
Request 4 mixers and 4 DSC for the case that both dual-DSI and DSC are
enabled. 4 pipes are preferred for dual DSI case for it is power optimal
for DSC.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 6
Support SSPP assignment for quad-pipe case with unified method.
The first 2 pipes can share a set of mixer config and enable
multi-rect mode if condition is met. It is also the case for
the later 2 pipes.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 63
future, and pipes per stage will be
different from pipes per plane in this case. So pipes per plane is
split out as PIPES_PER_PLANE.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 +
drivers/gpu/drm/msm/disp/dpu1
Store pipes in array with removing dedicated r_pipe. There are
2 pipes in a drm plane at most currently, while 4 pipes are
required for quad-pipe case. Generalize the handling to pipe pair
and ease handling to another pipe pair later.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1
screen ROI if topology is quad pipe case.
The clipped rectangle on every half of screen will be split further
by half if its width still exceeds limit.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 11 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 2 +
drivers/gpu
.
- Split DSI patches into other patch set.
- Link to v1:
https://lore.kernel.org/all/20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-v1-0-bdb05b4b5...@linaro.org/
Signed-off-by: Jun Nie
---
Jun Nie (16):
drm/msm/dpu: check every pipe per capability
drm/msm/dpu: Do not fix number
Add pipe as trace argument in trace_dpu_crtc_setup_mixer() to ease
converting pipe into pipe array later.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 10 +-
2 files changed, 6 insertions(+), 6 deletions
There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
interface to 3rd PP instead of the 2nd PP.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 15 +--
1 file changed, 13 insertions(+), 2
operation. While the sspp assignment is in
drm_atomic_helper_check_planes() call tree. So CRTC is more central
than encoder. Siwtching the id achieves above goal.
Co-developed-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1
Currently, if DSC is enabled, only 2 DSC engines are supported so far.
More usage cases will be added, such as 4 DSC in 4:4:2 topology. So
get the real number of DSCs to decide whether DSC merging is needed.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 --
1
Move requreiment check to routine of every pipe check. As sblk
and pipe_hw_caps of r_pipe are not checked in current implementation.
Fixes: ("dbbf57dfd04e6 drm/msm/dpu: split dpu_plane_atomic_check()")
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_pl
Jessica Zhang 于2025年1月9日周四 09:29写道：
>
>
>
> On 12/18/2024 11:49 PM, Jun Nie wrote:
> > Add the case to reserve multiple pairs mixers for high resolution.
> > Current code only supports one pair of mixer usage case. To support
> > quad-pipe usage case,
Jessica Zhang 于2025年1月9日周四 07:41写道：
>
>
>
> On 12/19/2024 2:09 PM, Dmitry Baryshkov wrote:
> > On Thu, Dec 19, 2024 at 03:49:22PM +0800, Jun Nie wrote:
> >> decide right side of a pair per last bit, in case of multiple
> >> mixer pairs.
> >
> > Pro
Dmitry Baryshkov 于2025年1月4日周六 01:51写道：
>
> On Fri, Jan 03, 2025 at 11:49:07PM +0800, Jun Nie wrote:
> > Dmitry Baryshkov 于2024年12月20日周五 07:46写道：
> > >
> > > On Thu, Dec 19, 2024 at 03:49:33PM +0800, Jun Nie wrote:
> > > > Request 4 mixers and 4 DSC f
Dmitry Baryshkov 于2024年12月20日周五 07:46写道：
>
> On Thu, Dec 19, 2024 at 03:49:33PM +0800, Jun Nie wrote:
> > Request 4 mixers and 4 DSC for the case that both dual-DSI and DSC are
> > enabled. We prefer to use 4 pipes for dual DSI case for it is power optimal
> > for DSC.
&g
Dmitry Baryshkov 于2024年12月20日周五 06:29写道：
>
> On Thu, Dec 19, 2024 at 03:49:28PM +0800, Jun Nie wrote:
> > Add pipe as trace argument to ease converting pipe into
> > pipe array later.
>
> Isn't it already converted in on of the previous patches? Also you are
>
Jun Nie 于2024年12月19日周四 15:49写道：
>
> To: Rob Clark
> To: Abhinav Kumar
> To: Dmitry Baryshkov
> To: Sean Paul
> To: Marijn Suijten
> To: David Airlie
> To: Simona Vetter
> Cc: linux-arm-...@vger.kernel.org
> Cc: dri-devel@lists.freedesktop.org
> Cc: fre
Request 4 mixers and 4 DSC for the case that both dual-DSI and DSC are
enabled. We prefer to use 4 pipes for dual DSI case for it is power optimal
for DSC.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 6
Support SSPP assignment for quad-pipe case with unified method.
The first 2 pipes can share a set of mixer config and enable
multi-rect mode if condition is met. It is also the case for
the later 2 pipes.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 67
Move requreiment check to routine of every pipe check. There will be
multiple SSPPs for quad-pipe case in future. Only check valid pipe
as some pipes are for multi-rect or right half of screen that may
not be used.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 86
clipped rectangle on every half of screen will be split further
by half if its width still exceeds limit.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 7 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 6 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 +
drivers
STAGES_PER_PLANE.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 38 ++---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 1 +
2 files changed, 25 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm
Add pipe as trace argument to ease converting pipe into
pipe array later.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h | 10 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/msm
Split PIPES_PER_STAGE definition per plane and mixer pair. Because
there are more than 2 pipes in quad pipe case, while 2 pipes at most
per mixer pair. A stage struct serve a mixer pair, so pipes per
plane is split out as PIPES_PER_PLANE.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1
Store pipes in array with removing dedicated r_pipe. There are
2 pipes in a drm plane at most currently. While 4 pipes are
needed for new usage case. This change generalize the handling
to pipe pair and ease handling to another pipe pair later.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm
There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
interface to 3rd PP instead of the 2nd PP.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a
operation. While the sspp assignment is in
drm_atomic_helper_check_planes() call tree. So CRTC is more central
than encoder. Siwtching the id achieves above goal.
Co-developed-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1
pairs are needed, the failure on the test
of 2nd pair results clearing to the 1st pair. This patch only clear the
bit for the 2nd pair allocation before retry on another pair.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 6 +-
1 file changed, 5 insertions(+), 1 del
decide right side of a pair per last bit, in case of multiple
mixer pairs.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b
Add resource type info on allocation failure.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index
://lore.kernel.org/all/20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-v1-0-bdb05b4b5...@linaro.org/
Signed-off-by: Jun Nie
---
Jun Nie (15):
drm/msm/dpu: Do not fix number of DSC
drm/msm/dpu: configure DSC per number in use
drm/msm/dpu: polish log for resource allocation
drm
Currently if DSC support is requested, the driver only supports using
2 DSC blocks. We need 4 DSC in quad-pipe topology in future. So let's
only configure DSC engines in use, instead of the maximum number of
DSC engines.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.
If DSC is enabled, the only case is with 2 DSC engines so far. More
usage case will be added, such as 4 DSC in 4:4:2 topoplogy.
So get real number of DSCs to decide whether DSC merge is needed.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 --
1 file changed, 4
Dmitry Baryshkov 于2024年10月11日周五 15:13写道：
>
> On Fri, 11 Oct 2024 at 10:11, Jun Nie wrote:
> >
> > Dmitry Baryshkov 于2024年10月11日周五 15:03写道：
> > >
> > > On Fri, 11 Oct 2024 at 09:40, Jun Nie wrote:
> > > >
> > > > Dmitry Baryshkov 于202
Dmitry Baryshkov 于2024年10月10日周四 21:29写道：
>
> On Wed, Oct 09, 2024 at 04:50:25PM GMT, Jun Nie wrote:
> > Clip plane into pipes per left and right half screen ROI if topology
> > is quad pipe.
>
> Why? Please provide an explanation for the reviewers not knowing the
> det
Dmitry Baryshkov 于2024年10月10日周四 21:20写道：
>
> On Wed, Oct 09, 2024 at 04:50:23PM GMT, Jun Nie wrote:
> > Move requreiment check to routine of every pipe check. Because there is
>
> s/Because there is/There will be/
>
> > multiple SSPPs for quad-pipe case in future.
>
Dmitry Baryshkov 于2024年10月10日周四 22:00写道：
>
> On Wed, Oct 09, 2024 at 04:50:27PM GMT, Jun Nie wrote:
> > Request 4 mixers and 4 DSC for the case that both dual-DSI and DSC are
> > enabled. We prefer to use 4 pipes for dual DSI case for it is power optimal
> > for DSC.
&g
Dmitry Baryshkov 于2024年10月11日周五 15:10写道：
>
> On Fri, 11 Oct 2024 at 09:49, Jun Nie wrote:
> >
> > Dmitry Baryshkov 于2024年10月10日周四 21:08写道：
> > >
> > > On Wed, Oct 09, 2024 at 04:50:18PM GMT, Jun Nie wrote:
> > > > Store pipes in array with removin
Dmitry Baryshkov 于2024年10月11日周五 15:03写道：
>
> On Fri, 11 Oct 2024 at 09:40, Jun Nie wrote:
> >
> > Dmitry Baryshkov 于2024年10月10日周四 21:15写道：
> > >
> > > On Wed, Oct 09, 2024 at 04:50:22PM GMT, Jun Nie wrote:
> > > > Blend pipes by set of m
Dmitry Baryshkov 于2024年10月10日周四 21:21写道：
>
> On Wed, Oct 09, 2024 at 04:50:24PM GMT, Jun Nie wrote:
> > Share SSPP info for multi-rect case if virtual plane is not enabled.
> > Otherwise, the 2nd half of DMA content is not displayed due to sspp
> > pointer of r_pipe is nu
Dmitry Baryshkov 于2024年10月10日周四 21:08写道：
>
> On Wed, Oct 09, 2024 at 04:50:18PM GMT, Jun Nie wrote:
> > Store pipes in array with removing dedicated r_pipe. There are
> > 2 pipes in a drm plane at most currently. While 4 pipes are
> > needed for new usage case. This change
Dmitry Baryshkov 于2024年10月10日周四 21:15写道：
>
> On Wed, Oct 09, 2024 at 04:50:22PM GMT, Jun Nie wrote:
> > Blend pipes by set of mixer pair config. The first 2 pipes are for left
> > half screen with the first set of mixer pair config. And the later 2 pipes
> > are for
Dmitry Baryshkov 于2024年10月10日周四 21:12写道：
>
> On Wed, Oct 09, 2024 at 04:50:21PM GMT, Jun Nie wrote:
> > Update mixer number info earlier so that the plane nopipe check
> > can have the info to clip the plane. Otherwise, the first nonpipe
> > check will have mixer numb
Dmitry Baryshkov 于2024年10月10日周四 06:10写道：
>
> On Wed, 9 Oct 2024 at 09:39, Jun Nie wrote:
> >
> > Only 2 DSC engines are allowed, or no DSC is involved currently.
>
> Can't parse this phrase.
How about this:
If DSC is enabled, the only case is with 2 DSC engines so
Request 4 mixers and 4 DSC for the case that both dual-DSI and DSC are
enabled. We prefer to use 4 pipes for dual DSI case for it is power optimal
for DSC.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 6
Support SSPP assignment for quad-pipe case with unified method.
The first 2 pipes can share a set of mixer config and enable
multi-rect mode if condition is met. It is also the case for
the later 2 pipes.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 85
Clip plane into pipes per left and right half screen ROI if topology
is quad pipe. Then split the clipped rectangle by half if the rectangle
width still exceeds width limit.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 7 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h
Share SSPP info for multi-rect case if virtual plane is not enabled.
Otherwise, the 2nd half of DMA content is not displayed due to sspp
pointer of r_pipe is null.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 5 +
1 file changed, 5 insertions(+)
diff --git a
Move requreiment check to routine of every pipe check. Because there is
multiple SSPPs for quad-pipe case in future.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 +
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 86 ++---
2 files changed, 44
Blend pipes by set of mixer pair config. The first 2 pipes are for left
half screen with the first set of mixer pair config. And the later 2 pipes
are for right in quad pipe case.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 38 ++---
drivers
Update mixer number info earlier so that the plane nopipe check
can have the info to clip the plane. Otherwise, the first nonpipe
check will have mixer number as 0 and plane is not checked.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ++-
1 file changed
There are 2 interfaces and 4 pingpong in quad pipe. Map the 2nd
interface to 3rd PP instead of the 2nd PP.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
Split PIPES_PER_STAGE definition per plane and mixer pair. Because
there are more than 2 pipes in quad pipe case, while 2 pipes at most
per mixer pair.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 2 +-
drivers
Store pipes in array with removing dedicated r_pipe. There are
2 pipes in a drm plane at most currently. While 4 pipes are
needed for new usage case. This change generalize the handling
to pipe pair and ease handling to another pipe pair later.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm
operation. While the sspp assignment is in
drm_atomic_helper_check_planes() call tree. So CRTC is more central
than encoder. Siwtching the id achieves above goal.
Co-developed-by: Dmitry Baryshkov
Signed-off-by: Dmitry Baryshkov
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1
pairs are needed, the failure on the test
of 2nd pair results clearing to the 1st pair. This patch only clear the
bit for the 2nd pair allocation before retry on another pair.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 6 +-
1 file changed, 5 insertions(+), 1 del
decide right side of a pair per last bit, in case of multiple
mixer pairs.
Signed-off-by: Jun Nie
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b
Add resource allocation type info.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
index 15b42a6683639
sequence with changing to 2 pipes topology first. Then
prepare for quad-pipe setup, then enable quad-pipe at last.
- Link to v1:
https://lore.kernel.org/all/20240829-sm8650-v6-11-hmd-pocf-mdss-quad-upstream-8-v1-0-bdb05b4b5...@linaro.org/
Signed-off-by: Jun Nie
---
Jun Nie (14):
drm/msm
Only 2 DSC engines are allowed, or no DSC is involved currently.
We need 4 DSC in quad-pipe topology in future. So let's only configure
DSC engines in use, instread of maximum number of DSC engines.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 13 ---
DSC is
not aligned with maximum pipes.
Thus we support DSC flexiblely with this patch set with storing
the number and configuring DSC with it.
Signed-off-by: Jun Nie
---
Jun Nie (2):
drm/msm/dpu: Do not fix number of DSC
drm/msm/dpu: configure DSC per number in use
drivers/gpu/drm
If DSC is enabled, the only case is with 2 DSC engines so far. More
usage case will be added, such as 4 DSC in 4:4:2 topoplogy.
So get real number of DSCs to decide whether DSC merge is needed.
Signed-off-by: Jun Nie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 2 ++
drivers/gpu/drm/msm
Marijn Suijten 于2024年9月3日周二 18:12写道：
>
> On 2024-08-29 18:17:32, Jun Nie wrote:
> > Data width for dsc engine is aligned with pipe, not with whole screen
> > width. Because the width may be halved in DSI bonded case.
> >
> > The dsc width is not related to the t
Dmitry Baryshkov 于2024年8月29日周四 19:51写道：
>
> On Thu, 29 Aug 2024 at 13:21, Jun Nie wrote:
> >
> > Blend pipes by left and right. The first 2 pipes are for
> > left half screen and the later 2 pipes are for right in quad
> > pipe case.
> >
> > Signed-off
Dmitry Baryshkov 于2024年8月29日周四 19:38写道：
>
> > @@ -1033,13 +1030,10 @@ static int dpu_plane_atomic_check(struct drm_plane
> > *plane,
> > return -E2BIG;
> > }
> >
> > - /*
> > -* Use multirect for wide plane. We do not support d
Dmitry Baryshkov 于2024年8月29日周四 19:30写道：
>
> On Thu, 29 Aug 2024 at 13:20, Jun Nie wrote:
> >
> > Support 4 pipes and their configs at most. They are for 2 SSPP
> > and their multi-rect mode. Because one SSPP can co-work with
> > 2 mixer at most, 2 pair of mixer
Dmitry Baryshkov 于2024年8月29日周四 19:17写道：
>
> On Thu, 29 Aug 2024 at 13:20, Jun Nie wrote:
> >
> > Add the case to reserve multiple pair mixer for high resolution
>
> I think you already know what is missing here.
Add the case to reserve multiple pair mixer for high resol
Dmitry Baryshkov 于2024年8月29日周四 19:12写道：
>
> On Thu, 29 Aug 2024 at 13:20, Jun Nie wrote:
> >
> > request more mixer for the case that hdisplay exceeding 4096
> > and DSC enabled.
>
> This doesn't seem to match the code. And it misses the _reason_ to do it.
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