On Fri, 4 Mar 2022 at 06:32, Tommy Haung wrote:
>
> Update the aspeed_gfx_set_clk with display width.
> At AST2600, the display clock could be coming from
> HPLL clock / 16 = 75MHz. It would fit 1024x768@70Hz.
> Another chip will still keep 800x600.
>
> Signed-off-by: Tommy Haung
> ---
> drivers
On Fri, 4 Mar 2022 at 06:32, Tommy Haung wrote:
>
> Update the aspeed_gfx_set_clk with display width.
> At AST2600, the display clock could be coming from
> HPLL clock / 16 = 75MHz. It would fit 1024x768@70Hz.
> Another chip will still keep 800x600.
>
> Signed-off-by: Tommy Haung
> ---
> drivers
On Tue, 15 Mar 2022 at 01:21, Linus Walleij wrote:
>
> On Fri, Mar 4, 2022 at 1:03 AM Joel Stanley wrote:
>
> > The example needs updating to match the to be added yaml bindings for
> > the gfx node.
> >
> > Signed-off-by: Joel Stanley
>
> Reviewed-by: Li
Convert the bindings to yaml and add the ast2600 compatible string.
The legacy mfd description was put in place before the gfx bindings
existed, to document the compatible that is used in the pinctrl
bindings.
Signed-off-by: Joel Stanley
---
.../devicetree/bindings/gpu/aspeed,gfx.yaml | 69
The example needs updating to match the to be added yaml bindings for
the gfx node.
Signed-off-by: Joel Stanley
---
.../bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 16
1 file changed, 16 insertions(+)
diff --git
a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500
the gfx
bindings, and at the time we didn't have any support fo the gfx device,
so Andrew added the mfd ones.
The example in the pinctrl bindings is updated to prevent warnings about
missing properties that pop up when the gfx yaml bindings are added.
Joel Stanley (2):
dt-bindings: pi
On Thu, 3 Mar 2022 at 19:34, Rob Herring wrote:
>
> On Wed, Mar 2, 2022 at 12:01 PM Rob Herring wrote:
> >
> > On Wed, Mar 02, 2022 at 03:40:56PM +1030, Joel Stanley wrote:
> > > Convert the bindings to yaml and add the ast2600 compatible string.
> > &g
Convert the bindings to yaml and add the ast2600 compatible string.
Signed-off-by: Joel Stanley
---
.../devicetree/bindings/gpu/aspeed,gfx.yaml | 69 +++
.../devicetree/bindings/gpu/aspeed-gfx.txt| 41 ---
2 files changed, 69 insertions(+), 41 deletions(-)
create
SOLE=y
> CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
> CONFIG_LOGO=y
> CONFIG_LOGO_LINUX_CLUT224=y
>
> 2. The Linux logo will be shown on the screen, when the BMC boot in Linux.
>
> v3:
> Refine the patch for clear separate purpose.
> Skip to send devicetree patch
On Wed, 2 Mar 2022 at 02:50, Tommy Haung wrote:
>
> Remove the ast2500-gfx from aspeed-g6.dtsi.
> In the AST2600, the ASPEED_RESET_CRT1 is replaced by
> ASPEED_RESET_GRAPHICS. This is no differnce between these two reset
> behavior but reigster location is changed. The HW controller states
> and F
de that in the commit message for the device tree change?
>
> Thanks,
>
> By Tommy
>
> > -Original Message-
> > From: Joel Stanley
> > Sent: Monday, February 28, 2022 5:51 PM
> > To: Tommy Huang
> > Cc: David Airlie ; Daniel
eers,
Joel
>
> v3:
> Refine the patch for clear separate purpose.
> Skip to send devicetree patch
>
> v2:
> Remove some unnecessary patch.
> Refine for reviwer request.
>
> v1:
> First add patch.
>
> Joel Stanley (2):
> ARM: dts: aspeed: Add GFX
On Wed, 8 Dec 2021 at 01:34, Tommy Haung wrote:
>
> From: tommy-huang
>
> Add more reset and clock select code for AST2600.
> The gfx_flags parameter was added for chip caps idenified.
Can you tell me a bit more about the two reset lines:
What is the CRT reset line controlling?
What does the e
On Wed, 8 Dec 2021 at 01:34, Tommy Haung wrote:
>
> From: tommy-huang
>
> Add AST2600 chip support and setting.
>
> Signed-off-by: tommy-huang
Reviewed-by: Joel Stanley
> ---
> drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 9 +
> 1 file changed, 9 insertions(
Hi David, Daniel,
On Fri, 19 Nov 2021 at 06:54, Jeremy Kerr wrote:
>
> Hi Joel,
>
> > Before the drm driver had support for this file there was a driver
> > that exposed the contents of the vga password register to userspace.
> > It would present the entire register instead of interpreting it.
>
unnecessary patch.
> Refine for reviwer request.
>
> v1:
> First add patch.
>
> Joel Stanley (2):
> ARM: dts: aspeed: Add GFX node to AST2600
> ARM: dts: aspeed: ast2600-evb: Enable GFX device
>
> tommy-huang (2):
> drm/aspeed: Update INTR_STS handling
>
existing userspace, which is looking for 0xa8 in
the lower byte.
Change our implementation to expose the entire register.
Fixes: 696029eb36c0 ("drm/aspeed: Add sysfs for output settings")
Reported-by: Oskar Senft
Signed-off-by: Joel Stanley
---
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
On Mon, 1 Nov 2021 at 11:01, tommy-huang wrote:
>
> The V-sync INTR_STS is differnet on AST2600.
> Change into general rule to handle it.
>
> Signed-off-by: tommy-huang
> ---
> drivers/gpu/drm/aspeed/aspeed_gfx.h | 2 ++
> drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 26 +++
On Wed, 9 Jun 2021 at 09:30, Arnd Bergmann wrote:
>
> On Tue, Jun 8, 2021 at 6:49 PM Hans Verkuil wrote:
> > On 08/06/2021 18:14, Arnd Bergmann wrote:
> >
> > Right now it is inherent to the driver. It is probably possible to drop
> > support
> > for video overlay devices if CONFIG_FB=n, but it
add support for the AST2400 now, and in the future the AST2600.
Reviewed-by: Jeremy Kerr
Signed-off-by: Joel Stanley
---
v3:
- Fix match table
v2:
- Add jk's review
- Clean up comments and unused define
- Add VGA password register
---
drivers/gpu/drm/aspeed/aspeed_gfx.h
This scales better to multiple families of SoC. The lookup by compatible
can be removed in a future change.
The fallback path is for the ast2500 platform only. Other platforms will
be added with the new style, so they won't need fallback paths.
Signed-off-by: Joel Stanley
---
v2: Fix fal
-misc once they have been reviewed.
v2 fixes review from Jeremy. Thanks!
v3 fixes the dt match table declaration
Joel Stanley (2):
drm/aspeed: Look up syscon by phandle
drm/aspeed: Use dt matching for default register values
drivers/gpu/drm/aspeed/aspeed_gfx.h | 8 +--
drivers/gpu/drm
add support for the AST2400 now, and in the future the AST2600.
Reviewed-by: Jeremy Kerr
Signed-off-by: Joel Stanley
---
v2:
- Add jk's review
- Clean up comments and unused define
- Add VGA password register
---
drivers/gpu/drm/aspeed/aspeed_gfx.h | 8 ++--
drivers/gpu/drm/a
This scales better to multiple families of SoC. The lookup by compatible
can be removed in a future change.
The fallback path is for the ast2500 platform only. Other platforms will
be added with the new style, so they won't need fallback paths.
Signed-off-by: Joel Stanley
---
v2: Fix fal
-misc once they have been reviewed.
v2 fixes review from Jeremy. Thanks!
Joel Stanley (2):
drm/aspeed: Look up syscon by phandle
drm/aspeed: Use dt matching for default register values
drivers/gpu/drm/aspeed/aspeed_gfx.h | 8 +--
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 11
On Tue, 2 Feb 2021 at 04:46, Jeremy Kerr wrote:
>
> Hi Joel,
>
> > There are minor differences in the values for the threshold value and
> > the scan line size between families of ASPEED SoC. Additionally the
> > SCU register for the output control differs between families.
> >
> > This adds devic
On Tue, 2 Feb 2021 at 04:39, Jeremy Kerr wrote:
>
> Hi Joel,
>
> Sounds like a good idea! One comment though:
>
> > @@ -111,10 +112,13 @@ static int aspeed_gfx_load(struct drm_device *drm)
> > if (IS_ERR(priv->base))
> > return PTR_ERR(priv->base);
> >
> > - priv->scu
AST2400 now, and in the future the AST2600.
Signed-off-by: Joel Stanley
---
drivers/gpu/drm/aspeed/aspeed_gfx.h | 7 ++--
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 10 +++--
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 48 +++-
3 files changed, 49 insertions(+), 16
This scales better to multiple families of SoC. The lookup by compatible
can be removed in a future change.
Signed-off-by: Joel Stanley
---
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/aspeed
-misc once they have been reviewed.
Joel Stanley (2):
drm/aspeed: Look up syscon by phandle
drm/aspeed: Use dt matching for default register values
drivers/gpu/drm/aspeed/aspeed_gfx.h | 7 +--
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 10 ++--
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
: undefined reference to
> `undo_isolate_page_range'
>
> Fixes: 76356a966e33 ("drm: aspeed: Clean up Kconfig options")
> Reported-by: kernel test robot
> Signed-off-by: Randy Dunlap
> Cc: Joel Stanley
> Cc: Andrew Jeffery
> Cc: Daniel Ve
On Fri, 9 Oct 2020 at 08:26, Thomas Zimmermann wrote:
>
> Hi
>
> Am 09.10.20 um 10:06 schrieb Joel Stanley:
> > On Fri, 9 Oct 2020 at 08:01, Thomas Zimmermann wrote:
> >>
> >> Hi
> >>
> >> Am 09.10.20 um 09:54 schrieb Joel Stanley:
On Fri, 9 Oct 2020 at 08:01, Thomas Zimmermann wrote:
>
> Hi
>
> Am 09.10.20 um 09:54 schrieb Joel Stanley:
> > On Fri, 22 May 2020 at 13:52, Thomas Zimmermann wrote:
> >>
> >> DRM_GEM_CMA_DRIVER_OPS sets the functions in struct drm_driver
> >> to t
ou
were after a review.
Reviewed-by: Joel Stanley
I will apply it to drm-misc-next.
Cheers,
Joel
> ---
> drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> b/driver
On Mon, 24 Feb 2020 at 00:06, Andrew Jeffery wrote:
>
>
>
> On Sun, 23 Feb 2020, at 10:21, Ondrej Jirman wrote:
> > Arguments to GENMASK should be msb >= lsb.
> >
> > Signed-off-by: Ondrej Jirman
> > ---
> > I just grepped the whole kernel tree for GENMASK argument order issues,
> > and this is o
BMC internal graphics, this driver)
10: Pass through mode from video input port A
11: Pass through mode from video input port B
Values for the read-only vga password register are:
1: Host driving the display
0: Host not driving the display
Signed-off-by: Joel Stanley
---
drivers/gpu/drm
back. So, that response validates my patch.
The bmc related lists (openbmc@, linux-aspeed@, linux-fsi@) on
ozlabs.org that I own have a soft-moderation policy. The first time
you post a patch I add you to a whitelist. Given the low volume on
these lists this works for me.
I don'
gt; after drm_dev_register() to avoid the warning. Do that.
> >
> > Fixes: 1aed9509b29a6 ("drm/fb-helper: Remove return value from
> > drm_fbdev_generic_setup()")
> > Signed-off-by: Guenter Roeck
>
> I thought we had this fixed already - but could not find the
On Mon, 20 Apr 2020 at 18:39, Christophe Leroy wrote:
>
> _ALIGN() is specific to powerpc
> ALIGN() is generic and does the same
>
> Replace _ALIGN() by ALIGN()
>
> Signed-off-by: Christophe Leroy
Reviewed-by: Joel Stanley
> ---
> arch/powerpc/include/asm/book3s/
On Mon, 20 Apr 2020 at 18:39, Christophe Leroy wrote:
>
> _ALIGN_UP() is specific to powerpc
> ALIGN() is generic and does the same
>
> Replace _ALIGN_UP() by ALIGN()
>
> Signed-off-by: Christophe Leroy
Reviewed-by: Joel Stanley
> ---
> arch/powerpc/include/a
ddr)&(~((typeof(addr))(size)-1)))
+addr) - ((size) - 1)) + ((typeof(addr))(size) - 1)) &
~((typeof(addr))(size)-1))
Which I assume the compiler will sort out?
Reviewed-by: Joel Stanley
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/include/asm/book3s/32/pgtab
On Mon, 20 Apr 2020 at 18:39, Christophe Leroy wrote:
>
> These three powerpc macros have been replaced by
> equivalent generic macros and are not used anymore.
>
> Remove them.
>
> Signed-off-by: Christophe Leroy
Reviewed-By: Joel Stanley
riscv has a copy of these too t
iff:
- (((addr)+((size)-1))&(~((typeof(addr))(size)-1)))
+ (((addr)+((typeof(addr))(size) - 1))&~((typeof(addr))(size)-1))
So it adds a cast, but aside from that it's the same.
Reviewed-by: Joel Stanley
> ---
> drivers/ps3/ps3-lpm.c | 6 +++---
> drivers/vfi
On Thu, 25 Jul 2019 at 01:18, Joe Perches wrote:
>
> On Thu, 2019-07-25 at 10:40 +0930, Andrew Jeffery wrote:
> >
> > On Thu, 25 Jul 2019, at 02:46, Joe Perches wrote:
> > > On Tue, 2019-07-09 at 22:04 -0700, Joe Perches wrote:
> > > > Arguments are supposed to be ordered high then low.
> > > >
>
On Mon., 15 Apr. 2019, 17:32 Daniel Vetter, wrote:
> On Fri, Apr 05, 2019 at 06:41:17PM +1030, Joel Stanley wrote:
> > The GFX IP is inside of the ASPEED BMC SoC so there is little use
> > enabling it on a kernel that does not support ASPEED.
> >
> > When bui
On Fri, 5 Apr 2019 at 11:20, Noralf Trønnes wrote:
>
>
>
> Den 05.04.2019 07.28, skrev Joel Stanley:
> > When building this driver for architectures where CMA is not available.
> >
> > Fixes: 4f2a8f5898ec ("drm: Add ASPEED GFX driver")
> > Reported
contiguous allocator.
I suspect the DRM_PANEL came from a cut/paste error.
Fixes: 4f2a8f5898ec ("drm: Add ASPEED GFX driver")
Reported-by: Stephen Rothwell
Reported-by: kernel test robot
Signed-off-by: Joel Stanley
---
This fixes the powerpc next-20190405 build. Sorry Stephen!
v2: Clean up
When building this driver for architectures where CMA is not available.
Fixes: 4f2a8f5898ec ("drm: Add ASPEED GFX driver")
Reported-by: Stephen Rothwell
Reported-by: kernel test robot
Signed-off-by: Joel Stanley
---
This fixes the build break.
Another question is if we need to sele
On Wed, 3 Apr 2019 at 07:30, Joel Stanley wrote:
>
> On Wed, 3 Apr 2019 at 07:11, Daniel Vetter wrote:
> >
> > On Wed, Apr 03, 2019 at 10:49:09AM +1030, Joel Stanley wrote:
> > > This hardware is found inside ASPEED Baseboard Management Controller
> > > (BM
On Wed, 3 Apr 2019 at 07:11, Daniel Vetter wrote:
>
> On Wed, Apr 03, 2019 at 10:49:09AM +1030, Joel Stanley wrote:
> > This hardware is found inside ASPEED Baseboard Management Controller
> > (BMC) system on chips. It is called the 'SOC Display Controller' or '
phics device that happens to
live in the BMC's silicon, but is otherwise available for use by the
BMC.
Joel Stanley (3):
dt-bindings: gpu: Add ASPEED GFX bindings document
drm: Add ASPEED GFX driver
MAINTAINERS: Add ASPEED BMC GFX DRM driver entry
.../devicetree/bindings/gpu/aspeed-gfx.tx
This driver is for the ASPEED BMC SoC's GFX display hardware. This
driver runs on the ARM based BMC systems, unlike the ast driver which
runs on a host CPU and is is for a PCI graphics device.
Signed-off-by: Joel Stanley
Acked-by: Daniel Vetter
Reviewed-by: Noralf Trønnes
Reviewed-by
This hardware is found inside ASPEED Baseboard Management Controller
(BMC) system on chips. It is called the 'SOC Display Controller' or 'GFX'.
Signed-off-by: Joel Stanley
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINER
This describes the ASPEED BMC SoC's display controller.
Signed-off-by: Joel Stanley
Reviewed-by: Andrew Jeffery
---
v3:
Add Andrew's reviewed-by
.../devicetree/bindings/gpu/aspeed-gfx.txt| 41 +++
1 file changed, 41 insertions(+)
create mode 100644 Doc
On Tue, 2 Apr 2019 at 06:26, Sam Ravnborg wrote:
>
> Hi Joel
>
> > index ..fb56e425bd48
> > --- /dev/null
> > +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > @@ -0,0 +1,104 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +// Copyright 2018 IBM Corporation
> > +
> > +#include
> > +#incl
This driver is for the ASPEED BMC SoC's GFX display hardware. This
driver runs on the ARM based BMC systems, unlike the ast driver which
runs on a host CPU and is is for a PCI graphics device.
Signed-off-by: Joel Stanley
Acked-by: Daniel Vetter
Reviewed-by: Noralf Trønnes
--
v2:
This describes the ASPEED BMC SoC's display controller.
Signed-off-by: Joel Stanley
---
.../devicetree/bindings/gpu/aspeed-gfx.txt| 41 +++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpu/aspeed-gfx.txt
diff --git a/Document
This hardware is found inside ASPEED Baseboard Management Controller
(BMC) system on chips. It is called the 'SOC Display Controller' or 'GFX'.
Signed-off-by: Joel Stanley
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINER
BMC's silicon, but is otherwise available for use by the
BMC.
Joel Stanley (3):
dt-bindings: gpu: Add ASPEED GFX bindings document
drm: Add ASPEED GFX driver
MAINTAINERS: Add ASPEED BMC GFX DRM driver entry
.../devicetree/bindings/gpu/aspeed-gfx.txt| 41 +++
M
On Thu, 28 Mar 2019 at 07:53, Daniel Vetter wrote:
> > +static int aspeed_gfx_get_modes(struct drm_connector *connector)
> > +{
> > + return drm_add_modes_noedid(connector, 800, 600);
>
> Is this the only mode you do, or just a default? Iirc if you report
> "connected", you'll get this as one
This driver is for the ASPEED BMC SoC's GFX display hardware. This
driver runs on the ARM based BMC systems, unlike the ast driver which
runs on a host CPU and is is for a PCI graphics device.
Signed-off-by: Joel Stanley
--
Changes since RFC:
drm_fbdev_cma_init -> drm_fb_cma_fbdev_init
This describes the ASPEED BMC SoC's display controller.
Signed-off-by: Joel Stanley
---
.../devicetree/bindings/gpu/aspeed-gfx.txt| 41 +++
1 file changed, 41 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpu/aspeed-gfx.txt
diff --git a/Document
ubmitted a RFC about a year ago.
https://patchwork.kernel.org/patch/10339605/
I've fixed all of the issues I had in the RFC, and made the cleanups
that Eric suggested in that review. This version is based on
next-20190327.
Joel Stanley (2):
dt-bindings: gpu: Add ASPEED GFX bindings docu
Hi Eric,
Thanks for your reply back in April. I have finally found some time to
get back to this.
On 18 April 2018 at 03:43, Eric Anholt wrote:
> Joel Stanley writes:
>
>> This driver is for the ASPEED BMC SoC's GFX display hardware. This
>> driver runs on the ARM based
On 16 April 2018 at 17:15, Daniel Vetter wrote:
> On Thu, Apr 12, 2018 at 07:54:10AM +0200, Julia Lawall wrote:
>> From: Fengguang Wu
>>
>> Use drm_*_get() and drm_*_put() helpers instead of drm_*_reference() and
>> drm_*_unreference() helpers.
>>
>> Generated by: scripts/coccinelle/api/drm-get
ics CRT"
is the BMC's internal display controller.
This driver only supports a simple configuration consisting of a 40MHz
pixel clock (fixed by hardware limitations) and the VGA output path.
Signed-off-by: Joel Stanley
---
Hello!
This driver is working on hardware, with a few oddities.
On Fri, Feb 24, 2017 at 9:23 AM, Benjamin Herrenschmidt
wrote:
> Signed-off-by: Benjamin Herrenschmidt
Acked-by: Joel Stanley
> ---
> drivers/gpu/drm/ast/ast_main.c | 2 --
> 1 file changed, 2 deletions(-)
___
dri-devel mailing li
On Fri, Feb 24, 2017 at 9:23 AM, Benjamin Herrenschmidt
wrote:
> From: "Y.C. Chen"
>
> The default value of VGA scratch may incorrect.
> Should initial h/w before get vram info.
>
> Signed-off-by: Y.C. Chen
Acked-by: Joel Stanley
> ---
> drivers/gpu/drm/as
return a boolean, some return a u32.
>
> Signed-off-by: Benjamin Herrenschmidt
Acked-by: Joel Stanley
> --
>
> v2. - Keep the split between the "test" and "test2" functions
> as they have a different exit condition in the loop and
> a different r
n Herrenschmidt
Acked-by: Joel Stanley
> ---
> drivers/gpu/drm/ast/ast_post.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
us error by just "trying".
> (change provided by Y.C. Chen)
> v4. [BenH]
> - Only devices with the AST2000 PCI ID have a P2A bridge
> - Update the P2A presence test to account for VGA only
> mode as provided by Y.C. Chen.
> v5. [BenH]
> - F
up for coding style purposes by BenH.
>
> Signed-off-by: Y.C. Chen
> Signed-off-by: Benjamin Herrenschmidt
Acked-by: Joel Stanley
> --
>
> v2. - Fix bug in ddr_test_2500 reported by Emil Velikov
> - Rebase on updated mmc_test factoring patch
> - Fix missing e
On Fri, Feb 24, 2017 at 9:23 AM, Benjamin Herrenschmidt
wrote:
> Some braces were missing causing an incorrect calculation.
>
> Y.C. Chen from Aspeed provided me with the right formula
> which I tested on AST2400 and 2500.
Y. C. Chen, can you point out this calculation in the programming guide?
BMC DRAM POST code which
> is in a separate patch.
>
> Signed-off-by: Y.C. Chen
> Signed-off-by: Benjamin Herrenschmidt
Acked-by: Joel Stanley
> ---
>
> v2. Add 800Mhz default mclk for AST2500
> ---
> drivers/gpu/drm/ast/ast_drv.h| 2 ++
> drivers/gpu/drm/ast
es it.
>
> Signed-off-by: Y.C. Chen
> Signed-off-by: Benjamin Herrenschmidt
Acked-by: Joel Stanley
> ---
> drivers/gpu/drm/ast/ast_post.c | 38 +++---
> 1 file changed, 35 insertions(+), 3 deletions(-)
>
On Fri, Feb 24, 2017 at 9:23 AM, Benjamin Herrenschmidt
wrote:
> From: "Y.C. Chen"
>
> open_key enables access the registers used by enable_mmio
>
> Signed-off-by: Y.C. Chen
> Signed-off-by: Benjamin Herrenschmidt
Acked-by: Joel Stanley
> ---
> drivers/
On Fri, Feb 24, 2017 at 9:23 AM, Benjamin Herrenschmidt
wrote:
> And fix some comment alignment & space/tabs while at it
>
> Signed-off-by: Benjamin Herrenschmidt
Acked-by: Joel Stanley
> ---
> drivers/gpu/drm/ast/ast_drv.h| 4 +-
> drivers/gpu/drm/ast/ast_mode.c
On Fri, Feb 24, 2017 at 1:08 PM, Benjamin Herrenschmidt
wrote:
> On Fri, 2017-02-24 at 12:54 +1030, Joel Stanley wrote:
>> On Fri, Feb 24, 2017 at 9:23 AM, Benjamin Herrenschmidt
>> wrote:
>> > Some braces were missing causing an incorrect calculation.
>> >
>&
On Fri, Feb 24, 2017 at 9:23 AM, Benjamin Herrenschmidt
wrote:
> static int ast_get_dram_info(struct drm_device *dev)
> {
> + struct device_node *np = dev->pdev->dev.of_node;
> struct ast_private *ast = dev->dev_private;
> - uint32_t data, data2;
> - uint32_t denum, nu
his by erroring out if an error is detected. On powerpc systems with
> EEH, this leads to the device being fenced and the system continuing to
> operate.
>
> Cc: # 3.10+
> Signed-off-by: Russell Currey
Reviewed-by: Joel Stanley
Thanks Russel.
Cheers,
Joel
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