From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mt
From: Hsiao Chien Sung
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
For more information, there are three pix
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode in Mixer.
Before this patch, only the coverage mode is supported.
To replace the default setting that is set in mtk_ethdr_config(),
we change mtk_ddp_write_mask() to mtk_ddp_write(), and this change will
also
From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/g
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode on in OVL.
Before this patch, only the "coverage" mode is supported.
As whether OVL_CON_CLRFMT_MAN bit is enabled, (3 << 12)
means different formats in the datasheet. To prevent
misunderstandings
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
Signed-off-by: Hsiao Chien Sung
---
Changes in v4:
- Add mor
From: Hsiao Chien Sung
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
For more information, there are three pix
From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
b/drivers/g
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode in Mixer.
Before this patch, only the coverage mode is supported.
To replace the default setting that is set in mtk_ethdr_config(),
we change mtk_ddp_write_mask() to mtk_ddp_write(), and this change will
also
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode on in OVL.
Before this patch, only the "coverage" mode is supported.
Signed-off-by: Hsiao Chien Sung
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +---
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
Signed-off-by: Hsiao Chien Sung
---
Changes in v3:
- Remove
From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mt
From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mt
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
Signed-off-by: Hsiao Chien Sung
---
Changes in v2:
- Remove unnec
From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Change-Id: I9455c367bb74b75461935ecf4a3eb8e429f6e95e
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/
From: Hsiao Chien Sung
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
For more information, there are three pix
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode in Mixer.
Before this patch, only the coverage mode is supported.
To replace the default setting that is set in mtk_ethdr_config(),
we change mtk_ddp_write_mask() to mtk_ddp_write(), and this change will
also
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode on in OVL.
Before this patch, only the "coverage" mode is supported.
Signed-off-by: Hsiao Chien Sung
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +---
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode on in OVL.
Before this patch, only the "coverage" mode is supported.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +---
1 file changed,
From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
b/
From: Hsiao Chien Sung
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
For more information, there are three pix
From: Hsiao Chien Sung
Support "Pre-multiplied" alpha blending mode in Mixer.
Before this patch, only the coverage mode is supported.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drive
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by
adding correct blend mode property when the planes init.
Before this patch, only the "Coverage" mode (default) is supported.
Signed-off-by: Hsiao Chien Sung
---
Hsiao Chien Sung (5):
dr
From: Hsiao Chien Sung
Support "None" alpha blending mode on MediaTek's chips.
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mt
From: Hsiao Chien Sung
Always add DRM_MODE_ROTATE_0 to rotation property to meet
IGT's (Intel GPU Tools) requirement.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off-by: H
From: Hsiao Chien Sung
CONST_BLD must be enabled for XRGB formats although the alpha channel
can be ignored, or OVL will still read the value from memory.
This error only affects CRC generation.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Reviewed
From: Hsiao Chien Sung
Set DRM mode configs limitation according to the hardware capabilities
and pass the IGT checks as below:
- The test "graphics.IgtKms.kms_plane" requires a frame buffer with
width of 4512 pixels (> 4096).
- The test "graphics.IgtKms.kms_cursor_crc&quo
From: Hsiao Chien Sung
Support RGBA and RGBX formats in OVL on MT8195.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/dr
From: Hsiao Chien Sung
9-bit alpha (max=0x100) is designed for special HDR related
calculation, which should be disabled by default.
Change the alpha value from 0x100 to 0xff in 8-bit form.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
R
From: Hsiao Chien Sung
Define new color formats to hide the bit operation in the MACROs to make
the switch statement more concise.
Change the MACROs to align the naming rule in DRM.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu
From: Hsiao Chien Sung
Add OVL compatible name for MT8195.
Without this commit, DRM won't work after modifying the device tree.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off-
From: Hsiao Chien Sung
Support more 10bit formats in OVL.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +---
1 file changed, 29 insertions(+), 3 deletions(-)
diff
From: Hsiao Chien Sung
Set the plane alpha according to DRM plane property.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_
Signed-off-by: Hsiao Chien Sung
---
Changes in v3:
- Modify the commit message
- Add a patch to fix destination alpha error in OVL
- Link to v2:
https://lore.kernel.org/all/20240619-mediatek-drm-next-v2-0-abf68f46f...@mediatek.com
---
Changes in v2:
- Seperate the changes that belong to another
From: Hsiao Chien Sung
Set the plane alpha according to DRM plane property.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_e
From: Hsiao Chien Sung
The formula of Coverage alpha blending is:
dst.a = dst.a * (0xff - src.a * SCA / 0xff) / 0xff
+ src.a * SCA / 0xff
dst.a: destination alpha
src.a: pixel alpha
SCA : plane alpha
When SCA = 0xff, the formula becomes:
dst.a = dst.a * (0xff - src.a) + src.a
This
From: Hsiao Chien Sung
We found that IGT (Intel GPU Tool) will try to commit layers with
zero width or height and lead to undefined behaviors in hardware.
Disable the layers in such a situation.
Fixes: 453c3364632a ("drm/mediatek: Add ovl_adaptor support for MT8195")
Fixes: d886c000
From: Hsiao Chien Sung
Fix an issue that plane coordinate was not saved when
calling async update.
Fixes: 920fffcc8912 ("drm/mediatek: update cursors by using async atomic
update")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Fixes: 119f5173628a ("drm/mediatek:
From: Hsiao Chien Sung
Although the alpha channel in XRGB formats can be ignored, ALPHA_CON
must be configured accordingly when using XRGB formats or it will still
affects CRC generation.
Fixes: d886c0009bd0 ("drm/mediatek: Add ETHDR support for MT8195")
Reviewed-by: CK Hu
R
From: Hsiao Chien Sung
Set DRM mode configs limitation according to the hardware capabilities
and pass the IGT checks as below:
- The test "graphics.IgtKms.kms_plane" requires a frame buffer with
width of 4512 pixels (> 4096).
- The test "graphics.IgtKms.kms_cursor_crc&quo
This series fixes the errors of MediaTek display driver found by IGT.
Signed-off-by: Hsiao Chien Sung
---
Changes in v2:
- Seperate the changes that belong to another repo (driver/soc/mediatek)
- Move the fix patches to the front of the series
- Link to v1:
https://lore.kernel.org/r/20240616
From: Hsiao Chien Sung
Support more 10bit formats in OVL.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +---
1 file changed, 29 insertions(+), 3 deletions(-)
diff
From: Hsiao Chien Sung
Set the plane alpha according to DRM plane property.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a
From: Hsiao Chien Sung
CONST_BLD must be enabled for XRGB formats although the alpha channel
can be ignored, or OVL will still read the value from memory.
This error only affects CRC generation.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
R
From: Hsiao Chien Sung
Set the plane alpha according to DRM plane property.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers
From: Hsiao Chien Sung
Support RGBA and RGBX formats in OVL on MT8195.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm
From: Hsiao Chien Sung
CONST_BLD must be enabled for XRGB formats although the alpha channel
can be ignored, or OVL will still read the value from memory.
This error only affects CRC generation.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Reviewed
From: Hsiao Chien Sung
Although the alpha channel in XRGB formats can be ignored, ALPHA_CON
must be configured accordingly when using XRGB formats or it will still
affects CRC generation.
Fixes: d886c0009bd0 ("drm/mediatek: Add ETHDR support for MT8195")
Reviewed-by: CK Hu
R
From: Hsiao Chien Sung
When 9-bit alpha is enabled, its value will be converted from 0-255 to
0-256 (255 = not defined). This is designed for special HDR related
calculation, which should be disabled by default, otherwise, alpha
blending will not work correctly.
Fixes: 119f5173628a (&quo
From: Hsiao Chien Sung
Fix an issue that plane coordinate was not saved when
calling async update.
Fixes: 920fffcc8912 ("drm/mediatek: update cursors by using async atomic
update")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
d
From: Hsiao Chien Sung
Define new color formats to hide the bit operation in the MACROs to make
the switch statement more concise.
Change the MACROs to align the naming rule in DRM.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu
From: Hsiao Chien Sung
Always add DRM_MODE_ROTATE_0 to rotation property to meet
IGT's (Intel GPU Tools) requirement.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 6 +-
drivers/gpu/drm/med
From: Hsiao Chien Sung
Add OVL compatible name for MT8195.
Without this commit, DRM won't work after modifying the device tree.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
1 file chang
From: Hsiao Chien Sung
We found that IGT (Intel GPU Tool) will try to commit layers with
zero width or height and lead to undefined behaviors in hardware.
Disable the layers in such a situation.
Fixes: 453c3364632a ("drm/mediatek: Add ovl_adaptor support for MT8195")
Fixes: d886c000
From: Hsiao Chien Sung
Set DRM mode configs limitation according to the hardware capabilities
and pass the IGT checks as below:
- The test "graphics.IgtKms.kms_plane" requires a frame buffer with
width of 4512 pixels (> 4096).
- The test "graphics.IgtKms.kms_cursor_crc&quo
From: Hsiao Chien Sung
Always add DRM_MODE_ROTATE_0 to rotation property to meet
IGT's (Intel GPU Tools) requirement.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 6 +-
drivers/gpu/drm/med
From: Hsiao Chien Sung
Although the alpha channel in XRGB formats can be ignored, ALPHA_CON
must be configured accordingly when using XRGB formats or it will still
affects CRC generation.
Fixes: d886c0009bd0 ("drm/mediatek: Add ETHDR support for MT8195")
Signed-off-by: Hsiao
From: Hsiao Chien Sung
Set the plane alpha according to DRM plane property.
Signed-off-by: Hsiao Chien Sung
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
b
From: Hsiao Chien Sung
CONST_BLD must be enabled for XRGB formats although the alpha channel
can be ignored, or OVL will still read the value from memory.
This error only affects CRC generation.
Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.")
Signed-off
From: Hsiao Chien Sung
When 9-bit alpha is enabled, its value will be converted from 0-255 to
0-256 (255 = not defined). This is designed for special HDR related
calculation, which should be disabled by default, otherwise, alpha
blending will not work correctly.
Reviewed-by: AngeloGioacchino
From: Hsiao Chien Sung
Define new color formats to hide the bit operation in the MACROs to make
the switch statement more concise.
Change the MACROs to align the naming rule in DRM.
Signed-off-by: Hsiao Chien Sung
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 14
This series fixes the errors of MediaTek display driver found by IGT.
Signed-off-by: Hsiao Chien Sung
---
Hsiao Chien Sung (13):
soc: mediatek: Disable 9-bit alpha in ETHDR
drm/mediatek: Add OVL compatible name for MT8195
drm/mediatek: Add missing plane settings when async
From: Hsiao Chien Sung
Fix an issue that plane coordinate was not saved when
calling async update.
Fixes: 920fffcc8912 ("drm/mediatek: update cursors by using async atomic
update")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
d
From: Hsiao Chien Sung
Set the plane alpha according to DRM plane property.
Signed-off-by: Hsiao Chien Sung
Reviewed-by: CK Hu
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c
b/drivers
From: Hsiao Chien Sung
Support more 10bit formats in OVL.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +---
1 file changed, 29 insertions(+), 3 deletions(-)
diff
From: Hsiao Chien Sung
Support RGBA and RGBX formats in OVL on MT8195.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm
From: Hsiao Chien Sung
Add OVL compatible name for MT8195.
Without this commit, DRM won't work after modifying the device tree.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
1 file chang
From: Hsiao Chien Sung
We found that IGT (Intel GPU Tool) will try to commit layers with
zero width or height and lead to undefined behaviors in hardware.
Disable the layers in such a situation.
Fixes: 453c3364632a ("drm/mediatek: Add ovl_adaptor support for MT8195")
Fixes: d886c000
-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 1 +
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 19 +++
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 9 +
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 1 +
drivers/gpu/drm/mediatek/mtk_d
Register CRC related function pointers to support
CRC retrieval.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 239
drivers/gpu/drm/mediatek/mtk_drm_crtc.h | 39
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 3 +
3 files
Add comments for the structures to improve readability.
Signed-off-by: Hsiao Chien Sung
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 21 +-
drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 22 --
drivers/gpu/drm/mediatek
atek: Add ETHDR support for MT8195")
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +-
drivers/gpu/drm/mediatek/mtk_ethdr.c| 7 ++-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adap
ned-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 197 +++-
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 3 +
3 files changed, 193 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/dr
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips.
Before this patch, only the "Coverage" mode is supported.
Please refer to the description of the commit
"drm/mediatek: Support alpha blending in display driver"
for more information.
applied to the frame.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 21 +++
drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 3 +
drivers/gpu/drm/mediatek/mtk_ethdr.c | 62 ++
Support "Pre-multiplied" and "None" blend mode on MediaTek's chips.
Before this patch, only the "Coverage" mode is supported.
Please refer to the description of the commit
"drm/mediatek: Support alpha blending in display driver"
for more information.
ltiplied its alpha, only destination
RGB need to multiply it. This is the "Pre-multiplied" mode in DRM.
For the "None" blend mode in DRM, it means the pixel alpha is ignored
when compositing the layers, only the constant alpha for the composited
layer will take effects.
Sig
ETHDR 9-bit alpha should be disabled by default,
otherwise alpha blending will not work.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mtk-mmsys.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers
e is
defined, and run the test with cursor size from 1x1 to 512x512.
Please notice that the test conditions may change as IGT is updated.
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 25 +
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 3 +
Add OVL compatible name for MT8195.
Without this commit, DRM won't work after modifying the device tree.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++
1 file changed, 2 insertions(+)
diff --
Fix an issue that plane coordinate was not saved when
calling async update.
Fixes: 920fffcc8912 ("drm/mediatek: update cursors by using async atomic
update")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/dr
From: Hsiao Chien Sung
This series is based on 20240207021510.24035-2-shawn.s...@mediatek.com.
This series adds support for running IGT (Intel GPU Tool) tests
with MediaTek display driver. The following changes will be
applied:
1. Add a new API for creating GCE thread loop to retrieve CRCs
From: Hsiao Chien Sung
This series is based on mediatek-drm-next branch of
kernel/git/chunkuang.hu/linux.git.
Changes in v2:
- Refined the filtering formula
- Add the .mode_valid hook to the hardware that causes the limitation
Hsiao Chien Sung (1):
drm/mediatek: Filter modes according to
From: Hsiao Chien Sung
We found a stability issue on MT8188 when connecting an external monitor
in 2560x1440@144Hz mode. Checked with the designer, there is a function
called "prefetch" which is working during VBP (triggered by VSYNC).
If the duration of VBP is too short, the
From: Hsiao Chien Sung
We found that there is a stability issue on MT8188 when connecting an
external monitor in 2560x1440@144Hz mode. Checked with the designer,
there is a function called hardware prefetch that is triggered by VSYNC
and ended before VDE (during VBP). If duration of VBP is too
From: Hsiao Chien Sung
This series is based on mediatek-drm-next branch of
kernel/git/chunkuang.hu/linux.git
Hsiao Chien Sung (1):
drm/mediatek: Filter modes according to hardware capability
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 +
drivers/gpu/drm/mediatek/mtk_disp_ovl.c
By registering component related functions to the pointers,
we can easily manage them within a for-loop and simplify the
logic of clock control significantly.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Signed-off-by: Hsiao Chien Sung
---
include/dt-bindings/reset/mt8188-resets.h | 75 +++
1 file changed, 75 insertions(+)
diff --git a/include/dt
Add MT8188 reset bit map for VDOSYS0 and VDOSYS1.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mt8188-mmsys.h | 84 +
drivers/soc/mediatek/mtk-mmsys.c| 7 ++-
2 files changed, 90 insertions(+), 1 deletion
e the IOMMUs are powered on as well because of the
device link (iommus) in the RDMA nodes in DTS.
This patch separates power and clock management process, it would be
easier to maintain and add extensions.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien
Add MT8188 Padding to OVL adaptor to probe the driver.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 26 +++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm
- Add Padding components
- Add Mutex module definitions for Padding
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mtk-mutex.c | 16
include/linux/soc/mediatek/mtk-mmsys.h | 8
2 files changed, 24 insertions
Add compatible name for MediaTek MT8188 MDP-RDMA.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../bindings/display/mediatek/mediatek,mdp-rdma.yaml| 6 +-
1 file changed, 5 insertions(+), 1 deletion
By registering component related functions to the pointers,
we can easily manage them within a for-loop and simplify the
logic of component start/stop process.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek
Sort OVL adaptor components' names in alphabetical order.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/dr
Add compatible name for MediaTek MT8188 MERGE.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git
a
- Adjust indentation to align with other files
- Sort device table in alphabetical order
- Add sentinel to device table
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 15 ---
1 file
Padding is a new hardware module on MediaTek MT8188,
add dt-bindings for it.
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../display/mediatek/mediatek,padding.yaml| 81 +++
1 file changed
.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/Makefile | 3 +-
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 4 +
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 +
drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2
chino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_merge.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c
b/drivers/gpu/drm/mediatek/mtk_disp_merge.c
index e525a6b9e5b0..22f768d923d5 100644
--- a/
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