Reviewed-by: Clint Taylor
-Clint
On 6/17/19 1:34 AM, Mika Kahola wrote:
We are missing PCI device ID for SKU ICLLP U GT 1.5F (0x8A54) as per BSPec.
BSpec: 19092
Signed-off-by: Mika Kahola
---
intel/i915_pciids.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/intel
On 4/2/19 2:52 PM, Manasi Navare wrote:
Some eDP 1.4 panels cannot use the optimized fast and narrow pipe
config approach, but they need to use th maximum supported lane count
for the link training to succeed.
There is a DRM EDID quirk for such panels that gets set after reading
their correspond
On 4/2/19 2:52 PM, Manasi Navare wrote:
For certain eDP 1.4 panels, we need to use max lane count for the
link training to succeed.
This patch adds a EDID quirk for such eDP panels using
their vendor ID and product ID to force using max lane count in the driver.
Cc: Clint Taylor
Cc: Ville Syr
