1.5.0 for 4800.gpu on minor 1
Note that the clock and the regulator drivers are not upstreamed yet.
They might as well take a different form when upstreamed.
Signed-off-by: Chia-I Wu
---
v2:
- remove CONFIG_DRM_PANTHOR_SOC_MT8196 and panthor_soc*.[ch]
- update commit message
---
drive
- remove CONFIG_DRM_PANTHOR_SOC_MT8196 and panthor_soc*.[ch], as this
initial support is just about ASN hash.
Chia-I Wu (2):
dt-bindings: gpu: mali-valhall-csf: add MediaTek MT8196 compatible
drm/panthor: add custom ASN_HASH support for mt8196
.../bindings/gpu/arm,mali-valhall-csf.yaml
On Fri, Sep 12, 2025 at 11:38 AM Nicolas Frattaroli
wrote:
> +static irqreturn_t mtk_gpueb_mbox_thread(int irq, void *data)
> +{
> + struct mtk_gpueb_mbox_chan *ch = data;
> + int status;
> +
> + status = atomic_cmpxchg(&ch->rx_status,
> + MBOX_FULL
.
Patch 6 to 7 eliminiate redundant mmu_hw_wait_ready. This is the main
functional change of the series. panthor_vm_flush_range no longer waits
for UNLOCK to complete.
Patch 8 to 10 give mmu_hw_flush_caches final touches, to improve error
handling, simplifying code, etc.
Chia-I Wu (10):
drm
Add a simple helper for the UPDATE command.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 33 +++
1 file changed, 23 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
b/drivers/gpu/drm/panthor/panthor_mmu.c
index
No need to call mmu_hw_wait_ready after panthor_gpu_flush_caches or
before returning from mmu_hw_flush_caches.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
b
We can early return from mmu_hw_flush_caches when size is 0.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
b/drivers/gpu/drm/panthor/panthor_mmu.c
index
Rename mmu_hw_do_operation_locked to mmu_hw_flush_caches.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 22 +-
1 file changed, 17 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
b/drivers/gpu/drm/panthor/panthor_mmu.c
Call mmu_hw_wait_ready explicitly instead.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 46 +++
1 file changed, 25 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
b/drivers/gpu/drm/panthor/panthor_mmu.c
index
Simplify flush op to a bool to control whether LSC is
flushed/invalidated. Remove mmu_hw_do_operation helper.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 42 ++-
1 file changed, 9 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm
Rename lock_region to mmu_hw_cmd_lock.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
b/drivers/gpu/drm/panthor/panthor_mmu.c
index d3af4f79012b4
Rename wait_ready to mmu_hw_wait_ready.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
b/drivers/gpu/drm/panthor/panthor_mmu.c
index 6dec4354e3789
Add a simple helper for the UNLOCK command.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
b/drivers/gpu/drm/panthor/panthor_mmu.c
index 8600d98842345
Bail when the first mmu_hw_wait_ready call fails. Be sure to unlock the
region when panthor_gpu_flush_caches fails.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panthor
exactly feasible from
userspace.
Signed-off-by: Chia-I Wu
---
The query is inspired by xe's DRM_XE_DEVICE_QUERY_ENGINE_CYCLES and the
naming is inspired by VK_KHR_calibrated_timestamps. The userspace change
is https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37424.
---
drivers/gpu/drm/pa
On Mon, Sep 15, 2025 at 6:34 AM Nicolas Frattaroli
wrote:
>
> On Saturday, 13 September 2025 00:53:50 Central European Summer Time Chia-I
> Wu wrote:
> > On Fri, Sep 12, 2025 at 11:38 AM Nicolas Frattaroli
> > wrote:
> >
> > > diff --git a/drivers/gpu/dr
On Mon, Sep 15, 2025 at 6:34 AM Nicolas Frattaroli
wrote:
>
> On Saturday, 13 September 2025 00:11:10 Central European Summer Time Chia-I
> Wu wrote:
> > On Fri, Sep 12, 2025 at 11:38 AM Nicolas Frattaroli
> > wrote:
> >
> > > +static irqreturn_t mtk_g
On Mon, Sep 15, 2025 at 10:52 AM Conor Dooley wrote:
>
> On Mon, Sep 15, 2025 at 06:51:16PM +0100, Conor Dooley wrote:
> > Acked-by: Conor Dooley
>
> Hmm, actually there seems to be a more complete binding proposed here:
> https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20250912-mt
On Fri, Sep 12, 2025 at 11:38 AM Nicolas Frattaroli
wrote:
>
> The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to
> control the power and frequency of the GPU.
>
> It lets us omit the OPP tables from the device tree, as those can now be
> enumerated at runtime from the MCU.
>
> A
MediaTek MT8196 has Mali-G925-Immortalis GPU. panthor drm driver gained
support for it recently.
Signed-off-by: Chia-I Wu
---
v2: update commit message
---
Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation
On Fri, Sep 12, 2025 at 11:38 AM Nicolas Frattaroli
wrote:
> diff --git a/drivers/gpu/drm/panthor/panthor_devfreq.h
> b/drivers/gpu/drm/panthor/panthor_devfreq.h
> index
> a891cb5fdc34636444f141e10f5d45828fc35b51..94c9768d5d038c4ba8516929edb565a1f13443fb
> 100644
> --- a/drivers/gpu/drm/pantho
On Fri, Sep 12, 2025 at 3:59 AM Nicolas Frattaroli
wrote:
>
> On Friday, 12 September 2025 06:48:17 Central European Summer Time Chia-I Wu
> wrote:
> > On Fri, Sep 5, 2025 at 3:24 AM Nicolas Frattaroli
> > wrote:
> > >
> > > The MT8196 SoC uses an embedd
On Fri, Sep 5, 2025 at 3:24 AM Nicolas Frattaroli
wrote:
>
> The MT8196 SoC uses an embedded MCU to control frequencies and power of
> the GPU. This controller is referred to as "GPUEB".
>
> It communicates to the application processor, among other ways, through
> a mailbox.
>
> The mailbox expose
On Wed, Sep 3, 2025 at 11:02 PM Boris Brezillon
wrote:
>
> On Wed, 3 Sep 2025 15:55:04 -0700
> Chia-I Wu wrote:
>
> > diff --git a/drivers/gpu/drm/panthor/Makefile
> > b/drivers/gpu/drm/panthor/Makefile
> > index 02db21748c125..75e92c461304b 100644
> > --
On Fri, Sep 5, 2025 at 2:18 AM Florent Tomasin wrote:
>
>
>
> On 05/09/2025 00:06, Chia-I Wu wrote:
> > On Wed, Sep 3, 2025 at 11:02 PM Boris Brezillon
> > wrote:
> >>
> >> On Wed, 3 Sep 2025 15:55:04 -0700
> >> Chia-I Wu wrote:
> >>
On Thu, Sep 4, 2025 at 4:20 AM Nicolas Frattaroli
wrote:
>
> Hi,
>
> On Thursday, 4 September 2025 00:55:02 Central European Summer Time Chia-I Wu
> wrote:
> > MediaTek MT8196 has Mali-G925-Immortalis, for which panthor gained
> > support recently. But the soc also req
On Thu, Sep 4, 2025 at 2:30 AM Krzysztof Kozlowski wrote:
>
> On Wed, Sep 03, 2025 at 03:55:03PM -0700, Chia-I Wu wrote:
> > MediaTek MT8196 has Mali-G925-Immortalis, which can be supported by
> > panthor.
>
> What is panthor? Please describe here hardware or provide so
1.5.0 for 4800.gpu on minor 1
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/Kconfig | 6 +
drivers/gpu/drm/panthor/Makefile | 2 ++
drivers/gpu/drm/panthor/panthor_device.c | 2 ++
drivers/gpu/drm/panthor/panthor_device.h | 4 +++
drivers/gpu/d
MediaTek MT8196 has Mali-G925-Immortalis, which can be supported by
panthor.
Signed-off-by: Chia-I Wu
---
Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
b
nel/-/commit/170d5fc90f817dc90bde54b32872c59cf5c9
Chia-I Wu (2):
dt-bindings: gpu: mali-valhall-csf: add MediaTek MT8196 compatible
drm/panthor: add initial mt8196 support
.../bindings/gpu/arm,mali-valhall-csf.yaml| 1 +
drivers/gpu/drm/panthor/Kconfig | 6 +
driv
On Wed, Sep 3, 2025 at 9:46 AM Boris Brezillon
wrote:
>
> On Thu, 28 Aug 2025 13:01:16 -0700
> Chia-I Wu wrote:
>
> > Fail early from panthor_vm_bind_prepare_op_ctx instead of late from
> > ops->map_pages.
> >
> > Signed-off-by: Chia-I Wu
> > Revie
A panthor group can have at most MAX_CS_PER_CSG panthor queues.
Fixes: 4bdca11507928 ("drm/panthor: Add the driver frontend block")
Signed-off-by: Chia-I Wu
Reviewed-by: Boris Brezillon # v1
Reviewed-by: Steven Price
---
v2:
- move validation up to panthor_ioctl_group_create
- add
On Mon, Sep 1, 2025 at 12:27 AM Boris Brezillon
wrote:
> > diff --git a/drivers/gpu/drm/panthor/panthor_sched.c
> > b/drivers/gpu/drm/panthor/panthor_sched.c
> > index ba5dc3e443d9c..62f17476e5852 100644
> > --- a/drivers/gpu/drm/panthor/panthor_sched.c
> > +++ b/drivers/gpu/drm/panthor/panthor_
A panthor group can have at most MAX_CS_PER_CSG panthor queues.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_sched.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/panthor/panthor_sched.c
b/drivers/gpu/drm/panthor/panthor_sched.c
index ba5dc3e443d9c
can
distinguish them.
Signed-off-by: Chia-I Wu
---
v2:
- include drm_client_id in the name to be truly unique
- remove unnecessary NULL in drm_sched_init_args initialization
- reformat to column width 100
---
drivers/gpu/drm/panthor/panthor_drv.c | 2 +-
drivers/gpu/drm/panthor/panthor_sche
On Fri, Aug 29, 2025 at 1:00 AM Boris Brezillon
wrote:
>
> On Thu, 28 Aug 2025 13:05:32 -0700
> Chia-I Wu wrote:
>
> > Userspace relies on the ring field of gpu_scheduler tracepoints to
> > identify a drm_gpu_scheduler. The value of the ring field is taken from
> >
On Fri, Aug 29, 2025 at 6:41 AM Steven Price wrote:
>
> On 28/08/2025 21:18, Chia-I Wu wrote:
> > Some socs such as mt8196 require custom ASN hash.
>
> I don't know the full details of this, but I'm puzzled by the "require"
> here.
>
> AIUI the &qu
Parse asn-hash and enable custom ASN hash when the property exists.
This is required on some socs such as mt8196.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_device.c | 28
drivers/gpu/drm/panthor/panthor_device.h | 6 +
drivers/gpu/drm/panthor
Some socs such as mt8196 require custom ASN hash.
Chia-I Wu (2):
dt-bindings: gpu: mali-valhall-csf: add asn-hash
drm/panthor: add asn-hash support
.../bindings/gpu/arm,mali-valhall-csf.yaml| 8 ++
drivers/gpu/drm/panthor/panthor_device.c | 28 +++
drivers/gpu
can
distinguish them.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_sched.c | 32 ++---
1 file changed, 23 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_sched.c
b/drivers/gpu/drm/panthor/panthor_sched.c
index ba5dc3e443d9c..26616b6cb1
It is unclear why fence errors were set only for CS_INHERIT_FAULT.
Downstream driver also does not treat CS_INHERIT_FAULT specially.
Remove the check.
Signed-off-by: Chia-I Wu
Reviewed-by: Boris Brezillon
---
v2: add rb from Boris
---
drivers/gpu/drm/panthor/panthor_sched.c | 2 +-
1 file
Fail early from panthor_vm_bind_prepare_op_ctx instead of late from
ops->map_pages.
Signed-off-by: Chia-I Wu
Reviewed-by: Boris Brezillon
---
drivers/gpu/drm/panthor/panthor_mmu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
ux-firmware
I've made minor comments to individual patches. With them addressed,
the series is
Reviewed-by: Chia-I Wu
On Mon, Jul 21, 2025 at 3:53 PM Karunika Choo wrote:
>
> This patch adds firmware binary and GPU model naming support for
> Mali-Gx20 and Mali-Gx25 GPUs.
>
> The GPU_COHERENCY_FEATURES macros are slightly reworked as the
> assumption that FEATURE = BIT(PROTOCOL) no longer holds with the
> introduc
On Mon, Jul 21, 2025 at 3:13 PM Karunika Choo wrote:
>
> Mali-Gx15 introduces a new GPU_FEATURES register that provides
> information about GPU-wide supported features. The register value will
> be passed on to userspace via gpu_info.
>
> Additionally, Mali-Gx15 presents an 'Immortalis' naming var
On Mon, Jul 21, 2025 at 4:33 AM Karunika Choo wrote:
>
> This patch adds GPU model name and FW binary support for Mali-G710,
> Mali-G510, and Mali-G310.
>
> Signed-off-by: Karunika Choo
> ---
> drivers/gpu/drm/panthor/panthor_fw.c | 2 ++
> drivers/gpu/drm/panthor/panthor_hw.c | 6 ++
> 2 fi
On Sat, Jul 19, 2025 at 5:41 PM Daniel Almeida
wrote:
>
> Hi Chia-I Wu :)
>
> > On 19 Jul 2025, at 21:01, Chia-I Wu wrote:
> >
> > This series adds devcoredump support to panthor.
> >
> > This is written from scratch and is not based on the prior work
When the flag is set, bo data is captured for devcoredump.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_coredump.c | 36 ++
drivers/gpu/drm/panthor/panthor_drv.c | 3 +-
drivers/gpu/drm/panthor/panthor_mmu.c | 7 +++--
include/uapi/drm
Fail early from panthor_vm_bind_prepare_op_ctx instead of late from
ops->map_pages.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_mmu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c
b/drivers/gpu/drm/pant
Capture interesting MMU_AS_CONTROL regs for devcoredump.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_coredump.c | 33 ++
drivers/gpu/drm/panthor/panthor_coredump.h | 11
drivers/gpu/drm/panthor/panthor_sched.c| 5
drivers/gpu/drm/panthor
Capture interesting panthor_vma fields for devcoredump.
Because bo->label can change at anytime, we cap it to 32 chars to
simplify size estimation.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_coredump.c | 78 --
drivers/gpu/drm/panthor/panthor_coredum
Capture interesting panthor_fw_csg_iface fields for devcoredump.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_coredump.c | 58 ++
drivers/gpu/drm/panthor/panthor_coredump.h | 23 +
drivers/gpu/drm/panthor/panthor_sched.c| 13 +
3 files changed
Capture interesting panthor_fw_cs_iface, panthor_fw_ringbuf_input_iface,
and panthor_fw_ringbuf_output_iface fields for devcoredump.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_coredump.c | 79 ++
drivers/gpu/drm/panthor/panthor_coredump.h | 32
Capture interesting panthor_fw_global_iface fields for devcoredump.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_coredump.c | 33 ++
drivers/gpu/drm/panthor/panthor_coredump.h | 13 +
2 files changed, 46 insertions(+)
diff --git a/drivers/gpu/drm
Capture interesting GPU_CONTROL regs for devcoredump.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_coredump.c | 85 ++
drivers/gpu/drm/panthor/panthor_coredump.h | 16
drivers/gpu/drm/panthor/panthor_regs.h | 6 ++
drivers/gpu/drm/panthor
Create a devcoredump on any faulty or fatal event. The coredump data is
in YAML format for readability and flexibility.
Only panthor_group state is captured for now.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/Makefile | 2 +
drivers/gpu/drm/panthor/panthor_coredump.c
/20240821143826.3720-1-daniel.alme...@collabora.com/
Chia-I Wu (9):
drm/panthor: add devcoredump support
drm/panthor: capture GPU state for devcoredump
drm/panthor: capture GLB state for devcoredump
drm/panthor: capture CSG state for devcoredump
drm/panthor: capture CS state for devcoredump
It is useful to know which tasks cause gpu errors.
Signed-off-by: Chia-I Wu
Reviewed-by: Steven Price
---
drivers/gpu/drm/panthor/panthor_sched.c | 24 +++-
1 file changed, 19 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_sched.c
b/drivers/gpu
It allows us to get rid of manual try_module_get / module_put.
Signed-off-by: Chia-I Wu
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panthor/panthor_drv.c | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/panthor
interested in the task that created the group.
Chia-I Wu (3):
panthor: set owner field for driver fops
panthor: save task pid and comm in panthor_group
panthor: dump task pid and comm on gpu errors
drivers/gpu/drm/panthor/panthor_drv.c | 14 ++--
drivers/gpu/drm/panthor/panthor_sched.c | 43
Can anyone help review this? It is a trivial build fix.
On Tue, Jun 10, 2025 at 4:58 PM Chia-I Wu wrote:
>
> Fix
>
> aarch64-linux-gnu-ld: drivers/gpu/drm/bridge/ite-it6505.o: in function
> `it6505_i2c_probe':
> ite-it6505.c:(.text+0x754): undefined reference to
Hi,
On Mon, Jun 23, 2025 at 2:07 AM Liviu Dudau wrote:
>
> On Mon, Jun 23, 2025 at 08:21:22AM +0200, Boris Brezillon wrote:
> > On Fri, 20 Jun 2025 16:50:51 -0700
> > Chia-I Wu wrote:
> >
> > > We would like to access panthor_file from panthor_group on gpu err
It is useful to know which tasks cause gpu errors.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_sched.c | 24 +++-
1 file changed, 19 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_sched.c
b/drivers/gpu/drm/panthor
It allows us to get rid of manual try_module_get / module_put.
Signed-off-by: Chia-I Wu
Reviewed-by: Boris Brezillon
Reviewed-by: Steven Price
---
drivers/gpu/drm/panthor/panthor_drv.c | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/panthor
group.
Chia-I Wu (3):
panthor: set owner field for driver fops
panthor: save task pid and comm in panthor_group
panthor: dump task pid and comm on gpu errors
drivers/gpu/drm/panthor/panthor_drv.c | 14 ++--
drivers/gpu/drm/panthor/panthor_sched.c | 43 ++---
2
We would like to report them on gpu errors.
We choose to save the info on panthor_group_create rather than on
panthor_open because, when the two differ, we are more interested in the
task that created the group.
Signed-off-by: Chia-I Wu
---
v2: save to panthor_group on panthor_group_create
On Sun, Jun 22, 2025 at 11:32 PM Boris Brezillon
wrote:
>
> On Wed, 18 Jun 2025 07:55:49 -0700
> Chia-I Wu wrote:
>
> > It is unclear why fence errors were set only for CS_INHERIT_FAULT.
> > Downstream driver also does not treat CS_INHERIT_FAULT specially.
> > Re
It allows us to get rid of manual try_module_get / module_put.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_drv.c | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_drv.c
b/drivers/gpu/drm/panthor/panthor_drv.c
It is useful to know which tasks cause gpu errors.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_sched.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_sched.c
b/drivers/gpu/drm/panthor
We would like to report them on gpu errors.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_device.h | 6 ++
drivers/gpu/drm/panthor/panthor_drv.c| 9 +
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/panthor/panthor_device.h
b/drivers/gpu/drm
We would like to access panthor_file from panthor_group on gpu errors.
Because panthour_group can outlive drm_file, add refcount to
panthor_file to ensure its lifetime.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_device.h | 16
drivers/gpu/drm/panthor
This series saves task pid and comm in panthor_file, ensures panthor_group can
access panthor_file, and prints task pid and comm on gpu errors.
Chia-I Wu (4):
panthor: set owner field for driver fops
panthor: save panthor_file in panthor_group
panthor: save task pid and comm in panthor_file
It is unclear why fence errors were set only for CS_INHERIT_FAULT.
Downstream driver also does not treat CS_INHERIT_FAULT specially.
Remove the check.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_sched.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
Fix
aarch64-linux-gnu-ld: drivers/gpu/drm/bridge/ite-it6505.o: in function
`it6505_i2c_probe':
ite-it6505.c:(.text+0x754): undefined reference to `__devm_regmap_init_i2c'
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/bridge/Kconfig | 1 +
1 file changed, 1 insertion(+)
di
On Mon, Jun 2, 2025 at 7:34 AM Karunika Choo wrote:
>
> Mali-Gx20 and Mali-Gx25 deprecates the use of FLUSH_MEM and FLUSH_PT
> MMU_AS commands in favour of cache maintenance via
> GPU_COMMAND's FLUSH_CACHES and FLUSH_PA_RANGE.
>
> They also introduce the following registers:
> - GPU_COMMAND_ARG0~1
On Mon, Jun 2, 2025 at 7:42 AM Karunika Choo wrote:
>
> As the FLUSH_MEM and FLUSH_PT commands are deprecated in GPUs from
> Mali-Gx20 onwards, this patch adds support for performing cache
> maintenance via the FLUSH_CACHES command in GPU_CONTROL, in place of
> FLUSH_MEM and FLUSH_PT based on PANT
On Mon, Jun 2, 2025 at 8:16 AM Karunika Choo wrote:
>
> This patch replaces the panthor_model structure with a simple switch
> case based on the product_id which is in the format of:
> ((arch_major << 24) | product_major)
>
> This simplifies comparison and allows extending of the function
On Mon, Jun 2, 2025 at 7:33 AM Karunika Choo wrote:
>
> This patch provides an initialization framework for multiple Mali GPUs
> by introducing a GPU support look-up table. Each entry contains, at
> minimum, the architecture major version of the GPU, and may optionally
> provide feature flags and
On Tue, Nov 12, 2024 at 4:00 AM Christian König
wrote:
>
> Am 09.11.24 um 01:32 schrieb Chia-I Wu:
> > On Fri, Nov 8, 2024 at 1:43 AM Christian König
> > wrote:
> >> Hi guys,
> >>
> >> as pointed out by Chia-I userspace doesn't see any progress
On Fri, Nov 8, 2024 at 1:43 AM Christian König
wrote:
>
> Hi guys,
>
> as pointed out by Chia-I userspace doesn't see any progress when
> signaling is not enabled and Boris noted that this is because
> dma_fence_array_signaled() never returns true in this case.
>
> Improve this by fixing the dma_f
On Mon, Nov 4, 2024 at 11:32 PM Christian König
wrote:
>
> Am 04.11.24 um 22:32 schrieb Chia-I Wu:
>
> On Tue, Oct 22, 2024 at 10:24 AM Chia-I Wu wrote:
>
> On Tue, Oct 22, 2024 at 9:53 AM Christian König
> wrote:
>
> Am 22.10.24 um 18:18 schrieb Chia-I Wu:
>
&g
On Tue, Oct 22, 2024 at 10:24 AM Chia-I Wu wrote:
>
> On Tue, Oct 22, 2024 at 9:53 AM Christian König
> wrote:
> >
> > Am 22.10.24 um 18:18 schrieb Chia-I Wu:
> > > Userspace might poll a syncobj with the query ioctl. Call
> > > dma_fence_enable_sw_si
On Tue, Oct 22, 2024 at 9:53 AM Christian König
wrote:
>
> Am 22.10.24 um 18:18 schrieb Chia-I Wu:
> > Userspace might poll a syncobj with the query ioctl. Call
> > dma_fence_enable_sw_signaling to ensure dma_fence_is_signaled returns
> > true in finite time.
>
> Wa
On Tue, Oct 22, 2024 at 3:30 AM Boris Brezillon
wrote:
>
> On Thu, 17 Oct 2024 09:20:53 -0700
> Chia-I Wu wrote:
>
> > Userspace might poll a syncobj with the query ioctl. Call
> > dma_fence_enable_sw_signaling to ensure dma_fence_is_signaled returns
Userspace might poll a syncobj with the query ioctl. Call
dma_fence_enable_sw_signaling to ensure dma_fence_is_signaled returns
true in finite time.
Fixes: 27b575a9aa2f ("drm/syncobj: add timeline payload query ioctl v6")
Signed-off-by: Chia-I Wu
---
v2: add Signed-off-by and
Userspace might poll a syncobj with the query ioctl. Call
dma_fence_enable_sw_signaling to ensure dma_fence_is_signaled returns
true in finite time.
---
panvk hits this issue when timeline semaphore is enabled. It uses the
transfer ioctl to propagate fences. dma_fence_unwrap_merge converts the
On Tue, Jun 4, 2024 at 8:41 AM Greg Kroah-Hartman
wrote:
>
> On Thu, May 30, 2024 at 10:36:57PM -0700, Chia-I Wu wrote:
> > We can skip children resources when the parent resource does not cover
> > the range.
> >
> > This should help vmf_insert_* users on x86, such
On Mon, Jun 3, 2024 at 12:24 AM Ilpo Järvinen
wrote:
>
> On Sun, 2 Jun 2024, Andy Shevchenko wrote:
>
> > On Fri, May 31, 2024 at 02:31:45PM -0700, Chia-I Wu wrote:
> > > On Fri, May 31, 2024 at 1:57 AM Andy Shevchenko <
> > > andriy.shevche...@linux.intel.com&
On Fri, May 31, 2024 at 1:57 AM Andy Shevchenko <
andriy.shevche...@linux.intel.com> wrote:
> On Thu, May 30, 2024 at 10:36:57PM -0700, Chia-I Wu wrote:
> > We can skip children resources when the parent resource does not cover
> > the range.
> >
> > This shou
%--__do_fault
26.57%--amdgpu_gem_fault
25.83%--ttm_bo_vm_fault_reserved
24.40%--vmf_insert_pfn_prot
14.30%--track_pfn_insert
12.20%--lookup_memtype
9.34%--pat_pagerange_is_ram
8.22%--walk_system_ram_range
5.09%--find_next_iomem_res
after.
Signed-off-by: Chia-I Wu
---
kernel/resource.c | 8
On Thu, Aug 31, 2023 at 7:01 AM Greg KH wrote:
>
> On Thu, Aug 31, 2023 at 03:26:28PM +0200, Christian König wrote:
> > Am 31.08.23 um 12:56 schrieb Greg KH:
> > > On Thu, Aug 31, 2023 at 12:27:27PM +0200, Christian König wrote:
> > > > Am 30.08.23 um 20:53 sc
On Sun, Jul 23, 2023 at 6:24 PM Sasha Levin wrote:
>
> From: Lang Yu
>
> [ Upstream commit 187916e6ed9d0c3b3abc27429f7a5f8c936bd1f0 ]
>
> When using cpu to update page tables, vm update fences are unused.
> Install stub fence into these fence pointers instead of NULL
> to avoid NULL dereference w
On Fri, Jun 2, 2023 at 11:50 AM Alex Deucher wrote:
>
> Nevermind, missing your Signed-off-by. Please add and I'll apply.
Sorry that I keep forgetting... This patch is
Signed-off-by: Chia-I Wu
I can send v2 if necessary.
>
> Alex
>
y use the VM map parameters")
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 22f9a65ca0fc7..76d
According to Alex, most APUs from that time seem to have the same issue
(vbios says 48Mhz, actual is 100Mhz). I only have a CHIP_STONEY so I
limit the fixup to CHIP_STONEY
---
drivers/gpu/drm/amd/amdgpu/vi.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/g
offset_in_bo+map_size overflows.
Userspace (radeonsi and radv) seems fine as well.
v2: keep the validations in amdgpu_vm_bo_map
Fixes: 9f7eb5367d00 ("drm/amdgpu: actually use the VM map parameters")
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 15 +++
d
On Mon, May 22, 2023 at 12:12 PM Christian König
wrote:
>
> Am 21.05.23 um 20:49 schrieb Chia-I Wu:
> > On Thu, May 18, 2023 at 1:12 PM Alex Deucher wrote:
> >> On Wed, May 17, 2023 at 5:27 PM Chia-I Wu wrote:
> >>> On Tue, May 9, 2023 at 11:33 AM Chia-I Wu wro
On Thu, May 18, 2023 at 1:12 PM Alex Deucher wrote:
>
> On Wed, May 17, 2023 at 5:27 PM Chia-I Wu wrote:
> >
> > On Tue, May 9, 2023 at 11:33 AM Chia-I Wu wrote:
> > >
> > > Extend the address and size validations to AMDGPU_VA_OP_UNMAP and
> > > AM
On Tue, May 9, 2023 at 11:33 AM Chia-I Wu wrote:
>
> Extend the address and size validations to AMDGPU_VA_OP_UNMAP and
> AMDGPU_VA_OP_CLEAR by moving the validations to amdgpu_gem_va_ioctl.
>
> Internal users of amdgpu_vm_bo_map are no longer validated but they
> should be f
The existing validations are incorrect and insufficient. This is
motivated by OOB access in amdgpu_vm_update_range when
offset_in_bo+map_size overflows.
Fixes: 9f7eb5367d00 ("drm/amdgpu: actually use the VM map parameters")
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 7 +--
drivers/gpu/drm
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