whether to increase/reduce
payloads.
v2:
* add DP_UNKNOWN_ENCODING handling
Signed-off-by: Fangzhi Zuo
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 14 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 292 ++
.../gpu/drm/amd/display/dc/core
whether to increase/reduce
payloads.
Signed-off-by: Fangzhi Zuo
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 14 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 280 ++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++
drivers/gpu/drm
temporary workaround and should be removed when
we are moving out the non atomic driver helpers)
v4:
*fixed typo and formatting
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
Reviewed-by: Lyude Paul
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
drivers/gpu/drm
[Why]
Add DP2 MST and debugfs support
[How]
Update the slot info based on the link encoding format
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 +++
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3
From: Fangzhi Zuo
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 14 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 280 ++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 7 +
drivers/
temporary workaround and should be removed when
we are moving out the non atomic driver helpers)
v4:
*fixed typo and formatting
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
Reviewed-by: Lyude Paul
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
drivers/gpu/drm
This code path is used during commit, and we dont expect things to fail
during the commit stage, so remove this.
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Lyude Paul
---
drivers/gpu/drm/drm_dp_mst_topology.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers
From: Fangzhi Zuo
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 14 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 280 ++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 7 +
drivers/
This code path is used during commit, and we dont expect things to fail
during the commit stage, so remove this.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/drm_dp_mst_topology.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm
[Why]
Add DP2 MST and debugfs support
[How]
Update the slot info based on the link encoding format
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 +++
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3
temporary workaround and should be removed when
we are moving out the non atomic driver helpers)
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
drivers/gpu/drm/drm_dp_mst_topology.c | 34 ---
drivers/gpu
From: Fangzhi Zuo
Signed-off-by: Fangzhi Zuo
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 14 +
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 280 ++
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++
drivers/gpu/drm/amd/display/dc/dc_link.h | 7 +
drivers/
[Why]
Add DP2 MST and debugfs support
[How]
Update the slot info based on the link encoding format
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 29 +++
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3
This code path is used during commit, and we dont expect things to fail
during the commit stage, so remove this.
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/drm_dp_mst_topology.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/gpu/drm
temporary workaround and should be removed when
we are moving out the non atomic driver helpers)
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Fangzhi Zuo
---
.../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
drivers/gpu/drm/drm_dp_mst_topology.c | 34 ---
drivers/gpu
Bhawan
On 2021-10-15 4:41 p.m., Lyude Paul wrote:
[more snip]
On Fri, 2021-10-15 at 15:43 -0400, Bhawanpreet Lakha wrote:
Thanks for the response,
That function is per port so not sure how that will work. Also we only
need to check this inside drm_dp_mst_atomic_check_vcpi_alloc_limit(),
which
On 2021-10-13 6:25 p.m., Lyude Paul wrote:
Some comments below (also, sorry again for the mixup on the last review!)
On Tue, 2021-10-12 at 17:58 -0400, Bhawanpreet Lakha wrote:
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts
Adding Mikita aswell
On 2021-10-14 4:21 p.m., Bhawanpreet Lakha wrote:
On 2021-10-13 6:25 p.m., Lyude Paul wrote:
Some comments below (also, sorry again for the mixup on the last
review!)
On Tue, 2021-10-12 at 17:58 -0400, Bhawanpreet Lakha wrote:
8b/10b encoding format requires to reserve
On 2021-10-13 6:25 p.m., Lyude Paul wrote:
Some comments below (also, sorry again for the mixup on the last review!)
On Tue, 2021-10-12 at 17:58 -0400, Bhawanpreet Lakha wrote:
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts
On 2021-10-13 12:09 p.m., Jani Nikula wrote:
On Tue, 12 Oct 2021, Bhawanpreet Lakha wrote:
8b/10b encoding format requires to reserve the first slot for
recording metadata. Real data transmission starts from the second slot,
with a total of available 63 slots available.
In 128b/132b
starts from
the first slot, with a total of 64 slots available.
v2:
* Remove get_mst_link_encoding_cap
* Move total/start slots to mst_state, and copy it to mst_mgr in
atomic_check
Signed-off-by: Fangzhi Zuo
Signed-off-by: Bhawanpreet Lakha
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 28
[Why]
In certain cases the crtc can be NULL and returning -EINVAL causes
atomic check to fail when it shouln't. This leads to valid
configurations failing because atomic check fails.
[How]
Don't early return if crtc is null
Signed-off-by: Bhawanpreet Lakha
---
drive
[Why]
we need to load SRM before we start HDCP. Because for S3 case the sysfs call
will be
after we have already enabled HDCP, so we might not be using the latest SRM
[How]
Set srm before starting HDCP.
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd
g the
interface provided by PSP
[How]
Add the interface to the header file, so the driver can use them
v2: update commit description
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Rodrigo Siqueira
---
.../drm/amd/display/modules/hdcp/hdcp_psp.h | 26 ++-
1 file changed, 25 inser
faces
Bhawanpreet Lakha (6):
drm/amd/display: Pass amdgpu_device instead of psp_context
drm/amd/display: update psp interface header
drm/amd/display: Add sysfs interface for set/get srm
drm/amd/display: Load srm before enabling HDCP
drm/amd/display: call psp set/get interfaces
drm/amd/di
This is just a reference for the patches. not to be merged
Signed-off-by: Bhawanpreet Lakha
---
REFERENCE | 49 +
1 file changed, 49 insertions(+)
create mode 100644 REFERENCE
diff --git a/REFERENCE b/REFERENCE
new file mode 100644
index
Call the cmd ids for set/get srm according to the sysfs call
v2: Use define for the magic number
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Rodrigo Siqueira
---
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c| 50 ++-
1 file changed, 49 insertions(+), 1 deletion(-)
diff
nt about sysfs file handling in the code
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Rodrigo Siqueira
---
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c| 179 +-
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.h| 6 +
2 files changed, 183 insertions(+), 2 deletions(-)
diff --gi
[Why]
We need this to create sysfs (followup patch)
[How]
Change the parameter
Signed-off-by: Bhawanpreet Lakha
Reviewed-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 4 ++--
drivers/gpu/drm/amd
Reviewed-by: Bhawanpreet Lakha
On 2019-11-25 1:14 p.m., Harry Wentland wrote:
+Bhawan who has been looking at this from our side.
Harry
On 2019-11-23 12:50 a.m., Thomas Anderson wrote:
The new modes are needed for exotic displays such as 8K. Verified that
modes like 8K60 and 4K120 are
Everything looks good. but one concern I have is that shouldn't the
aspect ratio be 16:9 for some of them (See below). Unless I missed
something?
VIC 109 1280x720=*16:9*
VIC 110 1680x720=*7:3*
VIC 112 1920x1080=*16:9*
VIC 116 3840x2160=*16:9*
VIC
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