Re: [PATCH v3 14/17] drm/bridge: cdns-dsi: Use video mode and clean up cdns_dsi_mode2cfg()

mode *adjusted_mode = &crtc_state->adjusted_mode; > struct cdns_dsi_cfg *dsi_cfg = &dsi_state->dsi_cfg; > + struct videomode vm; > > /* cdns-dsi requires negative syncs */ > adjusted_mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); > adjusted_mode->flags |= DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC; > > - return cdns_dsi_check_conf(dsi, adjusted_mode, dsi_cfg); > + drm_display_mode_to_videomode(adjusted_mode, &vm); > + > + return cdns_dsi_check_conf(dsi, &vm, dsi_cfg); > } > > static struct drm_bridge_state * > With the above taken care of, Reviewed-by: Aradhya Bhatia -- Regards Aradhya

Re: [PATCH v3 16/17] drm/bridge: cdns-dsi: Tune adjusted_mode->clock according to dsi needs

Hi Tomi, On 14/04/25 16:41, Tomi Valkeinen wrote: > The driver currently expects the pixel clock and the HS clock to be > compatible, but the DPHY PLL doesn't give very finely grained rates. > This often leads to the situation where the pipeline just fails, as the > resulting HS clock is just too

Re: [PATCH v3 13/17] drm/bridge: cdns-dsi: Fix REG_WAKEUP_TIME value

Hi Tomi, On 14/04/25 16:41, Tomi Valkeinen wrote: > The driver tries to calculate the value for REG_WAKEUP_TIME. However, > the calculation itself is not correct, and to add on it, the resulting > value is almost always larger than the field's size, so the actual > result is more or less random.>

Re: [PATCH v3 04/17] phy: cdns-dphy: Store hs_clk_rate and return it

Tomi Valkeinen > --- > drivers/phy/cadence/cdns-dphy.c | 5 + > 1 file changed, 5 insertions(+) > Reviewed-by: Aradhya Bhatia -- Regards Aradhya

Re: [PATCH v3 12/17] drm/bridge: cdns-dsi: Adjust mode to negative syncs

ic_check to set the sync flags to negative > ones. > > Signed-off-by: Tomi Valkeinen > --- > drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) > Reviewed-by: Aradhya Bhatia -- Regards Aradhya

Re: [PATCH v3 10/17] drm/bridge: cdns-dsi: Update htotal in cdns_dsi_mode2cfg()

ulate it, let's move > it there. Especially as the following patch will remove > cdns_dsi_adjust_phy_config(). > > Signed-off-by: Tomi Valkeinen > --- > drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 14 -- > 1 file changed, 8 insertions(+), 6 deletions(-)

Re: [PATCH v3 09/17] drm/bridge: cdns-dsi: Drop checks that shouldn't be in .mode_valid()

rivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 7 +-- > 1 file changed, 1 insertion(+), 6 deletions(-) > Reviewed-by: Aradhya Bhatia -- Regards Aradhya

Re: [PATCH v3 06/17] drm/bridge: cdns-dsi: Remove extra line at the end of the file

Hi, On 14/04/25 16:41, Tomi Valkeinen wrote: > Remove extra line at the end of the file. > > Signed-off-by: Tomi Valkeinen > --- > drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 1 - > 1 file changed, 1 deletion(-) Reviewed-by: Aradhya Bhatia -- Regards Aradhya

Re: [PATCH v3 02/17] drm/tidss: Use the crtc_* timings when programming the HW

> > Signed-off-by: Tomi Valkeinen > --- > drivers/gpu/drm/tidss/tidss_crtc.c | 2 +- > drivers/gpu/drm/tidss/tidss_dispc.c | 16 > 2 files changed, 9 insertions(+), 9 deletions(-) Reviewed-by: Aradhya Bhatia -- Regards Aradhya

Re: [PATCH v2 05/18] phy: cdns-dphy: Remove leftover code

si_get_dphy_pll_cfg(dphy, cfg, > - opts, &dsi_hfp_ext); > + ret = cdns_get_dphy_pll_cfg(dphy, cfg, opts); > if (ret) > return ret; > > Apart from the small comment above, Reviewed-by: Aradhya Bhatia -- Regards Aradhya

[PATCH] drm/bridge: cdns-dsi: Fix the _atomic_check()

rtc_* mode values are not expected to be populated yet. Fixes: a53d987756ea ("drm/bridge: cdns-dsi: Move DSI mode check to _atomic_check()") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --g

Re: [PATCH v2 01/18] drm/tidss: Fix missing includes and struct decls

| 3 +++ > drivers/gpu/drm/tidss/tidss_drv.h | 2 ++ > drivers/gpu/drm/tidss/tidss_plane.h | 2 ++ > drivers/gpu/drm/tidss/tidss_scale_coefs.h | 2 ++ > 4 files changed, 9 insertions(+) > Reviewed-by: Aradhya Bhatia -- Regards Aradhya

Re: [PATCH v2 12/18] drm/bridge: cdns-dsi: Drop checks that shouldn't be in .mode_valid()

Hi Tomi, On 08/04/25 12:39, Tomi Valkeinen wrote: > Hi, > > On 08/04/2025 09:09, Tomi Valkeinen wrote: >> Hi, >> >> On 07/04/2025 20:59, Aradhya Bhatia wrote: >>> Hi Tomi, >>> >>> On 02/04/25 19:00, Tomi Valkeinen wrote: >>>> The

Re: [PATCH v2 12/18] drm/bridge: cdns-dsi: Drop checks that shouldn't be in .mode_valid()

Hi Tomi, On 02/04/25 19:00, Tomi Valkeinen wrote: > The docs say about mode_valid(): > > "it is not allowed to look at anything else but the passed-in mode, and > validate it against configuration-invariant hardware constraints" > > We're doing a lot more than just looking at the mode. The main

Re: [PATCH v2 08/18] drm/bridge: cdns-dsi: Clean up cdns_dsi_mode2cfg()

rivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 48 > -- > 1 file changed, 22 insertions(+), 26 deletions(-) Reviewed-by: Aradhya Bhatia -- Regards Aradhya

Re: [PATCH v2 03/18] drm/tidss: Adjust the pclk based on the HW capabilities

f-by: Tomi Valkeinen > --- > drivers/gpu/drm/tidss/tidss_crtc.c | 23 +++ > drivers/gpu/drm/tidss/tidss_dispc.c | 6 ++ > drivers/gpu/drm/tidss/tidss_dispc.h | 2 ++ > 3 files changed, 27 insertions(+), 4 deletions(-) > Reviewed-by: Aradhya Bhatia -- Regards Aradhya

Re: [PATCH v2 07/18] drm/bridge: cdns-dsi: Fail if HS rate changed when validating PHY config

lkeinen > --- > drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 11 +++ > 1 file changed, 11 insertions(+) > Reviewed-by: Aradhya Bhatia -- Regards Aradhya

[PATCH v12 5/5] drm/bridge: cdns-dsi: Use pre_enable/post_disable to enable/disable

From: Aradhya Bhatia The cdns-dsi controller requires that it be turned on completely before the input DPI's source has begun streaming[0]. Not having that, allows for a small window before cdns-dsi enable and after cdns-dsi disable where the previous entity (in this case tidss's vid

[PATCH v12 4/5] drm/bridge: Update the bridge enable/disable doc

crtc_disable bridge[1]_post_disable ... bridge[n]_post_disable Signed-off-by: Aradhya Bhatia --- include/drm/drm_bridge.h | 249 --- 1 file changed, 183 insertions(+), 66 deletions(-) diff --git a/include/drm/drm_bridge.h b/include/drm

[PATCH v12 1/5] drm/atomic-helper: Refactor crtc & encoder-bridge op loops into separate functions

From: Aradhya Bhatia The way any singular display pipeline, in need of a modeset, gets enabled is as follows - crtc enable (all) bridge pre-enable encoder enable (all) bridge enable - and the disable sequence is exactly the reverse of this. The crtc operations

[PATCH v12 3/5] drm/atomic-helper: Re-order bridge chain pre-enable and post-disable

peline are pre_enabled. Fix that by re-ordering the sequence of bridge pre_enable and bridge post_disable. Acked-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Tested-by: Tomi Valkeinen Tested-by: Alexander Sverdlin Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- drive

[PATCH v12 0/5] drm/atomic-helper: Re-order CRTC and Bridge ops

741957-1-aradhya.bha...@linux.dev/ v9: https://lore.kernel.org/all/20250209121032.32655-1-aradhya.bha...@linux.dev/ v10: https://lore.kernel.org/all/20250226155228.564289-1-aradhya.bha...@linux.dev/ v11: https://lore.kernel.org/all/20250329113925.68204-1-aradhya.bha...@linux.dev/ --- Aradhya Bhatia (5):

[PATCH v12 2/5] drm/atomic-helper: Separate out bridge pre_enable/post_disable from enable/disable

: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_helper.c | 91 - 1 file changed, 88 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index d185486071c5..86824f769623 100644 --- a/drivers/gpu/drm

Re: [PATCH v6 0/4] drm/tidss: Add OLDI bridge support

Hi Francesco, On 28/03/25 18:14, Francesco Dolcini wrote: > Hello Aradhya, > > On Wed, Feb 26, 2025 at 11:42:56PM +0530, Aradhya Bhatia wrote: >> The AM62Px SoC has 2 OLDI TXes like AM62x SoC. However, the AM62Px SoC also >> has >> 2 separate DSSes. The 2 OLDI TXes ca

[PATCH v11 01/14] drm/bridge: cdns-dsi: Fix connecting to next bridge

From: Aradhya Bhatia Fix the OF node pointer passed to the of_drm_find_bridge() call to find the next bridge in the display chain. The code to find the next panel (and create its panel-bridge) works fine, but to find the next (non-panel) bridge does not. To find the next bridge in the pipeline

[PATCH v7 3/4] drm/tidss: Mark AM65x OLDI code separately

bridge driver will be introduced. Mark the existing OLDI code separately by renaming all the current OLDI identifiers with the 'AM65X_' prefix in tidss driver, to help distinguish from the upcoming OLDI bridge driver. Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia --- drive

[PATCH v11 13/14] drm/bridge: Update the bridge enable/disable doc

crtc_disable bridge[1]_post_disable ... bridge[n]_post_disable Signed-off-by: Aradhya Bhatia --- include/drm/drm_bridge.h | 216 +++ 1 file changed, 150 insertions(+), 66 deletions(-) diff --git a/include/drm/drm_bridge.h b/include/drm

[PATCH v11 09/14] drm/bridge: cdns-dsi: Move DSI mode check to _atomic_check()

From: Aradhya Bhatia At present, the DSI mode configuration check happens during the _atomic_enable() phase, which is not really the best place for this. Moreover, if the mode is not valid, the driver gives a warning and continues the hardware configuration. Move the DSI mode configuration

[PATCH v11 10/14] drm/atomic-helper: Refactor crtc & encoder-bridge op loops into separate functions

From: Aradhya Bhatia The way any singular display pipeline, in need of a modeset, gets enabled is as follows - crtc enable (all) bridge pre-enable encoder enable (all) bridge enable - and the disable sequence is exactly the reverse of this. The crtc operations

[PATCH v7 4/4] drm/tidss: Add OLDI bridge support

From: Aradhya Bhatia The AM62x and AM62Px SoCs feature 2 OLDI TXes each, which makes it possible to connect them in dual-link or cloned single-link OLDI display modes. The current OLDI support in tidss_dispc.c can only support for a single OLDI TX, connected to a VP and doesn't really su

Re: [PATCH v4 0/3] drm/tidss: Add OLDI bridge support

Hi Alexander, On 26/03/25 00:27, Sverdlin, Alexander wrote: > Hi Aradhya! > > On Thu, 2025-03-20 at 18:54 +0530, Aradhya Bhatia wrote: >>> I've tried to test the patchset with necessary pre-requisites and DT >>> additions >>> with a single channel LVD

[PATCH v7 0/4] drm/tidss: Add OLDI bridge support

form https://www.beagleboard.org/boards/beagleplay [4]: GitHub Fork for OLDI tests https://github.com/aradhya07/linux-ab/tree/next_oldi-v7_1-tests [5]: ("ti,am65x-dss.yaml: oldi-txes: Missing additionalProperties/ unevaluatedProperties constraint") https://lore.kernel.org/all/172107979988.1595945.966

[PATCH v7 2/4] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

From: Aradhya Bhatia The OLDI transmitters (TXes) do not have registers of their own, and are dependent on the source video-ports (VPs) from the DSS to provide configuration data. This hardware doesn't directly sit on the internal bus of the SoC, but does so via the DSS. Hence, the OLDI TXe

[PATCH v7 1/4] dt-bindings: display: ti, am65x-dss: Re-indent the example

From: Aradhya Bhatia Reduce tab size from 8 spaces to 4 spaces to make the bindings consistent, and easy to expand. Acked-by: Rob Herring (Arm) Reviewed-by: Laurent Pinchart Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti

[PATCH v11 07/14] drm/mipi-dsi: Add helper to find input format

From: Aradhya Bhatia Add a helper API that can be used by the DSI hosts to find the required input bus format for the given output dsi pixel format. Reviewed-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Tested-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya

[PATCH v11 08/14] drm/bridge: cdns-dsi: Add input format negotiation

From: Aradhya Bhatia Add support for the input format negotiation hook, that uses the helper drm_mipi_dsi_get_input_bus_fmt() for dsi hosts, to figure out the required input format. Reviewed-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Tested-by: Tomi Valkeinen Signed-off-by: Aradhya

[PATCH v11 05/14] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready

From: Aradhya Bhatia Once the DSI Link and DSI Phy are initialized, the code needs to wait for Clk and Data Lanes to be ready, before continuing configuration. This is in accordance with the DSI Start-up procedure, found in the Technical Reference Manual of Texas Instrument's J721E SoC[0]

[PATCH v11 02/14] drm/bridge: cdns-dsi: Fix phy de-init and flag it so

From: Aradhya Bhatia The driver code doesn't have a Phy de-initialization path as yet, and so it does not clear the phy_initialized flag while suspending. This is a problem because after resume the driver looks at this flag to determine if a Phy re-initialization is required or not. It

[PATCH v11 12/14] drm/atomic-helper: Re-order bridge chain pre-enable and post-disable

peline are pre_enabled. Fix that by re-ordering the sequence of bridge pre_enable and bridge post_disable. Acked-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Tested-by: Tomi Valkeinen Tested-by: Alexander Sverdlin Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- drive

[PATCH v11 11/14] drm/atomic-helper: Separate out bridge pre_enable/post_disable from enable/disable

: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_helper.c | 91 - 1 file changed, 88 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index d185486071c5..86824f769623 100644 --- a/drivers/gpu/drm

[PATCH v11 14/14] drm/bridge: cdns-dsi: Use pre_enable/post_disable to enable/disable

From: Aradhya Bhatia The cdns-dsi controller requires that it be turned on completely before the input DPI's source has begun streaming[0]. Not having that, allows for a small window before cdns-dsi enable and after cdns-dsi disable where the previous entity (in this case tidss's vid

[PATCH v11 06/14] drm/bridge: cdns-dsi: Move to devm_drm_of_get_bridge()

From: Aradhya Bhatia Instead of manually finding the next bridge/panel, and maintaining the panel-bridge (in-case the next entity is a panel), switch to using the automatically managing devm_drm_of_get_bridge() API. Drop the drm_panel support completely from the driver while at it. Reviewed-by

[PATCH v11 04/14] drm/bridge: cdns-dsi: Check return value when getting default PHY config

From: Aradhya Bhatia Check for the return value of the phy_mipi_dphy_get_default_config() call, and in case of an error, return back the same. Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Cc: sta...@vger.kernel.org Reviewed-by: Tomi Valkeinen Reviewed-by: Dmitry

[PATCH v11 00/14] drm/bridge: cdns-dsi: Fix the color-shift issue

t...@ti.com/ v4: https://lore.kernel.org/all/20240622110929.3115714-1-a-bhat...@ti.com/ v5: https://lore.kernel.org/all/20241019195411.266860-1-aradhya.bha...@linux.dev/ v6: https://lore.kernel.org/all/2025092738.308889-1-aradhya.bha...@linux.dev/ v7: https://lore.kernel.org/all/20250114055626.188

[PATCH v11 03/14] drm/bridge: cdns-dsi: Fix the clock variable for mode_valid()

From: Aradhya Bhatia The crtc_* mode parameters do not get generated (duplicated in this case) from the regular parameters before the mode validation phase begins. The rest of the code conditionally uses the crtc_* parameters only during the bridge enable phase, but sticks to the regular

Re: [PATCH v4 0/3] drm/tidss: Add OLDI bridge support

Hi Alexander, Thank you for testing and reviewing the patches! On 19/03/25 23:30, Sverdlin, Alexander wrote: > Thank you for the patches, Aradhya! > > On Sun, 2024-11-24 at 20:06 +0530, Aradhya Bhatia wrote: >> Regardless, I'd appreciate it if somebody can test it, and rep

Re: [PATCH v4 3/3] drm/tidss: Add OLDI bridge support

Hi, On 18/03/25 19:05, Sverdlin, Alexander wrote: > Hi Aradhya! > > On Sun, 2024-11-24 at 20:06 +0530, Aradhya Bhatia wrote: >> From: Aradhya Bhatia >> >> The AM62x and AM62Px SoCs feature 2 OLDI TXes each, which makes it >> possible to connect them in dua

Re: [PATCH v10 00/13] drm/bridge: cdns-dsi: Fix the color-shift issue

Hi, All the patches within this series have been reviewed. Are there any more concerns that should be taken care of? On 26/02/25 21:22, Aradhya Bhatia wrote: > Hello all, > > This series provides some crucial fixes and improvements for the Cadence's DSI > TX (cdns-dsi)

[PATCH v6 2/4] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

From: Aradhya Bhatia The OLDI transmitters (TXes) do not have registers of their own, and are dependent on the source video-ports (VPs) from the DSS to provide configuration data. This hardware doesn't directly sit on the internal bus of the SoC, but does so via the DSS. Hence, the OLDI TXe

[PATCH v6 4/4] drm/tidss: Add OLDI bridge support

From: Aradhya Bhatia The AM62x and AM62Px SoCs feature 2 OLDI TXes each, which makes it possible to connect them in dual-link or cloned single-link OLDI display modes. The current OLDI support in tidss_dispc.c can only support for a single OLDI TX, connected to a VP and doesn't really su

[PATCH v6 3/4] drm/tidss: Mark AM65x OLDI code separately

bridge driver will be introduced. Mark the existing OLDI code separately by renaming all the current OLDI identifiers with the 'AM65X_' prefix in tidss driver, to help distinguish from the upcoming OLDI bridge driver. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/tidss/tidss_dispc.c

[PATCH v6 1/4] dt-bindings: display: ti, am65x-dss: Re-indent the example

From: Aradhya Bhatia Reduce tab size from 8 spaces to 4 spaces to make the bindings consistent, and easy to expand. Acked-by: Rob Herring (Arm) Reviewed-by: Laurent Pinchart Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti

[PATCH v6 0/4] drm/tidss: Add OLDI bridge support

/github.com/aradhya07/linux-ab/tree/next_oldi-v6_3-tests [5]: ("ti,am65x-dss.yaml: oldi-txes: Missing additionalProperties/ unevaluatedProperties constraint") https://lore.kernel.org/all/172107979988.1595945.9666141982402158422.r...@kernel.org/ [6]: Undo drop of OLDI clone mode suppo

[PATCH v10 13/13] drm/bridge: cdns-dsi: Use pre_enable/post_disable to enable/disable

From: Aradhya Bhatia The cdns-dsi controller requires that it be turned on completely before the input DPI's source has begun streaming[0]. Not having that, allows for a small window before cdns-dsi enable and after cdns-dsi disable where the previous entity (in this case tidss's vid

[PATCH v10 09/13] drm/bridge: cdns-dsi: Move DSI mode check to _atomic_check()

From: Aradhya Bhatia At present, the DSI mode configuration check happens during the _atomic_enable() phase, which is not really the best place for this. Moreover, if the mode is not valid, the driver gives a warning and continues the hardware configuration. Move the DSI mode configuration

[PATCH v10 12/13] drm/atomic-helper: Re-order bridge chain pre-enable and post-disable

peline are pre_enabled. Fix that by re-ordering the sequence of bridge pre_enable and bridge post_disable. Acked-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Tested-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_helper.c | 8 --

[PATCH v10 11/13] drm/atomic-helper: Separate out bridge pre_enable/post_disable from enable/disable

is meant to be an interim patch, to cleanly pave the way for the sequence re-ordering patch, and maintain bisectability in the process. Reviewed-by: Dmitry Baryshkov Reviewed-by: Jayesh Choudhary Reviewed-by: Tomi Valkeinen Tested-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia --- Note on

[PATCH v10 10/13] drm/atomic-helper: Refactor crtc & encoder-bridge op loops into separate functions

From: Aradhya Bhatia The way any singular display pipeline, in need of a modeset, gets enabled is as follows - crtc enable (all) bridge pre-enable encoder enable (all) bridge enable - and the disable sequence is exactly the reverse of this. The crtc operations

[PATCH v10 08/13] drm/bridge: cdns-dsi: Support atomic bridge APIs

From: Aradhya Bhatia Change the existing (and deprecated) bridge hooks, to the bridge atomic APIs. Add drm helpers for duplicate_state, destroy_state, and bridge_reset bridge hooks. Further add support for the input format negotiation hook. Reviewed-by: Dmitry Baryshkov Reviewed-by: Tomi

[PATCH v10 06/13] drm/bridge: cdns-dsi: Move to devm_drm_of_get_bridge()

From: Aradhya Bhatia Instead of manually finding the next bridge/panel, and maintaining the panel-bridge (in-case the next entity is a panel), switch to using the automatically managing devm_drm_of_get_bridge() API. Drop the drm_panel support completely from the driver while at it. Reviewed-by

[PATCH v10 05/13] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready

From: Aradhya Bhatia Once the DSI Link and DSI Phy are initialized, the code needs to wait for Clk and Data Lanes to be ready, before continuing configuration. This is in accordance with the DSI Start-up procedure, found in the Technical Reference Manual of Texas Instrument's J721E SoC[0]

[PATCH v10 03/13] drm/bridge: cdns-dsi: Fix the clock variable for mode_valid()

From: Aradhya Bhatia The crtc_* mode parameters do not get generated (duplicated in this case) from the regular parameters before the mode validation phase begins. The rest of the code conditionally uses the crtc_* parameters only during the bridge enable phase, but sticks to the regular

[PATCH v10 07/13] drm/mipi-dsi: Add helper to find input format

From: Aradhya Bhatia Add a helper API that can be used by the DSI hosts to find the required input bus format for the given output dsi pixel format. Reviewed-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Tested-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya

[PATCH v10 04/13] drm/bridge: cdns-dsi: Check return value when getting default PHY config

From: Aradhya Bhatia Check for the return value of the phy_mipi_dphy_get_default_config() call, and in case of an error, return back the same. Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Cc: sta...@vger.kernel.org Reviewed-by: Tomi Valkeinen Reviewed-by: Dmitry

[PATCH v10 00/13] drm/bridge: cdns-dsi: Fix the color-shift issue

radhya.bha...@linux.dev/ v6: https://lore.kernel.org/all/2025092738.308889-1-aradhya.bha...@linux.dev/ v7: https://lore.kernel.org/all/20250114055626.18816-1-aradhya.bha...@linux.dev/ v8: https://lore.kernel.org/all/20250126191551.741957-1-aradhya.bha...@linux.dev/ v9: https://lore.kernel.org/

[PATCH v10 02/13] drm/bridge: cdns-dsi: Fix phy de-init and flag it so

From: Aradhya Bhatia The driver code doesn't have a Phy de-initialization path as yet, and so it does not clear the phy_initialized flag while suspending. This is a problem because after resume the driver looks at this flag to determine if a Phy re-initialization is required or not. It

[PATCH v10 01/13] drm/bridge: cdns-dsi: Fix connecting to next bridge

From: Aradhya Bhatia Fix the OF node pointer passed to the of_drm_find_bridge() call to find the next bridge in the display chain. The code to find the next panel (and create its panel-bridge) works fine, but to find the next (non-panel) bridge does not. To find the next bridge in the pipeline

Re: [PATCH v5 2/3] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

Hi Tomi, On 13/02/25 18:50, Tomi Valkeinen wrote: > Hi, > > On 13/02/2025 14:33, Aradhya Bhatia wrote: > >>>> +  ti,companion-oldi: >>>> +    $ref: /schemas/types.yaml#/definitions/phandle >>>> +    description: >>>> +  phandle to

Re: [PATCH v5 2/3] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

Hi Tomi, Thank you for reviewing the patches! On 11/02/25 17:54, Tomi Valkeinen wrote: > Hi, > > On 09/02/2025 18:09, Aradhya Bhatia wrote: >> From: Aradhya Bhatia >> >> The OLDI transmitters (TXes) do not have registers of their own, and are >> dependent on

[PATCH v5 0/3] drm/tidss: Add OLDI bridge support

https://www.beagleboard.org/boards/beagleplay [4]: GitHub Fork for OLDI tests https://github.com/aradhya07/linux-ab/tree/next_oldi_v5_5-tests [5]: ("ti,am65x-dss.yaml: oldi-txes: Missing additionalProperties/ unevaluatedProperties constraint") https://lore.kernel.org/all/172107979988.1595

[PATCH v5 1/3] dt-bindings: display: ti, am65x-dss: Re-indent the example

From: Aradhya Bhatia Reduce tab size from 8 spaces to 4 spaces to make the bindings consistent, and easy to expand. Acked-by: Rob Herring (Arm) Reviewed-by: Laurent Pinchart Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- .../bindings/display/ti

[PATCH v5 2/3] dt-bindings: display: ti: Add schema for AM625 OLDI Transmitter

From: Aradhya Bhatia The OLDI transmitters (TXes) do not have registers of their own, and are dependent on the source video-ports (VPs) from the DSS to provide configuration data. This hardware doesn't directly sit on the internal bus of the SoC, but does so via the DSS. Hence, the OLDI TXe

[PATCH v5 3/3] drm/tidss: Add OLDI bridge support

From: Aradhya Bhatia The AM62x and AM62Px SoCs feature 2 OLDI TXes each, which makes it possible to connect them in dual-link or cloned single-link OLDI display modes. The current OLDI support in tidss_dispc.c can only support for a single OLDI TX, connected to a VP and doesn't really su

Re: [PATCH v8 11/13] drm/atomic-helper: Separate out bridge pre_enable/post_disable from enable/disable

Hi Jayesh, Thank you for testing this out, and reporting the error I had overlooked. On 04/02/25 17:59, Jayesh Choudhary wrote: > Hello Aradhya, > > On 27/01/25 00:45, Aradhya Bhatia wrote: >> The encoder-bridge ops occur by looping over the new connector states of >> the d

[PATCH v9 11/13] drm/atomic-helper: Separate out bridge pre_enable/post_disable from enable/disable

is meant to be an interim patch, to cleanly pave the way for the sequence re-ordering patch, and maintain bisectability in the process. Reviewed-by: Dmitry Baryshkov Reviewed-by: Jayesh Choudhary Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia --- Note on checkpatch warnings: This

[PATCH v9 12/13] drm/atomic-helper: Re-order bridge chain pre-enable and post-disable

peline are pre_enabled. Fix that by re-ordering the sequence of bridge pre_enable and bridge post_disable. Acked-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_helper.c | 8 1 file changed, 4 insert

[PATCH v9 10/13] drm/atomic-helper: Refactor crtc & encoder-bridge op loops into separate functions

From: Aradhya Bhatia The way any singular display pipeline, in need of a modeset, gets enabled is as follows - crtc enable (all) bridge pre-enable encoder enable (all) bridge enable - and the disable sequence is exactly the reverse of this. The crtc operations

[PATCH v9 13/13] drm/bridge: cdns-dsi: Use pre_enable/post_disable to enable/disable

From: Aradhya Bhatia The cdns-dsi controller requires that it be turned on completely before the input DPI's source has begun streaming[0]. Not having that, allows for a small window before cdns-dsi enable and after cdns-dsi disable where the previous entity (in this case tidss's vid

[PATCH v9 09/13] drm/bridge: cdns-dsi: Move DSI mode check to _atomic_check()

From: Aradhya Bhatia At present, the DSI mode configuration check happens during the _atomic_enable() phase, which is not really the best place for this. Moreover, if the mode is not valid, the driver gives a warning and continues the hardware configuration. Move the DSI mode configuration

[PATCH v9 08/13] drm/bridge: cdns-dsi: Support atomic bridge APIs

From: Aradhya Bhatia Change the existing (and deprecated) bridge hooks, to the bridge atomic APIs. Add drm helpers for duplicate_state, destroy_state, and bridge_reset bridge hooks. Further add support for the input format negotiation hook. Reviewed-by: Dmitry Baryshkov Reviewed-by: Tomi

[PATCH v9 05/13] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready

From: Aradhya Bhatia Once the DSI Link and DSI Phy are initialized, the code needs to wait for Clk and Data Lanes to be ready, before continuing configuration. This is in accordance with the DSI Start-up procedure, found in the Technical Reference Manual of Texas Instrument's J721E SoC[0]

[PATCH v9 07/13] drm/mipi-dsi: Add helper to find input format

From: Aradhya Bhatia Add a helper API that can be used by the DSI hosts to find the required input bus format for the given output dsi pixel format. Reviewed-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm

[PATCH v9 06/13] drm/bridge: cdns-dsi: Move to devm_drm_of_get_bridge()

From: Aradhya Bhatia Instead of manually finding the next bridge/panel, and maintaining the panel-bridge (in-case the next entity is a panel), switch to using the automatically managing devm_drm_of_get_bridge() API. Drop the drm_panel support completely from the driver while at it. Reviewed-by

[PATCH v9 04/13] drm/bridge: cdns-dsi: Check return value when getting default PHY config

From: Aradhya Bhatia Check for the return value of the phy_mipi_dphy_get_default_config() call, and in case of an error, return back the same. Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Cc: sta...@vger.kernel.org Reviewed-by: Tomi Valkeinen Reviewed-by: Dmitry

[PATCH v9 03/13] drm/bridge: cdns-dsi: Fix the clock variable for mode_valid()

From: Aradhya Bhatia The crtc_* mode parameters do not get generated (duplicated in this case) from the regular parameters before the mode validation phase begins. The rest of the code conditionally uses the crtc_* parameters only during the bridge enable phase, but sticks to the regular

[PATCH v9 00/13]drm/bridge: cdns-dsi: Fix the color-shift issue

0240617105311.1587489-1-a-bhat...@ti.com/ v4: https://lore.kernel.org/all/20240622110929.3115714-1-a-bhat...@ti.com/ v5: https://lore.kernel.org/all/20241019195411.266860-1-aradhya.bha...@linux.dev/ v6: https://lore.kernel.org/all/2025092738.308889-1-aradhya.bha...@linux.dev/ v7: https://lore.kernel.org/a

[PATCH v9 02/13] drm/bridge: cdns-dsi: Fix phy de-init and flag it so

From: Aradhya Bhatia The driver code doesn't have a Phy de-initialization path as yet, and so it does not clear the phy_initialized flag while suspending. This is a problem because after resume the driver looks at this flag to determine if a Phy re-initialization is required or not. It

[PATCH v9 01/13] drm/bridge: cdns-dsi: Fix connecting to next bridge

From: Aradhya Bhatia Fix the OF node pointer passed to the of_drm_find_bridge() call to find the next bridge in the display chain. The code to find the next panel (and create its panel-bridge) works fine, but to find the next (non-panel) bridge does not. To find the next bridge in the pipeline

[PATCH v8 06/13] drm/bridge: cdns-dsi: Move to devm_drm_of_get_bridge()

From: Aradhya Bhatia Instead of manually finding the next bridge/panel, and maintaining the panel-bridge (in-case the next entity is a panel), switch to using the automatically managing devm_drm_of_get_bridge() API. Drop the drm_panel support completely from the driver while at it. Reviewed-by

[PATCH v8 01/13] drm/bridge: cdns-dsi: Fix connecting to next bridge

From: Aradhya Bhatia Fix the OF node pointer passed to the of_drm_find_bridge() call to find the next bridge in the display chain. The code to find the next panel (and create its panel-bridge) works fine, but to find the next (non-panel) bridge does not. To find the next bridge in the pipeline

[PATCH v8 13/13] drm/bridge: cdns-dsi: Use pre_enable/post_disable to enable/disable

From: Aradhya Bhatia The cdns-dsi controller requires that it be turned on completely before the input DPI's source has begun streaming[0]. Not having that, allows for a small window before cdns-dsi enable and after cdns-dsi disable where the previous entity (in this case tidss's vid

[PATCH v8 12/13] drm/atomic-helper: Re-order bridge chain pre-enable and post-disable

peline are pre_enabled. Fix that by re-ordering the sequence of bridge pre_enable and bridge post_disable. Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_helper.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drive

[PATCH v8 11/13] drm/atomic-helper: Separate out bridge pre_enable/post_disable from enable/disable

is meant to be an interim patch, to cleanly pave the way for the sequence re-ordering patch, and maintain bisectability in the process. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_helper.c | 92 +++-- 1 file changed, 88 insertions(+), 4 deletions(-) diff

[PATCH v8 10/13] drm/atomic-helper: Refactor crtc & encoder-bridge op loops into separate functions

From: Aradhya Bhatia The way any singular display pipeline, in need of a modeset, gets enabled is as follows - crtc enable (all) bridge pre-enable encoder enable (all) bridge enable - and the disable sequence is exactly the reverse of this. The crtc operations

[PATCH v8 09/13] drm/bridge: cdns-dsi: Move DSI mode check to _atomic_check()

From: Aradhya Bhatia At present, the DSI mode configuration check happens during the _atomic_enable() phase, which is not really the best place for this. Moreover, if the mode is not valid, the driver gives a warning and continues the hardware configuration. Move the DSI mode configuration

[PATCH v8 08/13] drm/bridge: cdns-dsi: Support atomic bridge APIs

From: Aradhya Bhatia Change the existing (and deprecated) bridge hooks, to the bridge atomic APIs. Add drm helpers for duplicate_state, destroy_state, and bridge_reset bridge hooks. Further add support for the input format negotiation hook. Reviewed-by: Dmitry Baryshkov Reviewed-by: Tomi

[PATCH v8 07/13] drm/mipi-dsi: Add helper to find input format

From: Aradhya Bhatia Add a helper API that can be used by the DSI hosts to find the required input bus format for the given output dsi pixel format. Reviewed-by: Dmitry Baryshkov Reviewed-by: Tomi Valkeinen Signed-off-by: Aradhya Bhatia Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm

[PATCH v8 05/13] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready

From: Aradhya Bhatia Once the DSI Link and DSI Phy are initialized, the code needs to wait for Clk and Data Lanes to be ready, before continuing configuration. This is in accordance with the DSI Start-up procedure, found in the Technical Reference Manual of Texas Instrument's J721E SoC[0]

[PATCH v8 04/13] drm/bridge: cdns-dsi: Check return value when getting default PHY config

From: Aradhya Bhatia Check for the return value of the phy_mipi_dphy_get_default_config() call, and incase of an error, return back the same. Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework") Cc: Stable List Reviewed-by: Tomi Valkeinen Reviewed-by: Dmitry Baryshk

[PATCH v8 03/13] drm/bridge: cdns-dsi: Fix the clock variable for mode_valid()

From: Aradhya Bhatia The crtc_* mode parameters do not get generated (duplicated in this case) from the regular parameters before the mode validation phase begins. The rest of the code conditionally uses the crtc_* parameters only during the bridge enable phase, but sticks to the regular

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