On 12/13/24 5:50 PM, Akhil P Oommen wrote:
On 12/12/2024 9:44 PM, Antonino Maniscalco wrote:
On 12/12/24 4:58 PM, Akhil P Oommen wrote:
On 12/5/2024 10:24 PM, Rob Clark wrote:
From: Rob Clark
Performance counter usage falls into two categories:
1. Local usage, where the counter
fine MSM_PARAM_REQ_CNTRS 0x15 /* WO: request "local" (intra-submit)
perfcntr usage */
/* For backwards compat. The original support for preemption was based on
* a single ring per priority level so # of priority levels equals the #
Best regards,
--
Antonino Maniscalco
On 10/8/24 11:10 PM, Kees Bakker wrote:
Op 03-10-2024 om 18:12 schreef Antonino Maniscalco:
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.
Reviewed-by: Akhil P Oommen
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on
Add documentation about the preemption feature supported by the msm
driver.
Signed-off-by: Antonino Maniscalco
---
Documentation/gpu/msm-preemption.rst | 99
1 file changed, 99 insertions(+)
diff --git a/Documentation/gpu/msm-preemption.rst
b/Documentation
Initialize with 4 rings to enable preemption.
Add the "preemption_enabled" module parameter to override this.
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino
rejected if preemption is not supported on the target, this
allows userspace to know whether preemption is supported.
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 6 ++
drivers/gpu/drm/msm/msm_gpu_trace.h | 28
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_preempt.c
b/drivers/gpu/drm/msm/adreno
Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 6
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 58
# on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
.../gpu/drm/msm/registers/adreno/adreno_pm4.xml| 39 ++
1 file changed, 17 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml
b
Armstrong # on SM8450-HDK
Signed-off-by: Sharat Masetty
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 193 ++-
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 162
drivers/gpu/drm/msm
Add a field to contain the pwup_reglist needed for preemption.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 26 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 2 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 13 +
3
Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml.
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/registers/adreno/a6xx.xml
Adds a field to `adreno_info` to store the GPU specific preempt record
size.
Reviewed-by: Akhil P Oommen
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
.
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +-
drivers/gpu
SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_ringbuffer.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm
on a previous series to enable
preemption on A6XX targets:
https://lkml.kernel.org/1520489185-21828-1-git-send-email-smase...@codeaurora.org
Signed-off-by: Antonino Maniscalco
---
Changes in v8:
- Updated commit message on 11/12 to reflect the fact that we are
enabling on more targets
- Fixed ty
On 10/1/24 3:10 AM, Bagas Sanjaya wrote:
On Thu, Sep 26, 2024 at 11:16:53PM +0200, Antonino Maniscalco wrote:
+.. SPDX-License-Identifier: GPL-2.0
+
+:orphan:
Why don't this be added to toctree in Documentation/gpu/index.rst?
Yes so there is existing orphan documentation for msm
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 6 ++
drivers/gpu/drm/msm/msm_gpu_trace.h | 28
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_preempt.c
b/drivers/gpu/drm/msm/adreno
SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 12
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +-
drivers/gpu/drm/msm/adreno/adreno_device.c | 4
drivers/gpu/drm/msm/adreno/ad
Add a field to contain the pwup_reglist needed for preemption.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 26 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 2 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 13 +
3
rejected if preemption is not supported on the target, this
allows userspace to know whether preemption is supported.
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino
# on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
.../gpu/drm/msm/registers/adreno/adreno_pm4.xml| 39 ++
1 file changed, 17 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml
b
Add documentation about the preemption feature supported by the msm
driver.
Signed-off-by: Antonino Maniscalco
---
Documentation/gpu/msm-preemption.rst | 99
1 file changed, 99 insertions(+)
diff --git a/Documentation/gpu/msm-preemption.rst
b/Documentation
Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 6
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 58
Armstrong # on SM8450-HDK
Signed-off-by: Sharat Masetty
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 193 ++-
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 162
drivers/gpu/drm/msm
Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml.
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/registers/adreno/a6xx.xml
Adds a field to `adreno_info` to store the GPU specific preempt record
size.
Reviewed-by: Akhil P Oommen
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
.
Tested-by: Rob Clark
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +-
drivers/gpu
SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_ringbuffer.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm
on a previous series to enable
preemption on A6XX targets:
https://lkml.kernel.org/1520489185-21828-1-git-send-email-smase...@codeaurora.org
Signed-off-by: Antonino Maniscalco
---
Changes in v7:
- Enable preemption on more targets
- Move pwrup reglist to a6xx_catalog and get rid of ifpc list
- Spli
On 9/27/24 6:29 PM, Rob Clark wrote:
On Thu, Sep 26, 2024 at 2:17 PM Antonino Maniscalco
wrote:
This patch implements preemption feature for A6xx targets, this allows
the GPU to switch to a higher priority ringbuffer if one is ready. A6XX
hardware as such supports multiple levels of
a mesa MR [1] based on this
that will hopefully get quickly acked and merged.
Connor
Sure I'll keep that in mind, thanks!
[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31422
On Thu, Sep 26, 2024 at 10:17 PM Antonino Maniscalco
wrote:
Add missing bitfields to CONTEXT
-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 6
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 57 +++
drivers/gpu/drm/msm
on a previous series to enable
preemption on A6XX targets:
https://lkml.kernel.org/1520489185-21828-1-git-send-email-smase...@codeaurora.org
Signed-off-by: Antonino Maniscalco
---
Changes in v6:
- Fixed commit message prefix (A6XX->a6xx)
- Allow preemption to be disabled at run time
- Link to v5
rejected if preemption is not supported on the target, this
allows userspace to know whether preemption is supported.
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino
-HDK
Signed-off-by: Sharat Masetty
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 283 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 168 +
drivers/gpu/drm/msm/adreno
d-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 3 ++-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +-
drivers/gpu/drm/msm/adreno/adreno_device.c | 4
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 1 +
drivers/g
Adds a field to `adreno_info` to store the GPU specific preempt record
size.
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm
Add documentation about the preemption feature supported by the msm
driver.
Signed-off-by: Antonino Maniscalco
---
Documentation/gpu/msm-preemption.rst | 99
1 file changed, 99 insertions(+)
diff --git a/Documentation/gpu/msm-preemption.rst
b/Documentation
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
.../gpu/drm/msm/registers/adreno/adreno_pm4.xml| 39 ++
1 file changed, 17 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml
b/drivers/gpu/drm/msm
Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_ringbuffer.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
.
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno
Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml.
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 7 ++-
1 file
On 9/24/24 5:22 PM, Akhil P Oommen wrote:
On Tue, Sep 24, 2024 at 07:47:12AM -0700, Rob Clark wrote:
On Tue, Sep 24, 2024 at 4:54 AM Antonino Maniscalco
wrote:
On 9/20/24 7:09 PM, Akhil P Oommen wrote:
On Wed, Sep 18, 2024 at 09:46:33AM +0200, Neil Armstrong wrote:
Hi,
On 17/09/2024 13:14
On 9/24/24 4:47 PM, Rob Clark wrote:
On Tue, Sep 24, 2024 at 4:54 AM Antonino Maniscalco
wrote:
On 9/20/24 7:09 PM, Akhil P Oommen wrote:
On Wed, Sep 18, 2024 at 09:46:33AM +0200, Neil Armstrong wrote:
Hi,
On 17/09/2024 13:14, Antonino Maniscalco wrote:
This series implements preemption
On 9/20/24 7:09 PM, Akhil P Oommen wrote:
On Wed, Sep 18, 2024 at 09:46:33AM +0200, Neil Armstrong wrote:
Hi,
On 17/09/2024 13:14, Antonino Maniscalco wrote:
This series implements preemption for A7XX targets, which allows the GPU to
switch to an higher priority ring when work is pushed to it
Add documentation about the preemption feature supported by the msm
driver.
Signed-off-by: Antonino Maniscalco
---
Documentation/gpu/msm-preemption.rst | 99
1 file changed, 99 insertions(+)
diff --git a/Documentation/gpu/msm-preemption.rst
b/Documentation
d-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 3 ++-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 +-
drivers/gpu/drm/msm/adreno/adreno_device.c | 4
drivers/gpu/drm/msm/adreno/adreno_gpu.h| 1 +
4 files c
rejected if preemption is not supported on the target, this
allows userspace to know whether preemption is supported.
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
.../gpu/drm/msm/registers/adreno/adreno_pm4.xml| 39 ++
1 file changed, 17 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/msm/registers/adreno/adreno_pm4.xml
b/drivers/gpu/drm/msm
-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 6
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 57 +++
drivers/gpu/drm/msm
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino
Adds a field to `adreno_info` to store the GPU specific preempt record
size.
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm
-HDK
Signed-off-by: Sharat Masetty
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/Makefile | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 283 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 168 +
drivers/gpu/drm/msm/adreno
Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml.
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 7 ++-
1 file
.
Tested-by: Neil Armstrong # on SM8650-QRD
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Neil Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno
Armstrong # on SM8450-HDK
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_ringbuffer.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
on a previous series to enable
preemption on A6XX targets:
https://lkml.kernel.org/1520489185-21828-1-git-send-email-smase...@codeaurora.org
Signed-off-by: Antonino Maniscalco
---
Changes in v5:
- Made preemption documentation more detailed
- Added ring ID to preempt_record BO name
- Added Neil's
On 9/18/24 9:46 AM, Neil Armstrong wrote:
Hi,
On 17/09/2024 13:14, Antonino Maniscalco wrote:
This series implements preemption for A7XX targets, which allows the
GPU to
switch to an higher priority ring when work is pushed to it, reducing
latency
for high priority submissions.
This series
Add documentation about the preemption feature supported by the msm
driver.
Signed-off-by: Antonino Maniscalco
---
Documentation/gpu/msm-preemption.rst | 98
1 file changed, 98 insertions(+)
diff --git a/Documentation/gpu/msm-preemption.rst
b/Documentation
rejected if preemption is not supported on the target, this
allows userspace to know whether preemption is supported.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12
drivers/gpu/drm/msm/msm_submitqueue.c | 3
In mesa CP_SET_CTXSWITCH_IB is renamed to CP_SET_AMBLE and some other
names are changed to match KGSL. Import those changes.
The changes have not been merged yet in mesa but are necessary for this
series.
Signed-off-by: Antonino Maniscalco
---
.../gpu/drm/msm/registers/adreno/adreno_pm4.xml
Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml
b/drivers/gpu/drm/msm/registers
Initialize with 4 rings to enable preemption.
For now only on A750 as other targets require testing.
Add the "preemption_enabled" module parameter to override this for other
A7xx targets.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/g
-call level or a bin boundary level preemption. This patch
enables the basic preemption level, with more fine grained preemption
support to follow.
Signed-off-by: Sharat Masetty
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/Makefile
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 6 ++
drivers/gpu/drm/msm/msm_gpu_trace.h
Use the postamble to reset perf counters when switching between rings,
except when sysprof is enabled, analogously to how they are reset
between submissions when switching pagetables.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12 +++
drivers/gpu/drm
.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a2xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a4xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 6 +++---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 10 ++
drivers
Adds a field to `adreno_info` to store the GPU specific preempt record
size.
Signed-off-by: Antonino Maniscalco
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 4
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 +
2
The bv_fence field of rbmemptrs was being used incorrectly as the BV
rptr shadow pointer in some places.
Add a bv_rptr field and change the code to use that instead.
Signed-off-by: Antonino Maniscalco
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm
on a previous series to enable
preemption on A6XX targets:
https://lkml.kernel.org/1520489185-21828-1-git-send-email-smase...@codeaurora.org
Signed-off-by: Antonino Maniscalco
---
Changes in v4:
- Added missing register in pwrup list
- Removed and rearrange barriers
- Renamed `skip_inline_wpt
On 9/10/24 6:43 PM, Akhil P Oommen wrote:
On Mon, Sep 09, 2024 at 01:22:22PM +0100, Connor Abbott wrote:
On Fri, Sep 6, 2024 at 9:03 PM Akhil P Oommen wrote:
On Thu, Sep 05, 2024 at 04:51:22PM +0200, Antonino Maniscalco wrote:
This patch implements preemption feature for A6xx targets, this
On 9/6/24 9:58 PM, Akhil P Oommen wrote:
On Thu, Sep 05, 2024 at 04:51:18PM +0200, Antonino Maniscalco wrote:
This series implements preemption for A7XX targets, which allows the GPU to
switch to an higher priority ring when work is pushed to it, reducing latency
for high priority submissions
On 9/12/24 9:12 AM, Akhil P Oommen wrote:
On Wed, Sep 11, 2024 at 12:35:08AM +0200, Antonino Maniscalco wrote:
On 9/10/24 11:34 PM, Akhil P Oommen wrote:
On Mon, Sep 09, 2024 at 05:07:42PM +0200, Antonino Maniscalco wrote:
On 9/6/24 10:08 PM, Akhil P Oommen wrote:
On Thu, Sep 05, 2024 at 04
On 9/10/24 11:34 PM, Akhil P Oommen wrote:
On Mon, Sep 09, 2024 at 05:07:42PM +0200, Antonino Maniscalco wrote:
On 9/6/24 10:08 PM, Akhil P Oommen wrote:
On Thu, Sep 05, 2024 at 04:51:24PM +0200, Antonino Maniscalco wrote:
Use the postamble to reset perf counters when switching between rings
On 9/9/24 3:15 PM, Antonino Maniscalco wrote:
On 9/6/24 9:54 PM, Akhil P Oommen wrote:
On Thu, Sep 05, 2024 at 04:51:22PM +0200, Antonino Maniscalco wrote:
This patch implements preemption feature for A6xx targets, this allows
the GPU to switch to a higher priority ringbuffer if one is ready
On 9/6/24 10:11 PM, Akhil P Oommen wrote:
On Thu, Sep 05, 2024 at 04:51:25PM +0200, Antonino Maniscalco wrote:
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on
On 9/6/24 10:08 PM, Akhil P Oommen wrote:
On Thu, Sep 05, 2024 at 04:51:24PM +0200, Antonino Maniscalco wrote:
Use the postamble to reset perf counters when switching between rings,
except when sysprof is enabled, analogously to how they are reset
between submissions when switching pagetables
On 9/6/24 9:54 PM, Akhil P Oommen wrote:
On Thu, Sep 05, 2024 at 04:51:22PM +0200, Antonino Maniscalco wrote:
This patch implements preemption feature for A6xx targets, this allows
the GPU to switch to a higher priority ringbuffer if one is ready. A6XX
hardware as such supports multiple levels
Initialize with 4 rings to enable preemption.
For now only on A750 as other targets require testing.
Add the "preemption_enabled" module parameter to override this for other
A7xx targets.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/g
Add documentation about the preemption feature supported by the msm
driver.
Signed-off-by: Antonino Maniscalco
---
Documentation/gpu/msm-preemption.rst | 98
1 file changed, 98 insertions(+)
diff --git a/Documentation/gpu/msm-preemption.rst
b/Documentation
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 7 +++
drivers/gpu/drm/msm/msm_gpu_trace.h
rejected if preemption is not supported on the target, this
allows userspace to know whether preemption is supported.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12
drivers/gpu/drm/msm/msm_submitqueue.c | 3
Use the postamble to reset perf counters when switching between rings,
except when sysprof is enabled, analogously to how they are reset
between submissions when switching pagetables.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 20
-call level or a bin boundary level preemption. This patch
enables the basic preemption level, with more fine grained preemption
support to follow.
Signed-off-by: Sharat Masetty
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/Makefile
In mesa CP_SET_CTXSWITCH_IB is renamed to CP_SET_AMBLE and some other
names are changed to match KGSL. Import those changes.
The changes have not been merged yet in mesa but are necessary for this
series.
Signed-off-by: Antonino Maniscalco
---
.../gpu/drm/msm/registers/adreno/adreno_pm4.xml
Add missing bitfields to CONTEXT_SWITCH_CNTL in a6xx.xml.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/registers/adreno/a6xx.xml
b/drivers/gpu/drm/msm/registers
Adds a field to `adreno_info` to store the GPU specific preempt record
size.
Signed-off-by: Antonino Maniscalco
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 4
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 +
2
The bv_fence field of rbmemptrs was being used incorrectly as the BV
rptr shadow pointer in some places.
Add a bv_rptr field and change the code to use that instead.
Signed-off-by: Antonino Maniscalco
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm
on a previous series to enable
preemption on A6XX targets:
https://lkml.kernel.org/1520489185-21828-1-git-send-email-smase...@codeaurora.org
Signed-off-by: Antonino Maniscalco
---
Changes in v3:
- Added documentation about preemption
- Use quirks to determine which target supports preemption
- Add a m
On 8/30/24 8:32 PM, Rob Clark wrote:
On Fri, Aug 30, 2024 at 8:33 AM Antonino Maniscalco
wrote:
Use the postamble to reset perf counters when switching between rings,
except when sysprof is enabled, analogously to how they are reset
between submissions when switching pagetables.
Signed-off
On 8/30/24 10:25 PM, Rob Clark wrote:
On Fri, Aug 30, 2024 at 8:33 AM Antonino Maniscalco
wrote:
This patch implements preemption feature for A6xx targets, this allows
the GPU to switch to a higher priority ringbuffer if one is ready. A6XX
hardware as such supports multiple levels of
Initialize with 4 rings to enable preemption.
For now only on A750 as other targets require testing.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a
Use the postamble to reset perf counters when switching between rings,
except when sysprof is enabled, analogously to how they are reset
between submissions when switching pagetables.
Signed-off-by: Antonino Maniscalco
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 14 +-
drivers
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 7 +++
drivers/gpu/drm/msm/msm_gpu_trace.h
-call level or a bin boundary level preemption. This patch
enables the basic preemption level, with more fine grained preemption
support to follow.
Signed-off-by: Sharat Masetty
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/Makefile
rejected if preemption is not supported on the target, this
allows userspace to know whether preemption is supported.
Signed-off-by: Antonino Maniscalco
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 12
drivers/gpu/drm/msm/msm_submitqueue.c | 3
In mesa CP_SET_CTXSWITCH_IB is renamed to CP_SET_AMBLE and some other
names are changed to match KGSL. Import those changes.
The changes have not been merged yet in mesa but are necessary for this
series.
Signed-off-by: Antonino Maniscalco
---
.../gpu/drm/msm/registers/adreno/adreno_pm4.xml
This patch adds a bit of infrastructure to give the different Adreno
targets the flexibility to setup the submitqueues per their needs.
Signed-off-by: Sharat Masetty
Signed-off-by: Antonino Maniscalco
Reviewed-by: Akhil P Oommen
Tested-by: Neil Armstrong # on SM8650-QRD
---
drivers/gpu/drm
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