[PATCH v14 4/8] mtd: intel-dg: register with mtd

Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 228 - 1 file changed, 224 insertions(+), 4

[PATCH v14 8/8] drm/xe/nvm: add support for non-posted erase

Signed-off-by: Reuven Abliyev Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/xe_nvm.c| 25 ++ drivers/mtd/devices/mtd_intel_dg.c | 42 -- include/linux/intel_dg_nvm_aux.h | 2 ++ 3 files changed, 67 insertions(+), 2 deletions(-) diff

[PATCH v14 7/8] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++ drivers/gpu/drm/xe/xe_heci_gsc.c | 5

[PATCH v14 5/8] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Reviewed-by: Raag Jadav Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 35 ++ 1

[PATCH v14 6/8] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm

[PATCH v14 3/8] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Reviewed-by: Raag Jadav Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin

[PATCH v14 2/8] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Lucas De Marchi Reviewed-by: Raag Jadav Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander

[PATCH v14 1/8] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Raag Jadav Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS

[PATCH v14 0/8] mtd: add driver for Intel discrete graphics

V13: Rebase over drm-tip again to make it mergable. V14: Drop i915 patches for now by Rodrigo's request. They will be merged later. Alexander Usyskin (7): mtd: add driver for intel graphics non-volatile memory device mtd: intel-dg: implement region enumeration mtd: intel-dg: implem

[PATCH v13 09/10] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++ drivers/gpu/drm/xe/xe_heci_gsc.c | 5

[PATCH v13 10/10] drm/xe/nvm: add support for non-posted erase

Signed-off-by: Reuven Abliyev Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/xe_nvm.c| 25 ++ drivers/mtd/devices/mtd_intel_dg.c | 42 -- include/linux/intel_dg_nvm_aux.h | 2 ++ 3 files changed, 67 insertions(+), 2 deletions(-) diff

[PATCH v13 06/10] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander

[PATCH v13 08/10] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm

[PATCH v13 07/10] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24

[PATCH v13 05/10] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Reviewed-by: Raag Jadav Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 35 ++ 1

[PATCH v13 04/10] mtd: intel-dg: register with mtd

Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 228 - 1 file changed, 224 insertions(+), 4

[PATCH v13 03/10] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Reviewed-by: Raag Jadav Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin

[PATCH v13 02/10] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Lucas De Marchi Reviewed-by: Raag Jadav Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander

[PATCH v13 01/10] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Raag Jadav Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS

[PATCH v13 00/10] mtd: add driver for Intel discrete graphics

V13: Rebase over drm-tip again to make it mergable. Alexander Usyskin (9): mtd: add driver for intel graphics non-volatile memory device mtd: intel-dg: implement region enumeration mtd: intel-dg: implement access functions mtd: intel-dg: register with mtd mtd: intel-dg: align 64bit

[PATCH v12 05/10] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Reviewed-by: Raag Jadav Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 35 ++ 1

[PATCH v12 09/10] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++ drivers/gpu/drm/xe/xe_heci_gsc.c | 5

[PATCH v12 02/10] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Lucas De Marchi Reviewed-by: Raag Jadav Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander

[PATCH v12 06/10] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander

[PATCH v12 00/10] mtd: add driver for Intel discrete graphics

agement patch, it will be merged lately after master device patch is propagated. Rebase over drm-tip. V11: Fix review comments. Add reviewed-by. Add cleanup in error path. Add PADDING region that exists on some BMG devices. V12: Add Raag's r-b. Rebase over drm-tip.

[PATCH v12 01/10] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Raag Jadav Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS

[PATCH v12 10/10] drm/xe/nvm: add support for non-posted erase

Signed-off-by: Reuven Abliyev Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/xe_nvm.c| 25 ++ drivers/mtd/devices/mtd_intel_dg.c | 42 -- include/linux/intel_dg_nvm_aux.h | 2 ++ 3 files changed, 67 insertions(+), 2 deletions(-) diff

[PATCH v12 08/10] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm

[PATCH v12 07/10] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24

[PATCH v12 04/10] mtd: intel-dg: register with mtd

Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 228 - 1 file changed, 224 insertions(+), 4

[PATCH v12 03/10] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Reviewed-by: Raag Jadav Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin

[PATCH v11 10/10] drm/xe/nvm: add support for non-posted erase

Signed-off-by: Reuven Abliyev Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/xe_nvm.c| 25 ++ drivers/mtd/devices/mtd_intel_dg.c | 42 -- include/linux/intel_dg_nvm_aux.h | 2 ++ 3 files changed, 67 insertions(+), 2 deletions(-) diff

[PATCH v11 09/10] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++ drivers/gpu/drm/xe/xe_heci_gsc.c | 5

[PATCH v11 07/10] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24

[PATCH v11 08/10] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm

[PATCH v11 06/10] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander

[PATCH v11 05/10] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 35 ++ 1 file changed, 35 insertions

[PATCH v11 04/10] mtd: intel-dg: register with mtd

-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 228 - 1 file changed, 224 insertions(+), 4 deletions(-) diff --git a

[PATCH v11 03/10] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Reviewed-by: Raag Jadav Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin

[PATCH v11 02/10] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/mtd

[PATCH v11 01/10] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Raag Jadav Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS

[PATCH v11 00/10] mtd: add driver for Intel discrete graphics

agement patch, it will be merged lately after master device patch is propagated. Rebase over drm-tip. V11: Fix review comments. Add reviewed-by. Add cleanup in error path. Add PADDING region that exists on some BMG devices. Alexander Usyskin (9): mtd: add driver for intel gra

[PATCH v10 10/10] drm/xe/nvm: add support for non-posted erase

Signed-off-by: Reuven Abliyev Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/xe_nvm.c| 25 ++ drivers/mtd/devices/mtd_intel_dg.c | 42 -- include/linux/intel_dg_nvm_aux.h | 2 ++ 3 files changed, 67 insertions(+), 2 deletions(-) diff

[PATCH v10 09/10] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++ drivers/gpu/drm/xe/xe_heci_gsc.c | 5

[PATCH v10 08/10] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm

[PATCH v10 06/10] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander

[PATCH v10 04/10] mtd: intel-dg: register with mtd

-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 230 - 1 file changed, 226 insertions(+), 4 deletions(-) diff --git a

[PATCH v10 07/10] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24

[PATCH v10 05/10] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 35 ++ 1 file changed, 35 insertions

[PATCH v10 03/10] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices

[PATCH v10 02/10] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/mtd

[PATCH v10 01/10] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS| 7

[PATCH v10 00/10] mtd: add driver for Intel discrete graphics

agement patch, it will be merged lately after master device patch is propagated. Rebase over drm-tip. Alexander Usyskin (9): mtd: add driver for intel graphics non-volatile memory device mtd: intel-dg: implement region enumeration mtd: intel-dg: implement access functions mtd: intel

[PATCH v9 03/12] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/mtd

[PATCH v9 11/12] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++ drivers/gpu/drm/xe/xe_heci_gsc.c | 5

[PATCH v9 00/12] mtd: add driver for Intel discrete graphics

nder master device, if requested and configure parent of usual partitions to this partition. Rebase over drm-tip. V9: Fix checkpatch warning on non-posted erase patch. Add Rodrigo's review and ack. Alexander Usyskin (11): mtd: core: always create master device mtd: add driver

[PATCH v9 12/12] drm/xe/nvm: add support for non-posted erase

Signed-off-by: Reuven Abliyev Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/xe_nvm.c| 25 + drivers/mtd/devices/mtd_intel_dg.c | 43 -- include/linux/intel_dg_nvm_aux.h | 2 ++ 3 files changed, 68 insertions(+), 2 deletions(-) diff

[PATCH v9 10/12] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm

[PATCH v9 09/12] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24

[PATCH v9 08/12] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander

[PATCH v9 04/12] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices

[PATCH v9 07/12] mtd: intel-dg: wake card on operations

Enable runtime PM in mtd driver to notify graphics driver that whole card should be kept awake while nvm operations are performed through this driver. CC: Lucas De Marchi Acked-by: Karthik Poosa Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c

[PATCH v9 05/12] mtd: intel-dg: register with mtd

-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 230 - 1 file changed, 226 insertions(+), 4 deletions(-) diff --git a

[PATCH v9 06/12] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 35 ++ 1 file changed, 35 insertions

[PATCH v9 02/12] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS| 7

[PATCH v9 01/12] mtd: core: always create master device

Create master device without partition when CONFIG_MTD_PARTITIONED_MASTER flag is unset. This streamlines device tree and allows to anchor runtime power management on master device in all cases. Signed-off-by: Alexander Usyskin --- drivers/mtd/mtdchar.c | 2 +- drivers/mtd/mtdcore.c

[PATCH v8 10/12] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c

[PATCH v8 01/12] mtd: core: always create master device

Create master device without partition when CONFIG_MTD_PARTITIONED_MASTER flag is unset. This streamlines device tree and allows to anchor runtime power management on master device in all cases. Signed-off-by: Alexander Usyskin --- drivers/mtd/mtdchar.c | 2 +- drivers/mtd/mtdcore.c

[PATCH v8 04/12] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices

[PATCH v8 08/12] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm

[PATCH v8 03/12] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/mtd

[PATCH v8 11/12] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++ drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +--- drivers/gpu/drm/xe

[PATCH v8 12/12] drm/xe/nvm: add support for non-posted erase

ned-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/xe_nvm.c| 25 + drivers/mtd/devices/mtd_intel_dg.c | 43 -- include/linux/intel_dg_nvm_aux.h | 2 ++ 3 files changed, 68 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_nvm.c b/d

[PATCH v8 05/12] mtd: intel-dg: register with mtd

-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 230 - 1 file changed, 226 insertions(+), 4 deletions(-) diff --git a

[PATCH v8 09/12] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24 insertions(+), 1 deletion

[PATCH v8 06/12] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 35 ++ 1 file changed, 35 insertions

[PATCH v8 07/12] mtd: intel-dg: wake card on operations

Enable runtime PM in mtd driver to notify graphics driver that whole card should be kept awake while nvm operations are performed through this driver. CC: Lucas De Marchi Acked-by: Karthik Poosa Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c

[PATCH v8 02/12] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS| 7

[PATCH v8 00/12] mtd: add driver for Intel discrete graphics

nder master device, if requested and configure parent of usual partitions to this partition. Rebase over drm-tip. Abliyev, Reuven (1): drm/xe/nvm: add support for non-posted erase Alexander Usyskin (11): mtd: core: always create master device mtd: add driver for intel graphics no

[PATCH v7 10/12] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c

[PATCH v7 09/12] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24 insertions(+), 1 deletion

[PATCH v7 03/12] mtd: intel-dg: implement region enumeration

In intel-dg, there is no access to the spi controller, the information is extracted from the descriptor region. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/mtd

[PATCH v7 01/12] mtd: core: always create master device

Create master device without partition when CONFIG_MTD_PARTITIONED_MASTER flag is unset. This streamlines device tree and allows to anchor runtime power management on master device in all cases. Signed-off-by: Alexander Usyskin --- drivers/mtd/mtdcore.c | 141

[PATCH v7 12/12] drm/xe/nvm: add support for non-posted erase

ned-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/xe_nvm.c| 25 + drivers/mtd/devices/mtd_intel_dg.c | 43 -- include/linux/intel_dg_nvm_aux.h | 2 ++ 3 files changed, 68 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_nvm.c b/d

[PATCH v7 11/12] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++ drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +--- drivers/gpu/drm/xe

[PATCH v7 08/12] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm

[PATCH v7 07/12] mtd: intel-dg: wake card on operations

Enable runtime PM in mtd driver to notify graphics driver that whole card should be kept awake while nvm operations are performed through this driver. CC: Lucas De Marchi Acked-by: Karthik Poosa Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c

[PATCH v7 06/12] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 35 ++ 1 file changed, 35 insertions

[PATCH v7 05/12] mtd: intel-dg: register with mtd

-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 230 - 1 file changed, 226 insertions(+), 4 deletions(-) diff --git a

[PATCH v7 04/12] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices

[PATCH v7 02/12] mtd: add driver for intel graphics non-volatile memory device

Add auxiliary driver for intel discrete graphics non-volatile memory device. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- MAINTAINERS| 7

[PATCH v7 00/12] mtd: add driver for Intel discrete graphics

er latest drm-xe-next Add ack's V6: Fix master device release (use rigth idr in release) Rebase over latest drm-xe-next Grammar and style fixes V7: Add patch with non-posted erase support (fix hang on BMG) Rebase over latest drm-xe-next Abliyev, Reuven (1): drm/xe/nvm: add

[PATCH v6 09/11] drm/i915/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/i915/intel_nvm.c | 25 - 1 file changed, 24 insertions(+), 1 deletion

[PATCH v6 11/11] drm/xe/nvm: add support for access mode

Check NVM access mode from GSC FW status registers and overwrite access status read from SPI descriptor, if needed. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/regs/xe_gsc_regs.h | 4 +++ drivers/gpu/drm/xe/xe_heci_gsc.c | 5 +--- drivers/gpu/drm/xe

[PATCH v6 10/11] drm/xe/nvm: add on-die non-volatile memory device

Enable access to internal non-volatile memory on DGFX with GSC/CSC devices via a child device. The nvm child device is exposed via auxiliary bus. Reviewed-by: Rodrigo Vivi Signed-off-by: Alexander Usyskin --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_device.c

[PATCH v6 08/11] drm/i915/nvm: add nvm device for discrete graphics

Enable access to internal non-volatile memory on DGFX devices via a child device. The nvm child device is exposed via auxiliary bus. CC: Lucas De Marchi Reviewed-by: Rodrigo Vivi Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Signed-off-by: Alexander Usyskin --- drivers/gpu/drm

[PATCH v6 07/11] mtd: intel-dg: wake card on operations

Enable runtime PM in mtd driver to notify graphics driver that whole card should be kept awake while nvm operations are performed through this driver. CC: Lucas De Marchi Acked-by: Karthik Poosa Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c

[PATCH v6 06/11] mtd: intel-dg: align 64bit read and write

GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Acked-by: Miquel Raynal Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 35 ++ 1 file changed, 35 insertions

[PATCH v6 05/11] mtd: intel-dg: register with mtd

-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd_intel_dg.c | 230 - 1 file changed, 226 insertions(+), 4 deletions(-) diff --git a

[PATCH v6 04/11] mtd: intel-dg: implement access functions

Implement read(), erase() and write() functions. CC: Lucas De Marchi CC: Rodrigo Vivi Acked-by: Miquel Raynal Co-developed-by: Tomas Winkler Signed-off-by: Tomas Winkler Co-developed-by: Vitaly Lubart Signed-off-by: Vitaly Lubart Signed-off-by: Alexander Usyskin --- drivers/mtd/devices

  1   2   3   >