Document the ddc-i2c-bus property used by imx-ldb driver to read EDID
information via I2C interface.
Signed-off-by: Akshay Bhat
---
v3:
Newly added.
Documentation/devicetree/bindings/display/imx/ldb.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings
From: Steve Longerbeam
Add support for reading EDID over Display Data Channel. If no DDC
adapter is available, falls back to hardcoded EDID or display-timings
node as before.
Signed-off-by: Steve Longerbeam
Signed-off-by: Akshay Bhat
Acked-by: Philipp Zabel
---
Hi Philipp,
I have addressed
From: Steve Longerbeam
Add support for reading EDID over Display Data Channel. If no DDC
adapter is available, falls back to hardcoded EDID or display-timings
node as before.
Signed-off-by: Steve Longerbeam
Signed-off-by: Akshay Bhat
Acked-by: Philipp Zabel
---
Hi Philipp,
I found this
Set hsync/vsync to active low for g121x1_l03 panel to match the
recommended setting in datasheet.
Signed-off-by: Akshay Bhat
---
drivers/gpu/drm/panel/panel-simple.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
Hi Daniel,
On 02/09/2016 04:28 PM, Daniel Stone wrote:
> Hi Akshay,
>
> On 1 February 2016 at 19:02, Akshay Bhat wrote:
>> On 02/01/2016 07:11 AM, Liviu Dudau wrote:
>>> On Fri, Jan 29, 2016 at 05:12:28PM -0500, Akshay Bhat wrote:
>>>> On 01/28/2016 05:29 PM,
On 02/01/2016 07:11 AM, Liviu Dudau wrote:
> On Fri, Jan 29, 2016 at 05:12:28PM -0500, Akshay Bhat wrote:
>>
>>
>> On 01/28/2016 05:29 PM, Rob Clark wrote:
>>> can't really say if that is the issue in this case, but these are the
>>> symptoms you'
x-drm display-subsystem: bound
200.aips-bus:ldb at 020e0008 (ops imx_ldb_ops)
[1.902172] imx-drm display-subsystem: fb0: frame buffer device
[1.929283] [drm] Initialized imx-drm 1.0.0 20120507 on minor 1
> On Thu, Jan 28, 2016 at 2:56 PM, Akshay Bhat
> wrote:
>> Hi,
Hi,
There appears to be a bug in kernel where after a probe deferral by the
drm driver, the deferred drm function is never called again at a later
point.
I have a iMX6 based board where there is pca9547 i2c mux between the
display and the mx6 processor. The drm driver tries to get EDID
inform
Add support for Innolux CheMei 12" G121X1-L03 XGA LVDS display.
Datasheet: http://www.azdisplays.com/PDF/G121X1-L03.pdf
Signed-off-by: Akshay Bhat
---
.../bindings/display/panel/innolux,g121x1-l03.txt | 7 +
drivers/gpu/drm/panel/panel-simple.c | 31
On 10/21/2015 02:03 PM, Fabio Estevam wrote:
> On Wed, Oct 21, 2015 at 3:47 PM, Akshay Bhat
> wrote:
>
>> Currently on our setup since LVDS and HDMI use the same IPU, there are clock
>> conflicts at 1080p when setting DI frequency resulting in HDMI display not
>>
On 10/21/2015 05:54 AM, Lucas Stach wrote:
> Am Dienstag, den 20.10.2015, 10:22 -0400 schrieb Akshay Bhat:
>> Hi,
>>
>> We are trying to use IPU2 DI0 for LVDS and IPU1 DI0 for HDMI on a iMX6Q
>> based board. Below is the ldb entry in device tree and with these
>>
Hi,
We are trying to use IPU2 DI0 for LVDS and IPU1 DI0 for HDMI on a iMX6Q
based board. Below is the ldb entry in device tree and with these
settings the LVDS is still being mapped to IPU1. Is there something
missing/incorrect in the dts entry? The board is running 4.3-rc5 kernel.
&ldb {
Hi,
We are trying to use IPU2 DI0 for LVDS and IPU1 DI0 for HDMI on a iMX6Q
based board. Below is the ldb entry in device tree and with these settings
the LVDS is still being mapped to IPU1. Is there something
missing/incorrect in the dts entry? The board is running 4.3-rc5 kernel.
&ldb {
assigne
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