On Thu, Jun 19, 2025 at 5:13 PM Jakub Kicinski wrote:
>
> On Wed, 18 Jun 2025 10:24:13 -0400 Jeff Layton wrote:
> > For those just joining in, this series adds a new top-level
> > "ref_tracker" debugfs directory, and has each ref_tracker_dir register a
> > file in there as part of its initializati
From: Yumeng Fang
Remove hard-coded strings by using the str_on_off() helper.
Signed-off-by: Yumeng Fang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c | 3 ++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdg
Hi Oscar,
> Subject: Re: [PATCH] mm/hugetlb: Don't crash when allocating a folio if there
> are no resv
>
> On Tue, Jun 17, 2025 at 10:28:40PM -0700, Vivek Kasireddy wrote:
> > There are cases when we try to pin a folio but discover that it has
> > not been faulted-in. So, we try to allocate it i
On 11/6/25 11:55, Alexey Kardashevskiy wrote:
Hi,
Is there a QEMU tree using this somewhere?
Ping? Thanks,
Also it would be nice to have this tree pushed somewhere, saves time. Thanks,
On 29/5/25 15:34, Xu Yilun wrote:
This series is the generic host side (KVM/VFIO/IOMMUFD) supp
It allows us to get rid of manual try_module_get / module_put.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_drv.c | 14 +++---
1 file changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_drv.c
b/drivers/gpu/drm/panthor/panthor_drv.c
ind
It is useful to know which tasks cause gpu errors.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_sched.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/panthor/panthor_sched.c
b/drivers/gpu/drm/panthor/panthor_sched.
We would like to report them on gpu errors.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_device.h | 6 ++
drivers/gpu/drm/panthor/panthor_drv.c| 9 +
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/panthor/panthor_device.h
b/drivers/gpu/drm/pantho
We would like to access panthor_file from panthor_group on gpu errors.
Because panthour_group can outlive drm_file, add refcount to
panthor_file to ensure its lifetime.
Signed-off-by: Chia-I Wu
---
drivers/gpu/drm/panthor/panthor_device.h | 16
drivers/gpu/drm/panthor/panthor_dr
This series saves task pid and comm in panthor_file, ensures panthor_group can
access panthor_file, and prints task pid and comm on gpu errors.
Chia-I Wu (4):
panthor: set owner field for driver fops
panthor: save panthor_file in panthor_group
panthor: save task pid and comm in panthor_file
On 6/20/2025 3:45 AM, Thomas Zimmermann wrote:
Hi
Am 20.06.25 um 04:49 schrieb Mario Limonciello:
From: Mario Limonciello
The x86 specific check for whether a framebuffer belongs to a device
works for display devices as well as VGA devices. Callers to
video_is_primary_device() can benefit fr
On 6/20/25 08:54, Akhil P Oommen wrote:
Add support for X1-45 GPU found in X1P41200 chipset (8 cpu core
version). X1-45 is a smaller version of X1-85 with lower core count and
smaller memories. From UMD perspective, this is similar to "FD735"
present in Mesa.
Tested Glmark & Vkmark on Debian G
On 20.06.25 08:54, Akhil P Oommen wrote:
Add support for X1-45 GPU found in X1P41200 chipset (8 cpu core
version). X1-45 is a smaller version of X1-85 with lower core count and
smaller memories. From UMD perspective, this is similar to "FD735"
present in Mesa.
Tested Glmark & Vkmark on Debian Gn
On Fri, Jun 20, 2025 at 8:27 AM Maxime Ripard wrote:
> Hi,
>
> On Thu, Jun 19, 2025 at 02:15:56PM -0500, Anusha Srivatsa wrote:
> > Put the panel reference back when driver is no
> > longer using it.
> >
> > Signed-off-by: Anusha Srivatsa
>
> When I asked you to provide a rationale for why you t
On Fri, Jun 20, 2025 at 4:11 AM Maxime Ripard wrote:
> On Fri, Jun 20, 2025 at 10:33:53AM +0200, Luca Ceresoli wrote:
> > Hello Anusha,
> >
> > On Thu, 19 Jun 2025 14:15:53 -0500
> > Anusha Srivatsa wrote:
> >
> > > Take the panel reference and put it back as required.
> > > drm_panel_add() and
Am Mittwoch, dem 18.06.2025 um 22:43 +0200 schrieb Gert Wollny:
> Signed-off-by: Gert Wollny
> ---
> drivers/gpu/drm/etnaviv/etnaviv_flop_reset.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_flop_reset.c
> b/drivers/gpu/drm/etnaviv/etnaviv_fl
Am Mittwoch, dem 18.06.2025 um 22:43 +0200 schrieb Gert Wollny:
> The PPU flop reset is required on some hardware to clear the
> temporary registers. This implementation follows the code
> implemented in the public galcore kernel module code to this
> for the PPU.
>
> v2: - Move flop reset data to
On Sun, 18 May 2025 22:54:10 +, Jonas Karlman wrote:
> This series adds support for the Mali-450 MP2 GPU in the RK3528 SoC.
>
> The clock used for the GPU can use normal PLL to support a rate of 100,
> 300 or 500 MHz. Or it can use PVTPLL to reach rates up to 800 MHz.
>
> The TF-A SCMI_CLK_
Am Mittwoch, dem 18.06.2025 um 22:43 +0200 schrieb Gert Wollny:
> This is required to know whether to be able to avoid allocating
> the flop reset data if non of the available GPUs actually need
> it.
>
I'm surprised that this works on your platform at all. You can not move
the identification here
The current pipe switch sequence is ported from the Vivante driver,
which does flush some caches before switching to another pipe. This
however, is not necessary with etnaviv, as we always flush all write
caches before completion of a cmdstream. Thus the caches are already
clean before execution of
The downstream driver switched from only disabling internal DFS on those
cores to clearing bit 16 and setting bit 17 in commit "MGS-3448: gpu-viv:
fix 6.2.4 remaning issues". This, as far as is known, completely disables
the pulse eater.
Signed-off-by: Lucas Stach
---
drivers/gpu/drm/etnaviv/etn
It seems this bit is sticky across the reset. The downstream driver
pulses this bit on and off in the reset sequence, which had been
missed when porting this part over from the Vivante driver.
While no bad behavior has been observed when the bit is active after
reset, better be safe than sorry and
While the Vivante driver also claims to disable clock gating during reset
(in reality it doesn't because it clears the wrong register and *enables*
clock gating for all modules), it has been shown that switching the clock
gating enable state in the reset sequence has made the GPU reset less
reliabl
On Thu, Jun 19, 2025 at 05:20:25PM +1000, Dave Airlie wrote:
> From: Dave Airlie
>
> While discussing memcg intergration with gpu memory allocations,
> it was pointed out that there was no numa/system counters for
> GPU memory allocations.
>
> With more integrated memory GPU server systems turni
For UNMAP/REMAP steps we could be needing to lock objects that are not
explicitly listed in the VM_BIND ioctl in order to tear-down unmapped
VAs. These helpers handle locking/preparing the needed objects.
Note that these functions do not strictly require the VM changes to be
applied before the ne
Hi
Am 20.06.25 um 12:31 schrieb Luca Weiss:
Some devices might require keeping an interconnect path alive so that
the framebuffer continues working. Add support for that by setting the
bandwidth requirements appropriately for all provided interconnect
paths.
Signed-off-by: Luca Weiss
---
dri
Hi
Am 20.06.25 um 12:31 schrieb Luca Weiss:
Some devices might require keeping an interconnect path alive so that
the framebuffer continues working. Add support for that by setting the
bandwidth requirements appropriately for all provided interconnect
paths.
Signed-off-by: Luca Weiss
---
dri
drm_bridge_chain_get_first_bridge() returns a bridge pointer that the
caller could hold for a long time. Increment the refcount of the returned
bridge and document it must be put by the caller.
Reviewed-by: Maxime Ripard
Signed-off-by: Luca Ceresoli
---
This patch was added in v7.
---
include/
The bridge returned by drm_bridge_chain_get_first_bridge() is
refcounted. Put it when done.
Reviewed-by: Maxime Ripard
Signed-off-by: Luca Ceresoli
---
This patch was added in v7.
---
drivers/gpu/drm/drm_probe_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/drm_pro
Many functions get a drm_bridge pointer, only use it in the function body
(or a smaller scope such as a loop body), and don't store it. In these
cases they always need to drm_bridge_put() it before returning (or exiting
the scope).
Some of those functions have complex code paths with multiple retu
On Tue, 17 Jun 2025 11:56:11 -0700, Randy Dunlap wrote:
> Add header to pull in readl/writel and friends.
> This eliminates the following build errors:
>
> drivers/gpu/drm/msm/dp/dp_panel.c: In function 'msm_dp_read_link':
> drivers/gpu/drm/msm/dp/dp_panel.c:33:16: error: implicit declaration o
On Wed, 18 Jun 2025 16:32:29 +0200, Krzysztof Kozlowski wrote:
> Dependency / Rabased on top of
> ==
> https://lore.kernel.org/r/20250522-dpu-drop-features-v5-0-3b2085a07...@oss.qualcomm.com/
>
> Changes in v7:
> =
> - Add ack/rb tags
> - Drop unrelated DS
On Tue, 10 Jun 2025 14:50:03 +0200, Konrad Dybcio wrote:
> Based on the downstream release, predictably same value as for SM8150.
>
>
Applied, thanks!
[1/1] drm/msm/dpu: Fill in min_prefill_lines for SC8180X
https://gitlab.freedesktop.org/lumag/msm/-/commit/457fad6dee5e
Best regards,
-
On Sun, 18 May 2025 14:21:33 +0300, Dmitry Baryshkov wrote:
> Rework most of the register programming functions to be local to the
> calling module rather than accessing everything through huge dp_catalog
> monster.
>
>
Applied, thanks!
[01/11] drm/msm/dp: split MMSS_DP_DSC_DTO register write
On Thu, 22 May 2025 22:03:19 +0300, Dmitry Baryshkov wrote:
> Some time ago we started the process of converting HW blocks to use
> revision-based checks instead of having feature bits (which are easy to
> miss or to set incorrectly). Then the process of such a conversion was
> postponed. (Mostly
Correctly summerize drm_gpuvm_sm_map/unmap, and fix the parameter order
and names. Just something I noticed in passing.
v2: Don't rename the arg names in prototypes to match function
declarations [Danilo]
Signed-off-by: Rob Clark
Acked-by: Danilo Krummrich
---
drivers/gpu/drm/drm_gpuvm.c
First patch is just some cleanup. The second patch adds helpers for
drivers to deal with "invisible" unmapped BO locking. Ie. a VM_BIND
ioctl won't explicitly list BOs associated with unmapped/remapped VAs
making locking all the BOs involved in a VM_BIND ioclt harder than it
needs to be. The hel
Hi Luca,
On Fri, Jun 20, 2025 at 11:32:08AM +0200, Luca Ceresoli wrote:
> To the best of my knowledge, all drivers in the mainline kernel adding a
> DRM bridge are now converted to using devm_drm_bridge_alloc() for
> allocation and initialization. Among others this ensures initialization of
> the
From: Baihan Li
Add colorbar disable operation and move hdcp opreation behind the reset
controller operation.
Fixes: 3c7623fb5bb6 ("drm/hisilicon/hibmc: Enable this hot plug detect of irq
feature")
Fixes: 94ee73ee3020 ("drm/hisilicon/hibmc: add dp hw moduel in hibmc driver")
Signed-off-by: Baih
On 19 Jun 2025, at 3:20, Dave Airlie wrote:
> From: Dave Airlie
>
> While discussing memcg intergration with gpu memory allocations,
> it was pointed out that there was no numa/system counters for
> GPU memory allocations.
>
> With more integrated memory GPU server systems turning up, and
> more
s changed, 19 insertions(+), 3 deletions(-)
---
base-commit: a59a271769149f0b8258507276f3d2a24370cbdb
change-id:
20250620-drm-bridge-alloc-getput-drm_bridge_chain_get_first_bridge-be39c442dcd6
Best regards,
--
Luca Ceresoli
Hi Beata,
> There is no concurrent access nor shared references, unless the
> handler decides otherwise
It can’t do so in safe code. There is no way to manufacture a shared
reference from a mutable one in safe code and if it passes that to C, then
it’s already using a unsafe block for the ffi ca
On Thu, Jun 19, 2025 at 09:30:19AM -0300, Daniel Almeida wrote:
> Hi Beata,
>
> > On 19 Jun 2025, at 07:21, Beata Michalska wrote:
> >
> > With the Opaque, the expectations are that Rust should not make any
> > assumptions on the layout or invariants of the wrapped C types.
> > That runs rather
On Tue, Jun 17, 2025 at 4:48 AM Lorenzo Stoakes wrote:
>
> Since commit c84bf6dd2b83 ("mm: introduce new .mmap_prepare() file
> callback"), the f_op->mmap() hook has been deprecated in favour of
> f_op->mmap_prepare().
>
> This callback is invoked in the mmap() logic far earlier, so error handling
On Thu, Apr 3, 2025 at 9:48 AM Jim Cromie wrote:
>
\snip
>
> -static void ddebug_match_apply_kparam(const struct kernel_param *kp,
> - const struct _ddebug_class_map *map,
> - const char *mod_name)
> +static struct _ddebug_c
On Thu, Jun 19, 2025 at 03:27:18PM +0300, Tomi Valkeinen wrote:
> The commit c9b1150a68d9 ("drm/atomic-helper: Re-order bridge chain
> pre-enable and post-disable") changed the order of enable/disable calls.
> Previously the calls (on imx8mm) were:
>
> mxsfb_crtc_atomic_enable()
> samsung_dsim_ato
On Thu, Jun 19, 2025 at 12:55:08PM +0200, Danilo Krummrich wrote:
> On Thu, Jun 19, 2025 at 12:21:02PM +0200, Beata Michalska wrote:
> > With the Opaque, the expectations are that Rust should not make any
> > assumptions on the layout or invariants of the wrapped C types.
> > That runs rather count
On Thu, Jun 19, 2025 at 03:17:31PM +0200, Benno Lossin wrote:
> On Thu Jun 19, 2025 at 2:26 PM CEST, Daniel Almeida wrote:
> > Hi Benno,
> >
> >> On 19 Jun 2025, at 08:01, Benno Lossin wrote:
> >>
> >> On Thu Jun 19, 2025 at 12:55 PM CEST, Danilo Krummrich wrote:
> >>> On Thu, Jun 19, 2025 at 12:
With the Opaque, the expectations are that Rust should not make any
assumptions on the layout or invariants of the wrapped C types.
That runs rather counter to ioctl arguments, which must adhere to
certain data-layout constraints. By using Opaque, ioctl handlers
end up doing unsound castings, which
The bridge returned by drm_bridge_chain_get_first_bridge() is
refcounted. Put it when done. Use a scope-based free action to catch all
the code paths.
Reviewed-by: Maxime Ripard
Signed-off-by: Luca Ceresoli
---
This patch was added in v7.
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 3 ++-
1 file c
The bridge returned by drm_bridge_chain_get_first_bridge() is
refcounted. Put it when done.
Signed-off-by: Luca Ceresoli
---
Changes in v8:
- reworked after the changes in pre_enable/post_disable order:
f6ee26f58870 ("drm/atomic-helper: Refactor crtc & encoder-bridge op loops
into separate fu
From: Baihan Li
Currently the driver missed to clean the i2c adapter when vdac init failed.
It may cause resource leak.
Fixes: a0d078d06e516 ("drm/hisilicon: Features to support reading resolutions
from EDID")
Signed-off-by: Baihan Li
Signed-off-by: Yongbang Shi
---
ChangeLog:
v1 -> v2:
- u
On Mon, Jun 16, 2025 at 12:42:53PM +0200, Simona Vetter wrote:
> On Mon, Jun 16, 2025 at 09:24:38AM +0200, Christian König wrote:
> > On 6/13/25 21:11, Matthew Brost wrote:
> > > On Fri, Jun 13, 2025 at 07:26:22PM +0200, Christian König wrote:
> > >> On 6/13/25 19:01, Matthew Brost wrote:
> > >>> A
On 20-06-2025 19:19, Rodrigo Vivi wrote:
On Thu, Jun 19, 2025 at 12:30:04AM +0530, Badal Nilawar wrote:
Reload late binding fw during S2Idle/S3 resume.
Signed-off-by: Badal Nilawar
---
drivers/gpu/drm/xe/xe_pm.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_
Hi Maxime,
On Fri, 20 Jun 2025 13:41:48 +0200
Maxime Ripard wrote:
> Hi Luca,
>
> On Fri, Jun 20, 2025 at 11:32:08AM +0200, Luca Ceresoli wrote:
> > To the best of my knowledge, all drivers in the mainline kernel adding a
> > DRM bridge are now converted to using devm_drm_bridge_alloc() for
> >
From: Bartosz Golaszewski
As of commit 92ac7de3175e3 ("gpiolib: don't allow setting values on input
lines"), the GPIO core makes sure values cannot be set on input lines.
Remove the unnecessary check.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 5 -
1 fil
drm_bridge_attach() adds the bridge to the encoder chain, so take a
reference for that. Vice versa in drm_bridge_detach().
Reviewed-by: Maxime Ripard
Signed-off-by: Luca Ceresoli
---
Changes in v9: none
Changes in v8: none
Changes in v7:
- in v6 this was part of "drm/bridge: add support for re
To the best of my knowledge, all drivers in the mainline kernel adding a
DRM bridge are now converted to using devm_drm_bridge_alloc() for
allocation and initialization. Among others this ensures initialization of
the bridge refcount, allowing dynamic allocation lifetime.
devm_drm_bridge_alloc() i
drm_bridge_add() adds the bridge to the global bridge_list, so take a
reference for that. Vice versa in drm_bridge_remove().
Reviewed-by: Maxime Ripard
Signed-off-by: Luca Ceresoli
---
Changes in v9: none
Changes in v8: none
Changes in v7:
- in v6 this was part of "drm/bridge: add support for
c3...@bootlin.com/t/#u
[2]
https://lore.kernel.org/all/20250314-drm-bridge-refcount-v7-0-152571f8c...@bootlin.com/
Signed-off-by: Luca Ceresoli
---
Changes in v9:
- patch 3: change warning trigger from "refcount != 1" to "container not NULL"
- Link to v8 (counted as v1 by mistake):
On 6/20/25 3:47 AM, Thomas Zimmermann wrote:
Hi
Am 20.06.25 um 04:49 schrieb Mario Limonciello:
From: Mario Limonciello
Knowing which device is the primary device can be useful for userspace
to make decisions on which device to start a display server.
Create a link to that device called 'pri
On 6/20/25 8:54 AM, Akhil P Oommen wrote:
> X1P42100 SoC has a new GPU called Adreno X1-45 which is a smaller
> version of Adreno X1-85 GPU. Describe this new GPU and also add
> the secure gpu firmware path that should used for X1P42100 CRD.
>
> Tested-by: Jens Glathe
> Signed-off-by: Akhil P Oom
Hi Lukas,
I was going to try testing this out, but it doesn't look functional. See
below.
On 16/05/2025 16:49, Lukas Zapolskas wrote:
[...]
> diff --git a/drivers/gpu/drm/panthor/panthor_perf.c
> b/drivers/gpu/drm/panthor/panthor_perf.c
> index 9365ce9fed04..15fa533731f3 100644
> --- a/drivers/g
All 5 patches push to drm-misc-next.
Thanks,
Steve
On 09/05/2025 11:12, Louis-Alexis Eyraud wrote:
> This patchset adds the support of the ARM Mali G57 MC2 GPU (Valhall-JM,
> dual core), integrated in the Mediatek MT8370 SoC, to the panfrost
> driver and to the mt8370.dtsi include file.
>
> Sinc
Not something that is likely to be scanned out, but GPUs usually support
half-float formats with 1, 2, or possibly 3 components, and it is useful
to be able to import/export them with a valid fourcc, and/or use gbm to
create them.
These correspond to PIPE_FORMAT_{R16,R16G16,R16G16B16}_FLOAT in mes
GPUs support 1/2/3/4 component f16 and f32 formats. Define the missing
fourcc's needed to import/export these formats, and/or create with gbm.
Rob Clark (2):
drm/fourcc: Add missing half-float formats
drm/fourcc: Add 32b float formats
include/uapi/drm/drm_fourcc.h | 16 +++-
1 f
Add 1, 2, 3, and 4 component 32b float formats, so that buffers with
these formats can be imported/exported with fourcc+modifier, and/or
created by gbm.
These correspond to PIPE_FORMAT_{R32,R32G32,R32G32B32,R32G32B32A32}_FLOAT
in mesa.
Signed-off-by: Rob Clark
---
include/uapi/drm/drm_fourcc.h
From: Arnd Bergmann
The driver started using readl/writel, which are defined in linux/io.h,
so this needs to be included here:
drivers/gpu/drm/msm/dp/dp_panel.c:33:9: error: call to undeclared function
'readl_relaxed'; ISO C99 and later do not support implicit function
declarations [-Wimplicit
On Thu, Jun 19, 2025 at 12:21:10PM +0530, Nilawar, Badal wrote:
>
> On 19-06-2025 02:49, Daniele Ceraolo Spurio wrote:
> >
> >
> > On 6/18/2025 12:00 PM, Badal Nilawar wrote:
> > > Introduce a debug filesystem node to disable late binding fw reload
> > > during the system or runtime resume. This
On Thu, Jun 19, 2025 at 12:30:04AM +0530, Badal Nilawar wrote:
> Reload late binding fw during S2Idle/S3 resume.
>
> Signed-off-by: Badal Nilawar
> ---
> drivers/gpu/drm/xe/xe_pm.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.
On 25-06-20 14:47:43, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> The driver started using readl/writel, which are defined in linux/io.h,
> so this needs to be included here:
>
> drivers/gpu/drm/msm/dp/dp_panel.c:33:9: error: call to undeclared function
> 'readl_relaxed'; ISO C99 and later d
Hi,
On Thu, Jun 19, 2025 at 02:15:56PM -0500, Anusha Srivatsa wrote:
> Put the panel reference back when driver is no
> longer using it.
>
> Signed-off-by: Anusha Srivatsa
When I asked you to provide a rationale for why you think the
drm_panel_put() call belonged where it does, it was pretty ob
On Fri Jun 20, 2025 at 2:36 PM CEST, Thomas Zimmermann wrote:
> Hi
>
> Am 20.06.25 um 14:07 schrieb Luca Weiss:
>> On Fri Jun 20, 2025 at 1:28 PM CEST, Thomas Zimmermann wrote:
>>> Hi
>>>
>>> Am 20.06.25 um 13:07 schrieb Luca Weiss:
Hi Thomas,
On Fri Jun 20, 2025 at 1:02 PM CEST, Tho
On 13/06/2025 08:15, Sunil Khatri wrote:
root@amd-X570-AORUS-ELITE:~# cat /sys/kernel/debug/dri/0/clients
command tgid dev master a uid magic
name client-id
systemd-logind 1056 0 yy 0
Hi
Am 20.06.25 um 14:07 schrieb Luca Weiss:
On Fri Jun 20, 2025 at 1:28 PM CEST, Thomas Zimmermann wrote:
Hi
Am 20.06.25 um 13:07 schrieb Luca Weiss:
Hi Thomas,
On Fri Jun 20, 2025 at 1:02 PM CEST, Thomas Zimmermann wrote:
Hi
Am 20.06.25 um 12:31 schrieb Luca Weiss:
Some devices might req
On Fri Jun 20, 2025 at 1:28 PM CEST, Thomas Zimmermann wrote:
> Hi
>
> Am 20.06.25 um 13:07 schrieb Luca Weiss:
>> Hi Thomas,
>>
>> On Fri Jun 20, 2025 at 1:02 PM CEST, Thomas Zimmermann wrote:
>>> Hi
>>>
>>> Am 20.06.25 um 12:31 schrieb Luca Weiss:
Some devices might require keeping an interc
From: Arnd Bergmann
When KMSAN is enabled, this function causes has a rather excessive stack usage:
drivers/gpu/drm/i915/display/skl_watermark.c:2977:1: error: stack frame size
(1432) exceeds limit (1408) in 'skl_compute_wm' [-Werror,-Wframe-larger-than]
This is apparently all caused by the va
From: Arnd Bergmann
The igt_vma_pin1() function has a rather high stack usage, which gets
in the way of reducing the default warning limit:
In file included from drivers/gpu/drm/i915/i915_vma.c:2285:
drivers/gpu/drm/i915/selftests/i915_vma.c:257:12: error: stack frame size
(1288) exceeds limit
Hi
Am 20.06.25 um 13:07 schrieb Luca Weiss:
Hi Thomas,
On Fri Jun 20, 2025 at 1:02 PM CEST, Thomas Zimmermann wrote:
Hi
Am 20.06.25 um 12:31 schrieb Luca Weiss:
Some devices might require keeping an interconnect path alive so that
the framebuffer continues working. Add support for that by se
Hi
Am 20.06.25 um 12:31 schrieb Luca Weiss:
Document the interconnects property which is a list of interconnect
paths that is used by the framebuffer and therefore needs to be kept
alive when the framebuffer is being used.
Signed-off-by: Luca Weiss
Acked-by: Thomas Zimmermann
Maybe also ge
From: Arnd Bergmann
An earlier patch fixed a build failure with clang, but I still see the
same problem with some configurations using gcc:
drivers/gpu/drm/i915/i915_pmu.c: In function 'config_mask':
include/linux/compiler_types.h:568:38: error: call to
'__compiletime_assert_462' declared with
Hi Thomas,
On Fri Jun 20, 2025 at 1:02 PM CEST, Thomas Zimmermann wrote:
> Hi
>
> Am 20.06.25 um 12:31 schrieb Luca Weiss:
>> Some devices might require keeping an interconnect path alive so that
>> the framebuffer continues working. Add support for that by setting the
>> bandwidth requirements ap
From: Baihan Li
Our chip support KVM over IP feature, so hibmc driver need to support
displaying without any connectors plugged in. Deleting the detect_ctx()
of VGA to make it connected when no connector is detected.
Fixes: 4c962bc929f1 ("drm/hisilicon/hibmc: Add vga connector detect functions")
> -Original Message-
> From: Kandpal, Suraj
> Sent: Monday, April 14, 2025 9:47 AM
> To: nouv...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org; intel-...@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Murthy, Arun R
> ; Kandpal, Suraj
> Subje
This is a note to let you know that I've just added the patch titled
dummycon: Trigger redraw when switching consoles with deferred takeover
to the 6.15-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of t
This is a note to let you know that I've just added the patch titled
dummycon: Trigger redraw when switching consoles with deferred takeover
to the 6.12-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of t
Some devices might require keeping an interconnect path alive so that
the framebuffer continues working. Add support for that by setting the
bandwidth requirements appropriately for all provided interconnect
paths.
Signed-off-by: Luca Weiss
---
drivers/gpu/drm/sysfb/simpledrm.c | 83
Some devices might require keeping an interconnect path alive so that
the framebuffer continues working. Add support for that by setting the
bandwidth requirements appropriately for all provided interconnect
paths.
Signed-off-by: Luca Weiss
---
Luca Weiss (3):
dt-bindings: display: simple-f
Some devices might require keeping an interconnect path alive so that
the framebuffer continues working. Add support for that by setting the
bandwidth requirements appropriately for all provided interconnect
paths.
Signed-off-by: Luca Weiss
---
drivers/video/fbdev/simplefb.c | 83 +++
Document the interconnects property which is a list of interconnect
paths that is used by the framebuffer and therefore needs to be kept
alive when the framebuffer is being used.
Signed-off-by: Luca Weiss
---
Documentation/devicetree/bindings/display/simple-framebuffer.yaml | 3 +++
1 file chang
Hello,
On Thu, Jun 05, 2025 at 07:44:19AM +0200, Uwe Kleine-König wrote:
> On Wed, Jun 04, 2025 at 11:09:15AM -0400, Alex Deucher wrote:
> > On Wed, Jun 4, 2025 at 10:55 AM Uwe Kleine-König
> > wrote:
> > >
> > > Hello Alex,
> > >
> > > On Wed, Jun 04, 2025 at 03:29:58PM +0200, Greg KH wrote:
> >
drm_bridge_add() adds the bridge to the global bridge_list, so take a
reference for that. Vice versa in drm_bridge_remove().
Reviewed-by: Maxime Ripard
Signed-off-by: Luca Ceresoli
---
Changes in v8: none
Changes in v7:
- in v6 this was part of "drm/bridge: add support for refcounted DRM
bri
From: Baihan Li
When hibmc loaded failed, the driver use hibmc_unload to free the
resource, but the mutexes in mode.config are not init, which will
access an NULL pointer. Just change goto statement to return, because
hibnc_hw_init() doesn't need to free anything.
Fixes: b3df5e65cc03 ("drm/hibmc
From: Baihan Li
If VGA and DP connected together, there will be only one can get crtc.
Add encoder possible_clones to support two connectors enable.
Fixes: 0ab6ea261c1f ("drm/hisilicon/hibmc: add dp module in hibmc")
Fixes: 3c7623fb5bb6 ("drm/hisilicon/hibmc: Enable this hot plug detect of irq
From: Baihan Li
When using command rmmod and insmod, there is no showing in second time
insmoding. Because DP controller won't send HPD signals, if connection
doesn't change or controller isn't reset. So add reset before unreset
in hibmc_dp_hw_init().
Fixes: 3c7623fb5bb6 ("drm/hisilicon/hibmc: E
From: Baihan Li
There are some bugfix for hibmc-drm driver.
---
ChangeLog:
v1 -> v2:
- use the hibmc_ddc_del() in hibmc_connector_destroy(), suggested by Dmitry
Baryshkov.
- fix the tag, suggested by Dmitry Baryshkov.
- don't use the flag, and use more checks in detect_ctx(), suggested by
From: Baihan Li
If DP is connected, add mode check and BW check in mode_valid_ctx() to
ensure DP's cfg is usable.
Fixes: f9698f802e50 ("drm/hisilicon/hibmc: Restructuring the header dp_reg.h")
Signed-off-by: Baihan Li
Signed-off-by: Yongbang Shi
---
ChangeLog:
v1 -> v2:
- delete if (!dp->is_
From: Baihan Li
The debouncing when HPD pulled out still remains sometimes, 200ms still can
not ensure helper_detect() is correct. So add more checks and
hibmc_dp_link_training0() in detect_ctx().
Fixes: 3c7623fb5bb6 ("drm/hisilicon/hibmc: Enable this hot plug detect of irq
feature")
Signed-off
From: Baihan Li
The local variable is passed in request_irq (), and there will be use
after free problem, which will make request_irq failed. Using the global
irq name instead of it to fix.
Fixes: b11bc1ae4658 ("drm/hisilicon/hibmc: Add MSI irq getting and requesting
for HPD")
Signed-off-by: Ba
From: Baihan Li
In some case, the dp link training success at 8.1Gbps, but the sink's
maximum supported rate is less than 8.1G. So change the default 8.1Gbps
link rate to the rate that reads from devices' capabilities.
Fixes: 54063d86e036 ("drm/hisilicon/hibmc: add dp link moduel in hibmc drive
To the best of my knowledge, all drivers in the mainline kernel adding a
DRM bridge are now converted to using devm_drm_bridge_alloc() for
allocation and initialization. Among others this ensures initialization of
the bridge refcount, allowing dynamic allocation lifetime.
devm_drm_bridge_alloc() i
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