Am 06.03.25 um 16:11 schrieb Nitin Gote:
> Give the scheduler a chance to breath by adding delay of 10ms
> as some of the loops may take some time on old machines (like apl/bsw/pnv),
> and so catch the attention of the watchdogs.
>
> v1: Instead of cond_resched(), use more generic call like
> f
On Fri, Mar 07, 2025 at 09:40:56PM -0600, Rob Herring (Arm) wrote:
>
> On Sat, 08 Mar 2025 03:42:23 +0200, Dmitry Baryshkov wrote:
> > From: Dmitry Baryshkov
> >
> > Describe the Mobile Display SubSystem (MDSS) device present on the
> > Qualcomm SAR2130P platform. It looks pretty close to SM8550
From: Konrad Dybcio
The current compatible has been used with no corresponding
documentation. Replace it with one that has been documented.
This has no functional effect, as these nodes' resources are only
consumed through a phandle reference, anyway.
Signed-off-by: Konrad Dybcio
---
arch/arm
From: Abhinav Kumar
In order to support more versatile configuration of the display pipes on
SC8280XP, enable SmartDMA for this platform.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16
1 file changed, 8 insertions(+), 8 delet
From: Dmitry Baryshkov
Reworking of the catalog dropped the SmartDMA feature bit on the SC8180X
platform. Renable SmartDMA support on this SoC.
Fixes: 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_
From: Dmitry Baryshkov
On Fri, 21 Feb 2025 16:24:10 +0100, Krzysztof Kozlowski wrote:
> Dependency / Rabased on top of
> ==
> https://lore.kernel.org/all/20241214-dpu-drop-features-v1-0-988f0662c...@linaro.org/
>
> Merging
> ===
> DSI pieces here might not be rea
From: Dmitry Baryshkov
On Wed, 05 Mar 2025 19:16:51 -0800, Jessica Zhang wrote:
> Similar to WB_MUX, CDM_MUX also needs to be adjusted to support
> dedicated CWB PINGPONGs
>
>
Applied, thanks!
[1/1] drm/msm/dpu: Adjust CDM_MUX to support CWB PINGPONG
https://gitlab.freedesktop.org/luma
From: Dmitry Baryshkov
On Thu, 06 Mar 2025 10:22:28 +0200, Dmitry Baryshkov wrote:
>
Applied, thanks!
[1/2] drm/msm/dpu: correct dpu_crtc_check_mode_changed docs
https://gitlab.freedesktop.org/lumag/msm/-/commit/096775c3dcf3
[2/2] drm/msm/dpu: correct struct dpu_encoder_virt docs
From: Dmitry Baryshkov
On Fri, 07 Mar 2025 09:50:30 +0800, Jiapeng Chong wrote:
> ./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: dpu_hw_cwb.h is included more
> than once.
>
>
Applied, thanks!
[1/1] drm/msm/dpu: Remove duplicate dpu_hw_cwb.h header
https://gitlab.freedesktop.org/lumag
From: Dmitry Baryshkov
On Fri, 07 Mar 2025 12:29:39 +0300, Dan Carpenter wrote:
> After the loop there is a check for whether "wb_encoder" has been set
> to non-NULL, however it was never set to NULL. Initialize it to NULL.
>
>
Applied, thanks!
[1/1] drm/msm/dpu: Fix uninitialized variable
From: Dmitry Baryshkov
It is easy to skip or ignore the fact that the default SSPP feature
masks for SDM845+ don't include the SmartDMA bit (both during
development and during the review stage). Rename SSPP feature masks to
make it more explicit that using non-SmartDMA masks should not be an
exce
It is easy to skip or ignore the fact that the default SSPP feature
masks for SDM845+ don't include the SmartDMA bit (both during
development and during the review stage).
Enable SmartDMA on SC8180X, SC8280XP, SM8150 and SM8550. Then rename
SSPP feature masks to make it more explicit that using no
From: Dmitry Baryshkov
Reworking of the catalog dropped the SmartDMA feature bit on the SM8150
platform. Renable SmartDMA support on this SoC.
Fixes: 460c410f02e4 ("drm/msm/dpu: duplicate sdm845 catalog entries")
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0
From: Abhinav Kumar
In order to support more versatile configuration of the display pipes on
SM8550, enable SmartDMA for this platform.
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 20 ++--
1 file changed, 10 insertions(+), 10 delet
Add error handling to propagate amdgpu_cgs_create_device() failures
to the caller. When amdgpu_cgs_create_device() fails, release hwmgr
and return -ENOMEM to prevent null pointer dereference.
[v1]->[v2]: Change error code from -EINVAL to -ENOMEM. Free hwmgr.
Signed-off-by: Wentao Liang
---
driv
On 06/03/2025 18:38, Tejas Vipin wrote:
On 3/6/25 10:58 PM, Doug Anderson wrote:
Hi,
On Thu, Mar 6, 2025 at 6:05 AM wrote:
On 06/03/2025 14:43, Tejas Vipin wrote:
Changes the novatek-nt36523 panel to use multi style functions for
improved error handling.
Signed-off-by: Tejas Vipin
---
From: Jeffrey Hugo
When slicing a BO, we need to iterate through the BO's sgt to find the
right pieces to construct the slice. Some of the data types chosen for
this process are incorrectly too small, and can overflow. This can
result in the incorrect slice construction, which can lead to data
co
On 03/06/2025, Rob Herring wrote:
> On Wed, Mar 05, 2025 at 10:35:26AM +0100, Alexander Stein wrote:
>> Hi,
>>
>> Am Dienstag, 4. März 2025, 16:23:20 CET schrieb Rob Herring:
>>> On Tue, Mar 04, 2025 at 06:15:28PM +0800, Liu Ying wrote:
A DPI color encoder, as a simple display bridge, converts
From: Dmitry Baryshkov
Describe DisplayPort controller present on Qualcomm SAR2130P platform.
Signed-off-by: Dmitry Baryshkov
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/d
On Sat, 08 Mar 2025 03:42:23 +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> Describe the Mobile Display SubSystem (MDSS) device present on the
> Qualcomm SAR2130P platform. It looks pretty close to SM8550 on the
> system level. SAR2130P features two DSI hosts and single DisplayPort
On Fri, Mar 07, 2025 at 09:26:54AM -0800, Rob Clark wrote:
> On Fri, Mar 7, 2025 at 9:00 AM Maxime Ripard wrote:
> >
> > On Fri, Mar 07, 2025 at 08:42:46AM -0800, Rob Clark wrote:
> > > On Tue, Sep 24, 2024 at 5:27 AM Vignesh Raman
> > > wrote:
> > > >
> > > > Hi,
> > > >
> > > > On 12/09/24 11:1
On Sat, Mar 08, 2025 at 03:42:24AM +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> Add compatible and device configuration for the Qualcomm SAR2130P
> platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/msm_mdss.c | 11 +++
> 1 file changed, 11 inserti
From: Dmitry Baryshkov
Add the SAR2130P compatible to clients compatible list, the device
require identity domain.
Signed-off-by: Dmitry Baryshkov
---
drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
b/dr
Add support for the Mobile Display SubSystem (MDSS) device present on
the Qualcomm SAR2130P platform. The MDSS device is similar to SM8550, it
features two MIPI DSI controllers, two MIPI DSI PHYs and one DisplayPort
controller.
Note, due to the technical limitations DP controller wasn't completely
From: Dmitry Baryshkov
Add display controller, two DSI hosts, two DSI PHYs and a single DP
controller. Link DP to the QMP Combo PHY.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sar2130p.dtsi | 394 +
1 file changed, 394 insertions(+)
diff --git
From: Dmitry Baryshkov
Add DPU driver support for the Qualcomm SAR2130P platform. It is mostly
the same as SM8550, minor differences in the CDP configuration.
Signed-off-by: Dmitry Baryshkov
---
.../drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h | 434 +
drivers/gpu/drm/msm
From: Dmitry Baryshkov
Add compatible and device configuration for the Qualcomm SAR2130P
platform.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
From: Dmitry Baryshkov
Qualcomm SAR2130P requires slightly different setup for the DSI PHY. It
is a 5nm PHY (like SM8450), so supplies are the same, but the rest of
the configuration is the same as SM8550 DSI PHY.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c |
From: Dmitry Baryshkov
Describe MIPI DSI controller present on Qualcomm SAR2130P platform.
Signed-off-by: Dmitry Baryshkov
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display
From: Dmitry Baryshkov
Describe the Mobile Display SubSystem (MDSS) device present on the
Qualcomm SAR2130P platform. It looks pretty close to SM8550 on the
system level. SAR2130P features two DSI hosts and single DisplayPort
controller.
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display
From: Dmitry Baryshkov
Describe DPU controller present on Qualcomm SAR2130P platform.
Signed-off-by: Dmitry Baryshkov
---
Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sc
From: Dmitry Baryshkov
Describe MIPI DSI PHY present on Qualcomm SAR2130P platform.
Signed-off-by: Dmitry Baryshkov
---
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.y
thew Brost
Signed-off-by: Lucas De Marchi
---
Changes in v2:
- Unindent paragraph that shouldn't be part of "Device Memory
Operations"
- Link to v1:
https://lore.kernel.org/r/20250307-fix-svm-kerneldoc-v1-1-c786f73ae...@intel.com
---
Documentation/gpu/rfc/gpusvm.rst |
Hi,
在 2025-03-06 16:42:00，"Piotr Oniszczuk" 写道：
>
>
>> Wiadomość napisana przez Andy Yan w dniu 6 mar 2025, o
>> godz. 01:59:
>>
>>
>>
>>
>> Both of the two config options should be enabled.
>> andy@Pro480:~/WorkSpace/linux-next$ rg DW_DP .config
>> 4044:CONFIG_ROCKCHIP_DW_DP=y
>
>here i’m
The handling of the MST Connection Status Notify message is skipped if
the probing of the topology is still pending. Acquiring the
drm_dp_mst_topology_mgr::probe_lock for this in
drm_dp_mst_handle_up_req() is problematic: the task/work this function
is called from is also responsible for handling M
On Fri, Mar 07, 2025 at 12:29:39PM +0300, Dan Carpenter wrote:
> After the loop there is a check for whether "wb_encoder" has been set
> to non-NULL, however it was never set to NULL. Initialize it to NULL.
>
> Fixes: ad06972d5365 ("drm/msm/dpu: Reorder encoder kickoff for CWB")
> Signed-off-by:
From: Dmitry Baryshkov
After enabling YUV support for writeback on a variety of DPU hardware,
the wb2_formats_rgb is now unused. Drop it following the report of LKP.
Reported-by: kernel test robot
Closes:
https://lore.kernel.org/oe-kbuild-all/202503071857.ozbqspae-...@intel.com/
Signed-off-by:
./drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c: dpu_hw_cwb.h is included more
than once.
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=19239
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 1 -
1 file changed, 1 deletion(-)
diff
On Fri, Mar 07, 2025 at 05:53:38PM -0500, Lyude Paul wrote:
> I thought we had agreed that drm_dp_aux_dev.c was one of the few places where
> we wanted to keep using the old functions here?
Hmm, I thought I dropped it.
>
> On Fri, 2025-03-07 at 06:34 +0200, Dmitry Baryshkov wrote:
> > From: Dmit
On Sat, Mar 08, 2025 at 01:48:50AM +0900, Vincent Mailhol via B4 Relay wrote:
> From: Lucas De Marchi
>
> Implement fixed-type BIT_U*() to help drivers add stricter checks,
> like it was done for GENMASK_U*().
...
> /*
> * Missing asm support
> *
> - * GENMASK_U*() depends on BITS_PER_TYPE
From: Vincent Mailhol
In an upcoming change, GENMASK() and its friends will indirectly
depend on sizeof() which is not available in asm.
Instead of adding further complexity to __GENMASK() to make it work
for both asm and non asm, just split the definition of the two
variants.
Signed-off-by: Vi
From: Vincent Mailhol
Add some additional tests in lib/test_bits.c to cover the expected
results of the fixed type BIT_U*() macros.
Signed-off-by: Vincent Mailhol
---
Changelog:
v5 -> v6:
- No changes.
v4 -> v5:
- BIT_U8()/BIT_U16() are now back to u8/u16.
v3 -> v4:
- Ne
One generic question, do we have test case to verify whether the function is
working correctly? Thanks.
I think we could have IGT test case to trigger the fault, then have another IGT
test case to query it with this new uapi.
And make sure we could get the expected data with the new uapi.
Shuich
On Fri, Mar 7, 2025 2:41 PM Cavitt, Jonathan wrote
> Add additional information to each VM so they can report up to the first
> 50 seen pagefaults. Only failed pagefaults are saved this way, as successful
> pagefaults should recover and not need to be reported to userspace.
>
> v2:
> - Free vm af
Reviewed-by: Lyude Paul
On Fri, 2025-03-07 at 06:34 +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> drm_dp_dpcd_read_link_status() follows the "return error code or number
> of bytes read" protocol, with the code returning less bytes than
> requested in case of some errors. However
A few tiny nitpicks below, but with those addressed:
Reviewed-by: Lyude Paul
On Fri, 2025-03-07 at 06:34 +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> Existing DPCD access functions return an error code or the number of
> bytes being read / write in case of partial access. Howeve
Add additional information to each VM so they can report up to the first
50 seen pagefaults. Only failed pagefaults are saved this way, as
successful pagefaults should recover and not need to be reported to
userspace.
v2:
- Free vm after use (Shuicheng)
- Compress pf copy logic (Shuicheng)
- Upda
Add additional information to each VM so they can report up to the first
50 seen pagefaults. Only failed pagefaults are saved this way, as
successful pagefaults should recover and not need to be reported to
userspace.
Additionally, add a new ioctl - xe_vm_get_faults_ioctl - that allows the
user t
I thought we had agreed that drm_dp_aux_dev.c was one of the few places where
we wanted to keep using the old functions here?
On Fri, 2025-03-07 at 06:34 +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> Switch drm_dp_aux_dev.c to use new set of DPCD read / write helpers.
>
> Acked-by
Add initial declarations for the drm_xe_vm_get_faults ioctl.
Signed-off-by: Jonathan Cavitt
---
include/uapi/drm/xe_drm.h | 49 +++
1 file changed, 49 insertions(+)
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h
index 616916985e3f..90c2fcd
The page fault handler should reject write/atomic access to read only
VMAs. Add code to handle this in handle_pagefault after the VMA lookup.
Fixes: 3d420e9fa848 ("drm/xe: Rework GPU page fault handling")
Signed-off-by: Jonathan Cavitt
Suggested-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_gt_p
Add support for userspace to request a list of observed failed
pagefaults from a specified VM.
v2:
- Only allow querying of failed pagefaults (Matt Brost)
v3:
- Remove unnecessary size parameter from helper function, as it
is a property of the arguments. (jcavitt)
- Remove unnecessary copy_from
Add a new field to the xe_pagefault struct, address_type, that tracks
the type of fault the pagefault incurred.
Signed-off-by: Jonathan Cavitt
---
drivers/gpu/drm/xe/xe_gt_pagefault.c | 3 +++
drivers/gpu/drm/xe/xe_gt_pagefault.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/
On 7.03.2025 12:07 PM, Stephan Gerhold wrote:
> On Thu, Mar 06, 2025 at 07:11:15PM +0100, Konrad Dybcio wrote:
>> From: Konrad Dybcio
>>
>> MSM8916 seems to reuse the same hardware as MSM8974 and friends (for
>> whom this binding document was created). Add a new compatible for it.
>>
>> Signed-off
On Sat, Mar 08, 2025 at 01:48:48AM +0900, Vincent Mailhol via B4 Relay wrote:
> From: Vincent Mailhol
>
> In an upcoming change, GENMASK() and its friends will indirectly
> depend on sizeof() which is not available in asm.
>
> Instead of adding further complexity to __GENMASK() to make it work
>
On March 7, 2025 10:49:56 AM PST, Andrew Cooper
wrote:
>> (int)true most definitely is guaranteed to be 1.
>
>That's not technically correct any more.
>
>GCC has introduced hardened bools that intentionally have bit patterns
>other than 0 and 1.
>
>https://gcc.gnu.org/gcc-14/changes.html
>
>~Andr
-Original Message-
From: Mun, Gwan-gyeong
Sent: Friday, March 7, 2025 4:40 AM
To: Cavitt, Jonathan ; intel...@lists.freedesktop.org
Cc: Gupta, saurabhg ; Zuo, Alex ;
joonas.lahti...@linux.intel.com; Brost, Matthew ;
Zhang, Jianxun ; Lin, Shuicheng
; dri-devel@lists.freedesktop.org
Subj
-Original Message-
From: Mun, Gwan-gyeong
Sent: Friday, March 7, 2025 2:35 AM
To: Cavitt, Jonathan ; intel...@lists.freedesktop.org
Cc: Gupta, saurabhg ; Zuo, Alex ;
joonas.lahti...@linux.intel.com; Brost, Matthew ;
Zhang, Jianxun ; Lin, Shuicheng
; dri-devel@lists.freedesktop.org
Subj
On Thu, 06 Mar 2025 19:11:13 +0100, Konrad Dybcio wrote:
> From: Konrad Dybcio
>
> Some MMU instances feature a Translation Buffer Unit (TBU), which comes
> with its own clock. Allow describing it.
>
> Signed-off-by: Konrad Dybcio
> ---
> Documentation/devicetree/bindings/iommu/qcom,iommu.ya
https://bugzilla.kernel.org/show_bug.cgi?id=219834
Atiq (ati...@gmail.com) changed:
What|Removed |Added
Status|RESOLVED|CLOSED
--- Comment #3 from Atiq
On Fri, Mar 07, 2025 at 12:48:36PM -0500, Yury Norov wrote:
> On Fri, Mar 07, 2025 at 07:43:57PM +0200, Andy Shevchenko wrote:
> > On Fri, Mar 07, 2025 at 12:18:02PM -0500, Yury Norov wrote:
> > > No rush, please allow your reviewers a week or two before submitting
> > > a new iteration unless you
On Fri, Mar 07, 2025 at 07:48:01PM +0200, Andy Shevchenko wrote:
> On Sat, Mar 08, 2025 at 01:48:50AM +0900, Vincent Mailhol via B4 Relay wrote:
...
> > /*
> > * Missing asm support
> > *
> > - * GENMASK_U*() depends on BITS_PER_TYPE() which relies on sizeof(),
> > - * something not availabl
On Thu, Mar 06, 2025 at 10:11:31AM +0100, A. Zini wrote:
> From: Alessandro Zini
>
> This patch series adds support for disabling the generation of h/vsync signals
> on the ti-sn65dsi83 bridge.
>
> This is required on some panels which are driven in DE-only mode but do not
> ignore sync packets,
Hi Dave, Simona,
More updates for 6.15.
The following changes since commit 7d83c129a8d7df23334d4a35bca9090a26b0a118:
drm/amdgpu: Fix parameter annotation in vcn_v5_0_0_is_idle (2025-02-27
16:50:05 -0500)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.gi
On March 7, 2025 11:53:10 AM PST, David Laight
wrote:
>On Fri, 07 Mar 2025 11:30:35 -0800
>"H. Peter Anvin" wrote:
>
>> On March 7, 2025 10:49:56 AM PST, Andrew Cooper
>> wrote:
>> >> (int)true most definitely is guaranteed to be 1.
>> >
>> >That's not technically correct any more.
>> >
>> >
On Fri, 07 Mar 2025 11:30:35 -0800
"H. Peter Anvin" wrote:
> On March 7, 2025 10:49:56 AM PST, Andrew Cooper
> wrote:
> >> (int)true most definitely is guaranteed to be 1.
> >
> >That's not technically correct any more.
> >
> >GCC has introduced hardened bools that intentionally have bit patt
On Fri, 7 Mar 2025 at 10:31, Dan Carpenter wrote:
>
> The __drmm_universal_plane_alloc() function doesn't return NULL, it
> returns error pointers. Update the check to match.
>
> Fixes: 332122eba628 ("drm: adp: Add Apple Display Pipe driver")
Acked-by: Sasha Finkelstein
On March 7, 2025 11:36:43 AM PST, David Laight
wrote:
>On Fri, 7 Mar 2025 12:42:41 +0100
>Jiri Slaby wrote:
>
>> On 07. 03. 25, 12:38, Ingo Molnar wrote:
>> >
>> > * Jiri Slaby wrote:
>> >
>> >> On 06. 03. 25, 17:25, Kuan-Wei Chiu wrote:
>> >>> Change return type to bool for better clarit
On Fri, 7 Mar 2025 12:42:41 +0100
Jiri Slaby wrote:
> On 07. 03. 25, 12:38, Ingo Molnar wrote:
> >
> > * Jiri Slaby wrote:
> >
> >> On 06. 03. 25, 17:25, Kuan-Wei Chiu wrote:
> >>> Change return type to bool for better clarity. Update the kernel doc
> >>> comment accordingly, including fix
On March 7, 2025 11:30:08 AM PST, Yury Norov wrote:
>On Fri, Mar 07, 2025 at 04:14:34AM -0800, H. Peter Anvin wrote:
>> On March 7, 2025 4:13:26 AM PST, Ingo Molnar wrote:
>> >
>> >* Jiri Slaby wrote:
>> >
>> >> On 07. 03. 25, 12:38, Ingo Molnar wrote:
>> >> >
>> >> > * Jiri Slaby wrote:
>> >>
On Wed, Mar 05, 2025 at 07:18:33PM -0500, Felix Kuehling wrote:
>
> On 2025-03-05 16:08, Salah Triki wrote:
> > Replace (un)register_chrdev() by (unregister/alloc)_chrdev_region() as
> > they are deprecated since kernel 2.6.
>
> Where is that information coming from? I see __register_chrdev docum
On Fri, Mar 07, 2025 at 08:51:03AM -0600, Lucas De Marchi wrote:
On Fri, Mar 07, 2025 at 02:02:15AM -0600, Lucas De Marchi wrote:
Hi Dave and Sima,
Last drm-xe-next pull request for 6.15. It comes with some big features
that we have been working on for some time: EU stall sampling and SVM.
The
On Fri, Mar 07, 2025 at 12:18:02PM -0500, Yury Norov wrote:
> No rush, please allow your reviewers a week or two before submitting
> a new iteration unless you want to disregard the previous version for
> some reason, of course. This will not get into the upcoming merge
> window, anyways.
>
> So,
> (int)true most definitely is guaranteed to be 1.
That's not technically correct any more.
GCC has introduced hardened bools that intentionally have bit patterns
other than 0 and 1.
https://gcc.gnu.org/gcc-14/changes.html
~Andrew
Refactor parity calculations to use the standard parity8() helper. This
change eliminates redundant implementations and improves code
efficiency.
Co-developed-by: Yu-Chun Lin
Signed-off-by: Yu-Chun Lin
Signed-off-by: Kuan-Wei Chiu
---
drivers/media/i2c/saa7115.c | 12 ++--
1 file chang
On Fri, 2025-03-07 at 15:09 -0300, Maíra Canal wrote:
> Hi Philipp,
>
> On 05/03/25 10:05, Philipp Stanner wrote:
> > The documentation for drm_sched_backend_ops.run_job() mentions a
> > certain
> > function called drm_sched_job_recovery(). This function does not
> > exist.
> > What's actually mea
Hi Philipp,
On 05/03/25 10:05, Philipp Stanner wrote:
The documentation for drm_sched_backend_ops.run_job() mentions a certain
function called drm_sched_job_recovery(). This function does not exist.
What's actually meant is drm_sched_resubmit_jobs(), which is by now also
deprecated.
Furthermore
On Fri, 2025-03-07 at 16:59 +, Tvrtko Ursulin wrote:
>
> On 07/03/2025 13:41, Philipp Stanner wrote:
> > Hi,
> >
> > You forgot to put folks in CC as recipents for the cover letter :(
> >
> >
> > On Thu, 2025-03-06 at 17:05 +, Tvrtko Ursulin wrote:
> > > Move some options out into a new
On Sat, Mar 08, 2025 at 01:48:51AM +0900, Vincent Mailhol via B4 Relay wrote:
> From: Lucas De Marchi
>
> Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use
> them to implement the i915/xe specific macros. Converting each driver
> to use the generic macros are left for later,
On Fri, Mar 07, 2025 at 07:43:57PM +0200, Andy Shevchenko wrote:
> On Fri, Mar 07, 2025 at 12:18:02PM -0500, Yury Norov wrote:
> > No rush, please allow your reviewers a week or two before submitting
> > a new iteration unless you want to disregard the previous version for
> > some reason, of cours
On Sat, Mar 08, 2025 at 01:48:49AM +0900, Vincent Mailhol via B4 Relay wrote:
> From: Yury Norov
>
> Add GENMASK_TYPE() which generalizes __GENMASK() to support different
> types, and implement fixed-types versions of GENMASK() based on it.
> The fixed-type version allows more strict checks to th
On Thu, Mar 06, 2025 at 02:12:14PM -0500, Anusha Srivatsa wrote:
> On Thu, Mar 6, 2025 at 12:54 PM Doug Anderson wrote:
> > On Thu, Mar 6, 2025 at 9:20 AM Maxime Ripard wrote:
> > >
> > > On Thu, Mar 06, 2025 at 10:08:24AM -0500, Anusha Srivatsa wrote:
> > > > On Thu, Mar 6, 2025 at 4:31 AM Maxim
On Wed, 5 Mar 2025 17:59:46 -0500, Lyude Paul wrote:
> A binding for checking drm_device.num_crtcs. We'll need this in a moment
> for vblank support, since setting it up requires knowing the number of
> CRTCs that a driver has initialized.
>
> Signed-off-by: Lyude Paul
>
> [ ... ]
Reviewed-by:
On Fri, Mar 07, 2025 at 10:37:04AM +0100, Philipp Stanner wrote:
> On Thu, 2025-03-06 at 12:57 -0800, Matthew Brost wrote:
> > On Wed, Mar 05, 2025 at 02:05:52PM +0100, Philipp Stanner wrote:
> > > drm_sched_backend_ops.timedout_job()'s documentation is outdated.
> > > It
> > > mentions the depreca
On Fri, Mar 7, 2025 at 9:00 AM Maxime Ripard wrote:
>
> On Fri, Mar 07, 2025 at 08:42:46AM -0800, Rob Clark wrote:
> > On Tue, Sep 24, 2024 at 5:27 AM Vignesh Raman
> > wrote:
> > >
> > > Hi,
> > >
> > > On 12/09/24 11:18, Dmitry Baryshkov wrote:
> > > > On Mon, Sep 09, 2024 at 07:34:04AM GMT, Ro
On Fri, Mar 07, 2025 at 07:55:13AM -0800, Matthew Brost wrote:
+ * - Device Memory Operations:
+ * Define the interface for driver-specific device memory operations
+ * release memory, populate pfns, and copy to / from device memory.
+ *
+ * This layer provides interfaces for allocati
No rush, please allow your reviewers a week or two before submitting
a new iteration unless you want to disregard the previous version for
some reason, of course. This will not get into the upcoming merge
window, anyways.
So, what should I do? Go through the v5 and all discussions in there,
or jus
From: Lucas De Marchi
Implement fixed-type BIT_U*() to help drivers add stricter checks,
like it was done for GENMASK_U*().
Signed-off-by: Lucas De Marchi
Acked-by: Jani Nikula
Co-developed-by: Vincent Mailhol
Signed-off-by: Vincent Mailhol
---
Changelog:
v5 -> v6:
- No changes.
v
On Fri, Mar 07, 2025 at 10:37:04AM +0100, Philipp Stanner wrote:
> On Thu, 2025-03-06 at 12:57 -0800, Matthew Brost wrote:
> > On Wed, Mar 05, 2025 at 02:05:52PM +0100, Philipp Stanner wrote:
> > > drm_sched_backend_ops.timedout_job()'s documentation is outdated.
> > > It
> > > mentions the depreca
From: Lucas De Marchi
Now that include/linux/bits.h implements fixed-width GENMASK_U*(), use
them to implement the i915/xe specific macros. Converting each driver
to use the generic macros are left for later, when/if other
driver-specific macros are also generalized.
Signed-off-by: Lucas De Marc
Add a very simple timeout test which submits a single job and verifies
that the timeout handling will run if the backend failed to complete the
job in time.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
.../gpu/drm/scheduler/
Add a basic test for exercising modifying the entities scheduler list at
runtime.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/tests/tests_basic.c | 69 ++-
1 file changed, 68 insert
Implement a mock scheduler backend and add some basic test to exercise the
core scheduler code paths.
Mock backend (kind of like a very simple mock GPU) can either process jobs
by tests manually advancing the "timeline" job at a time, or alternatively
jobs can be configured with a time duration in
Add some basic tests for exercising entity priority handling.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/tests/tests_basic.c | 95 ++-
1 file changed, 94 insertions(+), 1 deletion(
Move some options out into a new debug specific kconfig file in order to
make things a bit cleaner.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/Kconfig | 109 ++
drivers
There has repeatedly been quite a bit of apprehension when any change to the DRM
scheduler is proposed, with two main reasons being code base is considered
fragile, not well understood and not very well documented, and secondly the lack
of systematic testing outside the vendor specific tests suites
On Fri, Mar 07, 2025 at 08:42:46AM -0800, Rob Clark wrote:
> On Tue, Sep 24, 2024 at 5:27 AM Vignesh Raman
> wrote:
> >
> > Hi,
> >
> > On 12/09/24 11:18, Dmitry Baryshkov wrote:
> > > On Mon, Sep 09, 2024 at 07:34:04AM GMT, Rob Clark wrote:
> > >> On Mon, Sep 9, 2024 at 2:54 AM Dmitry Baryshkov
>
On 07/03/2025 13:41, Philipp Stanner wrote:
Hi,
You forgot to put folks in CC as recipents for the cover letter :(
On Thu, 2025-03-06 at 17:05 +, Tvrtko Ursulin wrote:
Move some options out into a new debug specific kconfig file in order
to
make things a bit cleaner.
Signed-off-by: Tvr
On 08/03/2025 at 01:07, Andy Shevchenko wrote:
> On Fri, Mar 07, 2025 at 07:11:42PM +0900, Vincent Mailhol wrote:
>> On 07/03/2025 at 02:55, Andy Shevchenko wrote:
>>> On Fri, Mar 07, 2025 at 01:08:15AM +0900, Vincent Mailhol wrote:
On 06/03/2025 at 22:11, Andy Shevchenko wrote:
> On Thu,
When a plane is created, add a `type` file to allow to set the type:
- 0 overlay
- 1 primary
- 2 cursor
Co-developed-by: Louis Chauvet
Signed-off-by: Louis Chauvet
Signed-off-by: José Expósito
---
Documentation/gpu/vkms.rst | 5 +++
drivers/gpu/drm/vkms/vkms_configfs.c | 46
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