On Thu, Dec 26, 2024 at 02:33:06PM +0800, Damon Ding wrote:
> According to Documentation/devicetree/bindings/display/dp-aux-bus.yaml,
> it is a good way to get panel through the DP AUX bus.
>
> Acked-by: Krzysztof Kozlowski
> Signed-off-by: Damon Ding
>
> Changes in v4:
> - Move the dt-bindings
On Tue, Dec 24, 2024 at 05:49:09PM +0800, Kever Yang wrote:
> rk3562 has 1 ARM Mali-G52 GPU,.
>
This we see from the diff. Say something not obvious. Where is the
driver change? Why devices are or are not compatible?
> Signed-off-by: Kever Yang
> ---
>
> Changes in v2: None
>
> Documentation
On Tue, Dec 24, 2024 at 05:49:03PM +0800, Kever Yang wrote:
>
> This patch set adds rk3562 SoC and its evb support.
>
> Split out patches belong to different subsystem.
>
> Test with GMAC, USB, PCIe, EMMC, SD Card.
>
> This patch set is base on the patche set for rk3576 evb1 support.
>
> Chang
On 26/12/2024 07:32, Damon Ding wrote:
> Compared with RK3288/RK3399, the HBR2 link rate support is the main
> improvement of RK3588 eDP TX controller, and there are also two
> independent eDP display interfaces on RK3588 Soc.
>
> The newly added 'apb' reset is to ensure the APB bus of eDP control
On 2024/12/22 9:59, Demi Marie Obenour wrote:
On 12/20/24 10:35 AM, Simona Vetter wrote:
On Fri, Dec 20, 2024 at 06:04:09PM +0800, Honglei Huang wrote:
From: Honglei Huang
A virtio-gpu userptr is based on HMM notifier.
Used for let host access guest userspace memory and
notice the change of
On 2024/12/22 9:59, Demi Marie Obenour wrote:
On 12/20/24 10:35 AM, Simona Vetter wrote:
On Fri, Dec 20, 2024 at 06:04:09PM +0800, Honglei Huang wrote:
From: Honglei Huang
A virtio-gpu userptr is based on HMM notifier.
Used for let host access guest userspace memory and
notice the change of u
Hi Carlos,
On Mon, Nov 25, 2024 at 10:29:09PM +0800, carlos.s...@nxp.com wrote:
> From: Carlos Song
>
> Add eDMA mode support for LPI2C.
>
> There are some differences between TX DMA mode and RX DMA mode.
> LPI2C MTDR register is Controller Transmit Data Register.
> When lpi2c send data, it is
On 12/19/2024 9:44 PM, Dmitry Baryshkov wrote:
On Mon, Dec 16, 2024 at 04:43:28PM -0800, Jessica Zhang wrote:
We cannot support both CWB and CDM simultaneously as this would require
2 CDM blocks and currently our hardware only supports 1 CDM block at
most.
Why would CWB require a second CDM
On 12/20/2024 5:07 PM, Dmitry Baryshkov wrote:
On Fri, Dec 20, 2024 at 04:12:29PM -0800, Jessica Zhang wrote:
On 12/19/2024 9:52 PM, Dmitry Baryshkov wrote:
On Mon, Dec 16, 2024 at 04:43:29PM -0800, Jessica Zhang wrote:
Add support for RM to reserve dedicated CWB PINGPONGs and CWB muxes
On Tue, 06 Aug 2024 17:44:54 -0400, Richard Acayan wrote:
> This adds support for the speed-binned A615 GPU on SDM670.
>
> Changes since v1 (20240730013844.41951-6-mailingrad...@gmail.com):
> - add Acked-by tag (1/4)
> - add OPPs exclusive to some speed bins (3/4)
> - enable GMU by default (3/4)
On Tue, 17 Dec 2024 15:51:13 +0100, Neil Armstrong wrote:
> The Adreno GPU Management Unit (GMU) can also vote for DDR Bandwidth
> along the Frequency and Power Domain level, but by default we leave the
> OPP core scale the interconnect ddr path.
>
> While scaling the interconnect path was suffi
On 24-12-11 15:42:27, Johan Hovold wrote:
> On Wed, Dec 11, 2024 at 03:04:12PM +0200, Abel Vesa wrote:
>
> > +/**
> > + * drm_dp_lttpr_set_transparent_mode - set the LTTPR in transparent mode
> > + * @aux: DisplayPort AUX channel
> > + * @enable: Enable or disable transparent mode
> > + *
> > + *
On 24-12-11 15:56:53, Johan Hovold wrote:
> On Wed, Dec 11, 2024 at 03:04:15PM +0200, Abel Vesa wrote:
>
> > +static void msm_dp_display_lttpr_init(struct msm_dp_display_private *dp)
> > +{
> > + int lttpr_count;
> > +
> > + if (drm_dp_read_lttpr_common_caps(dp->aux, dp->panel->dpcd,
> > +
On 24-12-11 21:22:00, Dmitry Baryshkov wrote:
> On Wed, Dec 11, 2024 at 03:04:12PM +0200, Abel Vesa wrote:
> > According to the DisplayPort standard, LTTPRs have two operating
> > modes:
> > - non-transparent - it replies to DPCD LTTPR field specific AUX
> >requests, while passes through all o
On Thu, Dec 26, 2024 at 11:29:23AM +0530, Sumit Garg wrote:
> On Tue, 24 Dec 2024 at 14:58, Lukas Wunner wrote:
> > However in the case of restricted memory, the situation is exactly
> > the opposite: The kernel may *not* be able to access the data,
> > but the crypto accelerator can access it ju
Add Mobile Display Subsystem (MDSS) support for the QCS8300 platform.
Due to different memory type, it use different mdss_data with SA8775P
although using the same dpu.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Yongxing Mou
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed,
Add compatible string for the supported eDP PHY on QCS8300 platform.
QCS8300 have the same eDP PHY with SA8775P.
Signed-off-by: Yongxing Mou
---
.../devicetree/bindings/phy/qcom,edp-phy.yaml | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/Document
Document the MDSS hardware found on the Qualcomm QCS8300 platform.
Signed-off-by: Yongxing Mou
---
.../bindings/display/msm/qcom,qcs8300-mdss.yaml| 244 +
1 file changed, 244 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml
This series introduces support to enable the Mobile Display Subsystem (MDSS)
, Display Processing Unit (DPU), DisplayPort controller and eDP PHY for
the Qualcomm QCS8300 target. It includes the addition of the hardware catalog,
compatible string, and their YAML bindings.
Signed-off-by: Yongxing M
Add compatible string for the DisplayPort controller found on the
Qualcomm QCS8300 platform.QCS8300 only support one DisplayPort
controller and have the same base offset with sm8650, so we reuse
the sm8650 DisplayPort driver.
Signed-off-by: Yongxing Mou
---
Documentation/devicetree/bindings/disp
Document the DPU for Qualcomm QCS8300 platform.It use the same DPU
hardware with SA8775P and reuse it's driver.
Signed-off-by: Yongxing Mou
---
.../devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml| 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/Documentat
在 2024/12/19 10:52, Yongbang Shi 写道:
Does everyone have a question with the patch?
Reviewed-by: Tian Tao
From: baihan li
Realizing the basic display function of DP cable for DP connector
displaying. Add DP module in hibmc drm driver, which is for Hisilicon
Hibmc SoC which used for Out-o
22 matches
Mail list logo
